hw/arm/bcm2836.c

   1 /*
   2  * Raspberry Pi emulation (c) 2012 Gregory Estrade
   3  * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous
   4  *
   5  * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft
   6  * Written by Andrew Baumann
   7  *
   8  * This code is licensed under the GNU GPLv2 and later.
   9  */
  10
  11 #include "qemu/osdep.h"
  12 #include "qapi/error.h"
  13 #include "qemu-common.h"
  14 #include "cpu.h"
  15 #include "hw/arm/bcm2836.h"
  16 #include "hw/arm/raspi_platform.h"
  17 #include "hw/sysbus.h"
  18 #include "exec/address-spaces.h"
  19
  20 /* Peripheral base address seen by the CPU */
  21 #define BCM2836_PERI_BASE       0x3F000000
  22
  23 /* "QA7" (Pi2) interrupt controller and mailboxes etc. */
  24 #define BCM2836_CONTROL_BASE    0x40000000
  25
  26 struct BCM283XInfo {
  27     const char *name;
  28 };
  29
  30 static const BCM283XInfo bcm283x_socs[] = {
  31     {
  32         .name = TYPE_BCM2836,
  33     },
  34     {
  35         .name = TYPE_BCM2837,
  36     },
  37 };
  38
  39 static void bcm2836_init(Object *obj)
  40 {
  41     BCM283XState *s = BCM283X(obj);
  42
  43     object_initialize(&s->control, sizeof(s->control), TYPE_BCM2836_CONTROL);
  44     object_property_add_child(obj, "control", OBJECT(&s->control), NULL);
  45     qdev_set_parent_bus(DEVICE(&s->control), sysbus_get_default());
  46
  47     object_initialize(&s->peripherals, sizeof(s->peripherals),
  48                       TYPE_BCM2835_PERIPHERALS);
  49     object_property_add_child(obj, "peripherals", OBJECT(&s->peripherals),
  50                               &error_abort);
  51     object_property_add_alias(obj, "board-rev", OBJECT(&s->peripherals),
  52                               "board-rev", &error_abort);
  53     object_property_add_alias(obj, "vcram-size", OBJECT(&s->peripherals),
  54                               "vcram-size", &error_abort);
  55     qdev_set_parent_bus(DEVICE(&s->peripherals), sysbus_get_default());
  56 }
  57
  58 static void bcm2836_realize(DeviceState *dev, Error **errp)
  59 {
  60     BCM283XState *s = BCM283X(dev);
  61     Object *obj;
  62     Error *err = NULL;
  63     int n;
  64
  65     /* common peripherals from bcm2835 */
  66
  67     obj = OBJECT(dev);
  68     for (n = 0; n < BCM283X_NCPUS; n++) {
  69         object_initialize(&s->cpus[n], sizeof(s->cpus[n]),
  70                           s->cpu_type);
  71         object_property_add_child(obj, "cpu[*]", OBJECT(&s->cpus[n]),
  72                                   &error_abort);
  73     }
  74
  75     obj = object_property_get_link(OBJECT(dev), "ram", &err);
  76     if (obj == NULL) {
  77         error_setg(errp, "%s: required ram link not found: %s",
  78                    __func__, error_get_pretty(err));
  79         return;
  80     }
  81
  82     object_property_add_const_link(OBJECT(&s->peripherals), "ram", obj, &err);
  83     if (err) {
  84         error_propagate(errp, err);
  85         return;
  86     }
  87
  88     object_property_set_bool(OBJECT(&s->peripherals), true, "realized", &err);
  89     if (err) {
  90         error_propagate(errp, err);
  91         return;
  92     }
  93
  94     object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->peripherals),
  95                               "sd-bus", &err);
  96     if (err) {
  97         error_propagate(errp, err);
  98         return;
  99     }
 100
 101     sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->peripherals), 0,
 102                             BCM2836_PERI_BASE, 1);
 103
 104     /* bcm2836 interrupt controller (and mailboxes, etc.) */
 105     object_property_set_bool(OBJECT(&s->control), true, "realized", &err);
 106     if (err) {
 107         error_propagate(errp, err);
 108         return;
 109     }
 110
 111     sysbus_mmio_map(SYS_BUS_DEVICE(&s->control), 0, BCM2836_CONTROL_BASE);
 112
 113     sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 0,
 114         qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-irq", 0));
 115     sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 1,
 116         qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-fiq", 0));
 117
 118     for (n = 0; n < BCM283X_NCPUS; n++) {
 119         /* Mirror bcm2836, which has clusterid set to 0xf
 120          * TODO: this should be converted to a property of ARM_CPU
 121          */
 122         s->cpus[n].mp_affinity = 0xF00 | n;
 123
 124         /* set periphbase/CBAR value for CPU-local registers */
 125         object_property_set_int(OBJECT(&s->cpus[n]),
 126                                 BCM2836_PERI_BASE + MCORE_OFFSET,
 127                                 "reset-cbar", &err);
 128         if (err) {
 129             error_propagate(errp, err);
 130             return;
 131         }
 132
 133         /* start powered off if not enabled */
 134         object_property_set_bool(OBJECT(&s->cpus[n]), n >= s->enabled_cpus,
 135                                  "start-powered-off", &err);
 136         if (err) {
 137             error_propagate(errp, err);
 138             return;
 139         }
 140
 141         object_property_set_bool(OBJECT(&s->cpus[n]), true, "realized", &err);
 142         if (err) {
 143             error_propagate(errp, err);
 144             return;
 145         }
 146
 147         /* Connect irq/fiq outputs from the interrupt controller. */
 148         qdev_connect_gpio_out_named(DEVICE(&s->control), "irq", n,
 149                 qdev_get_gpio_in(DEVICE(&s->cpus[n]), ARM_CPU_IRQ));
 150         qdev_connect_gpio_out_named(DEVICE(&s->control), "fiq", n,
 151                 qdev_get_gpio_in(DEVICE(&s->cpus[n]), ARM_CPU_FIQ));
 152
 153         /* Connect timers from the CPU to the interrupt controller */
 154         qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_PHYS,
 155                 qdev_get_gpio_in_named(DEVICE(&s->control), "cntpnsirq", n));
 156         qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_VIRT,
 157                 qdev_get_gpio_in_named(DEVICE(&s->control), "cntvirq", n));
 158         qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_HYP,
 159                 qdev_get_gpio_in_named(DEVICE(&s->control), "cnthpirq", n));
 160         qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_SEC,
 161                 qdev_get_gpio_in_named(DEVICE(&s->control), "cntpsirq", n));
 162     }
 163 }
 164
 165 static Property bcm2836_props[] = {
 166     DEFINE_PROP_STRING("cpu-type", BCM283XState, cpu_type),
 167     DEFINE_PROP_UINT32("enabled-cpus", BCM283XState, enabled_cpus,
 168                        BCM283X_NCPUS),
 169     DEFINE_PROP_END_OF_LIST()
 170 };
 171
 172 static void bcm283x_class_init(ObjectClass *oc, void *data)
 173 {
 174     DeviceClass *dc = DEVICE_CLASS(oc);
 175     BCM283XClass *bc = BCM283X_CLASS(oc);
 176
 177     bc->info = data;
 178     dc->realize = bcm2836_realize;
 179     dc->props = bcm2836_props;
 180 }
 181
 182 static const TypeInfo bcm283x_type_info = {
 183     .name = TYPE_BCM283X,
 184     .parent = TYPE_DEVICE,
 185     .instance_size = sizeof(BCM283XState),
 186     .instance_init = bcm2836_init,
 187     .class_size = sizeof(BCM283XClass),
 188     .abstract = true,
 189 };
 190
 191 static void bcm2836_register_types(void)
 192 {
 193     int i;
 194
 195     type_register_static(&bcm283x_type_info);
 196     for (i = 0; i < ARRAY_SIZE(bcm283x_socs); i++) {
 197         TypeInfo ti = {
 198             .name = bcm283x_socs[i].name,
 199             .parent = TYPE_BCM283X,
 200             .class_init = bcm283x_class_init,
 201             .class_data = (void *) &bcm283x_socs[i],
 202         };
 203         type_register(&ti);
 204     }
 205 }
 206
 207 type_init(bcm2836_register_types)