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hw/riscv: Move sifive_u_otp model to hw/misc
[qemu/ar7.git]
/
include
/
hw
/
pci
/
pci_regs.h
blob
77ba64b9314d50de04acc3d0786ee0110a9b9f41
1
#ifndef HW_PCI_PCI_REGS_H
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#define HW_PCI_PCI_REGS_H
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#include
"standard-headers/linux/pci_regs.h"
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#define PCI_PM_CAP_VER_1_1 0x0002
/* PCI PM spec ver. 1.1 */
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#endif