hw/riscv: Move sifive_u_otp model to hw/misc
[qemu/ar7.git] / include / hw / intc / ibex_plic.h
blobd8eb09b258a08fef27a0b3c2c1228c25f091239e
1 /*
2 * QEMU RISC-V lowRISC Ibex PLIC
4 * Copyright (c) 2020 Western Digital
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2 or later, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
15 * You should have received a copy of the GNU General Public License along with
16 * this program. If not, see <http://www.gnu.org/licenses/>.
19 #ifndef HW_IBEX_PLIC_H
20 #define HW_IBEX_PLIC_H
22 #include "hw/sysbus.h"
24 #define TYPE_IBEX_PLIC "ibex-plic"
25 #define IBEX_PLIC(obj) \
26 OBJECT_CHECK(IbexPlicState, (obj), TYPE_IBEX_PLIC)
28 typedef struct IbexPlicState {
29 /*< private >*/
30 SysBusDevice parent_obj;
32 /*< public >*/
33 MemoryRegion mmio;
35 uint32_t *pending;
36 uint32_t *claimed;
37 uint32_t *source;
38 uint32_t *priority;
39 uint32_t *enable;
40 uint32_t threshold;
41 uint32_t claim;
43 /* config */
44 uint32_t num_cpus;
45 uint32_t num_sources;
47 uint32_t pending_base;
48 uint32_t pending_num;
50 uint32_t source_base;
51 uint32_t source_num;
53 uint32_t priority_base;
54 uint32_t priority_num;
56 uint32_t enable_base;
57 uint32_t enable_num;
59 uint32_t threshold_base;
61 uint32_t claim_base;
62 } IbexPlicState;
64 #endif /* HW_IBEX_PLIC_H */