hw/timer/sse-timer: Model the SSE Subsystem System Timer
[qemu/ar7.git] / target / tricore / cpu.c
blob0b1e139bcba6b1c1bd277780d26779c4634cd13e
1 /*
2 * TriCore emulation for qemu: main translation routines.
4 * Copyright (c) 2012-2014 Bastian Koppelmann C-Lab/University Paderborn
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
21 #include "qapi/error.h"
22 #include "cpu.h"
23 #include "exec/exec-all.h"
24 #include "qemu/error-report.h"
26 static inline void set_feature(CPUTriCoreState *env, int feature)
28 env->features |= 1ULL << feature;
31 static gchar *tricore_gdb_arch_name(CPUState *cs)
33 return g_strdup("tricore");
36 static void tricore_cpu_set_pc(CPUState *cs, vaddr value)
38 TriCoreCPU *cpu = TRICORE_CPU(cs);
39 CPUTriCoreState *env = &cpu->env;
41 env->PC = value & ~(target_ulong)1;
44 static void tricore_cpu_synchronize_from_tb(CPUState *cs,
45 const TranslationBlock *tb)
47 TriCoreCPU *cpu = TRICORE_CPU(cs);
48 CPUTriCoreState *env = &cpu->env;
50 env->PC = tb->pc;
53 static void tricore_cpu_reset(DeviceState *dev)
55 CPUState *s = CPU(dev);
56 TriCoreCPU *cpu = TRICORE_CPU(s);
57 TriCoreCPUClass *tcc = TRICORE_CPU_GET_CLASS(cpu);
58 CPUTriCoreState *env = &cpu->env;
60 tcc->parent_reset(dev);
62 cpu_state_reset(env);
65 static bool tricore_cpu_has_work(CPUState *cs)
67 return true;
70 static void tricore_cpu_realizefn(DeviceState *dev, Error **errp)
72 CPUState *cs = CPU(dev);
73 TriCoreCPU *cpu = TRICORE_CPU(dev);
74 TriCoreCPUClass *tcc = TRICORE_CPU_GET_CLASS(dev);
75 CPUTriCoreState *env = &cpu->env;
76 Error *local_err = NULL;
78 cpu_exec_realizefn(cs, &local_err);
79 if (local_err != NULL) {
80 error_propagate(errp, local_err);
81 return;
84 /* Some features automatically imply others */
85 if (tricore_feature(env, TRICORE_FEATURE_161)) {
86 set_feature(env, TRICORE_FEATURE_16);
89 if (tricore_feature(env, TRICORE_FEATURE_16)) {
90 set_feature(env, TRICORE_FEATURE_131);
92 if (tricore_feature(env, TRICORE_FEATURE_131)) {
93 set_feature(env, TRICORE_FEATURE_13);
95 cpu_reset(cs);
96 qemu_init_vcpu(cs);
98 tcc->parent_realize(dev, errp);
102 static void tricore_cpu_initfn(Object *obj)
104 TriCoreCPU *cpu = TRICORE_CPU(obj);
106 cpu_set_cpustate_pointers(cpu);
109 static ObjectClass *tricore_cpu_class_by_name(const char *cpu_model)
111 ObjectClass *oc;
112 char *typename;
114 typename = g_strdup_printf(TRICORE_CPU_TYPE_NAME("%s"), cpu_model);
115 oc = object_class_by_name(typename);
116 g_free(typename);
117 if (!oc || !object_class_dynamic_cast(oc, TYPE_TRICORE_CPU) ||
118 object_class_is_abstract(oc)) {
119 return NULL;
121 return oc;
124 static void tc1796_initfn(Object *obj)
126 TriCoreCPU *cpu = TRICORE_CPU(obj);
128 set_feature(&cpu->env, TRICORE_FEATURE_13);
131 static void tc1797_initfn(Object *obj)
133 TriCoreCPU *cpu = TRICORE_CPU(obj);
135 set_feature(&cpu->env, TRICORE_FEATURE_131);
138 static void tc27x_initfn(Object *obj)
140 TriCoreCPU *cpu = TRICORE_CPU(obj);
142 set_feature(&cpu->env, TRICORE_FEATURE_161);
145 #include "hw/core/tcg-cpu-ops.h"
147 static struct TCGCPUOps tricore_tcg_ops = {
148 .initialize = tricore_tcg_init,
149 .synchronize_from_tb = tricore_cpu_synchronize_from_tb,
150 .tlb_fill = tricore_cpu_tlb_fill,
153 static void tricore_cpu_class_init(ObjectClass *c, void *data)
155 TriCoreCPUClass *mcc = TRICORE_CPU_CLASS(c);
156 CPUClass *cc = CPU_CLASS(c);
157 DeviceClass *dc = DEVICE_CLASS(c);
159 device_class_set_parent_realize(dc, tricore_cpu_realizefn,
160 &mcc->parent_realize);
162 device_class_set_parent_reset(dc, tricore_cpu_reset, &mcc->parent_reset);
163 cc->class_by_name = tricore_cpu_class_by_name;
164 cc->has_work = tricore_cpu_has_work;
166 cc->gdb_read_register = tricore_cpu_gdb_read_register;
167 cc->gdb_write_register = tricore_cpu_gdb_write_register;
168 cc->gdb_num_core_regs = 44;
169 cc->gdb_arch_name = tricore_gdb_arch_name;
171 cc->dump_state = tricore_cpu_dump_state;
172 cc->set_pc = tricore_cpu_set_pc;
173 cc->get_phys_page_debug = tricore_cpu_get_phys_page_debug;
174 cc->tcg_ops = &tricore_tcg_ops;
177 #define DEFINE_TRICORE_CPU_TYPE(cpu_model, initfn) \
179 .parent = TYPE_TRICORE_CPU, \
180 .instance_init = initfn, \
181 .name = TRICORE_CPU_TYPE_NAME(cpu_model), \
184 static const TypeInfo tricore_cpu_type_infos[] = {
186 .name = TYPE_TRICORE_CPU,
187 .parent = TYPE_CPU,
188 .instance_size = sizeof(TriCoreCPU),
189 .instance_init = tricore_cpu_initfn,
190 .abstract = true,
191 .class_size = sizeof(TriCoreCPUClass),
192 .class_init = tricore_cpu_class_init,
194 DEFINE_TRICORE_CPU_TYPE("tc1796", tc1796_initfn),
195 DEFINE_TRICORE_CPU_TYPE("tc1797", tc1797_initfn),
196 DEFINE_TRICORE_CPU_TYPE("tc27x", tc27x_initfn),
199 DEFINE_TYPES(tricore_cpu_type_infos)