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target/riscv: rvv-1.0: take fractional LMUL into vector max elements calculation
2021-12-20
LIU Zh
i
wei
target/riscv: rvv
-
1
.
0: add vcsr register
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2021-12-20
LIU Zhiwei
t
arget/riscv: rvv-1
.
0
: add sstat
u
s VS fie
l
d
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2021-12-20
LIU
Z
hiwe
i
target/ri
s
cv:
rvv-1
.
0: a
d
d m
s
t
a
t
us VS field
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2021-09-20
L
IU Zhiwei
t
a
r
get/riscv: Fi
x
satp write
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2021-09-01
LIU Zhiwei
target/ri
s
cv
:
Add Us
e
r CSRs read-on
l
y
c
hec
k
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2021-09-01
LIU
Zhiwei
t
a
rg
e
t/riscv: Don't
w
rongl
y
o
v
erride
isa v
e
r
s
ion
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2021-06-29
LIU
Z
hiwei
tcg: Implem
e
n
t
tcg_
g
en_ve
c
_
a
dd{sub}32_tl
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2021-06-29
LIU Zhiwei
tcg: Add tc
g
_g
e
n_
v
ec_
s
h
l{shr}{sa
r
}8i_i32
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2021-06-29
LIU
Z
hiwei
tcg:
A
dd
t
cg_
g
en_
v
e
c_shl{shr}{
s
a
r
}
16i_i32
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2021-06-29
L
IU Zhiwei
tcg:
A
dd tcg_gen_vec_ad
d
{
sub
}
8
_
i
32
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2021-06-29
LIU Zh
i
wei
tcg: Add tcg_gen_v
e
c_add{sub}16_i32
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2021-06-07
LIU Zhiwe
i
target/riscv: Pass
the same value to
o
pr
s
z and
m
axsz
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2021-05-11
LI
U
Zhiwei
target/
r
isc
v
: Fixup
s
aturate subtract fu
n
ction
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-08-28
LIU Zhiwei
softfloat: De
f
ine
misc op
e
r
a
tions for bfloat16
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-08-28
LIU
Z
h
iwei
softflo
a
t: Defi
n
e convert op
e
rati
o
ns
f
or bfloat16
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-08-28
LIU Z
h
i
we
i
soft
f
loa
t
: Define operations for bf
l
o
at
1
6
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-08-22
LIU Zhiwei
target/
r
iscv: check
before alloca
t
ing TCG temps
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-08-22
LIU Z
h
iwei
targe
t
/riscv
:
Clean up fmv
.
w
.
x
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-22
LIU Zhiw
e
i
t
a
rget/riscv: fix vector index load/stor
e
constr
a
ints
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-22
LI
U
Z
hiwei
target
/
riscv: Qu
i
et Coverity complai
n
s abo
u
t vamo*
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-15
L
IU Zhiwei
fpu/
s
oftfl
o
at: fi
x
up float16 n
a
n recognition
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
target/risc
v
: co
n
figure and
t
u
rn
on vector extension
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU
Zhiwei
target/
r
iscv: vector c
o
mpress i
n
struction
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LI
U
Zhiwei
target/riscv: vect
o
r re
g
ister gather in
s
tru
c
tion
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
L
I
U
Z
h
i
wei
targ
e
t/riscv: vector
s
l
i
de
i
nstructions
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
L
I
U Zhiwei
target/r
i
scv: f
l
oating-point scalar move
instructions
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU
Zhiwei
ta
r
get/riscv: in
t
eger
s
c
a
l
ar move instruction
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
target/riscv:
i
nteg
e
r extract instruction
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
target/risc
v
: vector
e
l
e
m
ent
i
ndex inst
r
uction
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhi
w
ei
target/riscv
:
vector iota instruction
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
t
a
r
g
et/riscv: set-X-f
i
r
s
t
m
ask bit
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
target
/
risc
v
: vmfirst find-first-s
e
t mask bit
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhi
w
ei
target/ri
s
cv:
v
ector mask populatio
n
count vmpopc
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
target/ris
c
v
: vector mask-register l
o
gical instr
u
cti
o
n
s
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
L
I
U Zhiwei
targ
e
t/r
i
scv: vector w
i
den
i
ng floating
-
p
oint reduct
i
on
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zh
i
w
ei
t
a
rge
t
/riscv: vector single-wid
t
h
floating-poi
n
t reduction
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhi
w
ei
target/riscv: vector wideing inte
g
er
reductio
n
i
n
s
truction
s
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
target/r
i
s
c
v: vector single
-
width i
n
t
eger redu
c
tion
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
target/riscv: narrowing floating-p
o
i
nt/i
n
t
eger t
y
pe
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
L
I
U Zhiwei
target/riscv: widening floa
t
ing
-
p
o
int/integer type
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
target/riscv: vector floating-poin
t
/inte
g
er type-convert
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
targ
e
t/riscv:
v
ector floatin
g
-po
i
nt
m
e
rge inst
r
uct
i
ons
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU
Zh
i
wei
t
arget/ris
c
v: vector floating-poi
n
t cl
a
ssify ins
t
ructions
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
L
I
U Z
h
iwei
target/
r
iscv: vec
t
or
f
loating-po
i
nt compare instructions
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhi
w
ei
t
arget/ri
s
c
v: vecto
r
floating-point sign-inj
e
c
t
i
on
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
targe
t
/riscv
:
vector f
l
oating-point min/max in
s
tructions
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwe
i
targ
e
t
/
riscv
:
vector
f
loating-
p
o
i
nt square-root
i
n
s
t
r
u
c
tion
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU
Z
hiwei
target/risc
v
: vecto
r
wid
e
nin
g
floatin
g
-poi
n
t fused
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
target/r
i
scv: vecto
r
single-wid
t
h floating-
p
oint
f
used
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
target/riscv: vector
wi
d
eni
n
g
f
loating-
p
oin
t
mu
l
tiply
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU
Zhiwe
i
target/riscv: vector
s
ingle-width floa
t
ing-point multiply
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
target/riscv: vector widening floa
t
i
ng-point ad
d
/subtract
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
L
I
U Zhiwei
target/risc
v
: vec
t
or single-width floating-po
i
nt ad
d
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiw
e
i
targ
e
t/
r
iscv: v
e
ct
o
r narrowing fixe
d
-p
o
i
nt clip instruc
t
ion
s
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Z
h
iwei
targ
e
t/ris
c
v
:
ve
c
to
r
single-width scaling
s
h
ift instruction
s
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
target/ris
c
v:
vector
widening sa
t
urat
i
ng s
c
a
le
d
multipl
y
-add
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
t
arget/riscv: vector si
n
gle-w
i
dth fract
i
onal multiply
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
target/riscv: vector s
i
ngle-
w
idth averaging add and
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhi
w
ei
target/riscv: vect
o
r
s
ing
l
e-w
i
d
th satur
a
t
ing
ad
d
and
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
t
arget/riscv: vecto
r
inte
g
er m
e
r
g
e
a
nd mov
e
i
nstructions
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
target/riscv: vector wide
n
in
g
integer mu
l
tipl
y
-add
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LI
U
Zhiwei
t
a
rget/riscv:
ve
c
tor single-width integer multiply
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LI
U
Zh
i
wei
target/riscv: vector wi
d
ening intege
r
multiply
i
nstructions
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Z
h
iw
e
i
targ
e
t/riscv: ve
c
tor
i
nteger divide
instructions
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
target/ri
s
cv: vector s
i
n
g
le-width integer multiply
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
t
arge
t
/
r
iscv
:
vector
i
n
teger
m
i
n
/max instructio
n
s
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Z
h
iwei
target
/
riscv: vector
integer compariso
n
instructions
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU
Zhi
w
ei
target/riscv:
vector narrowing
in
t
eg
e
r r
i
g
ht shift
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
targ
e
t/riscv: vec
t
or sing
l
e-
w
idth
b
it shif
t
i
nstructions
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhi
w
ei
target
/
risc
v
: vec
t
or bitwi
s
e logical instruction
s
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwe
i
target/
r
iscv: vector inte
g
er add-with-carry / subtr
a
ct
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
L
I
U
Zhi
w
ei
t
a
rget/ris
c
v:
v
ector widen
i
ng
i
nteger add an
d
subtrac
t
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
t
a
rget/riscv
:
vector single-width in
t
eger add and
subtract
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
target/r
i
scv:
a
dd vec
t
or
amo op
e
r
a
ti
o
n
s
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU
Z
h
i
w
ei
target/riscv: add fault-only-first unit s
t
r
ide lo
a
d
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
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commitdiff
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tree
2020-07-02
LIU Zhiwei
t
a
rget/riscv
:
add vecto
r
index
load
a
nd store instructions
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
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commitdiff
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tree
2020-07-02
LIU Zhiw
e
i
target/riscv: add
v
ec
t
or
s
tride loa
d
a
n
d
st
o
re ins
t
ructi
o
n
s
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
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commitdiff
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tree
2020-07-02
LIU Zhiwe
i
ta
r
get
/
riscv: add
an i
n
ternals
.
h
h
e
ader
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
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commitdiff
|
tree
2020-07-02
L
I
U Zhiwei
target/riscv: add vector confi
g
ure instr
u
ction
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
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commitdiff
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tree
2020-07-02
LI
U
Zhiwei
tar
g
et
/
ri
s
cv
:
support ve
c
t
o
r extension
csr
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
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commitdiff
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tree
2020-07-02
LIU Zhiwei
target
/
riscv: implementation-defined consta
n
t
p
a
rameters
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
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commitdiff
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tree
2020-07-02
LI
U
Zhiwei
tar
g
et/riscv:
a
dd vecto
r
ext
e
nsion field in CPURISCVState
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
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commitdiff
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tree
2020-04-29
LIU Zh
i
w
ei
linux
-
u
s
er/ris
c
v: f
i
x up struc
t
target_ucontext defini
t
i
o
n
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
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tree