target/riscv: vector single-width floating-point fused multiply-add instructions
commit4aa5a8fed4a21fe2e132a9a21b251aa95e19de80
authorLIU Zhiwei <zhiwei_liu@c-sky.com>
Wed, 1 Jul 2020 15:25:22 +0000 (1 23:25 +0800)
committerAlistair Francis <alistair.francis@wdc.com>
Thu, 2 Jul 2020 16:19:33 +0000 (2 09:19 -0700)
treeb3cf427dd2d195e22a655d66287a6dcaa50c828d
parentf7c7b7cd293ca6f14f23cc2c14d6d23fc47a604d
target/riscv: vector single-width floating-point fused multiply-add instructions

Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20200701152549.1218-35-zhiwei_liu@c-sky.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/helper.h
target/riscv/insn32.decode
target/riscv/insn_trans/trans_rvv.inc.c
target/riscv/vector_helper.c