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target/riscv: Simplify helper_sret() a little bit
2023-01-06
LIU Zhiwei
targe
t
/riscv
:
Add
i
trigg
e
r_en
a
bled field t
o
CPUR
I
SCVState
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@linux.alibaba.com>
commit
|
commitdiff
|
tree
2023-01-06
LIU Z
h
iwei
target
/
riscv: Enable native
d
ebug itr
i
gger
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@linux.alibaba.com>
commit
|
commitdiff
|
tree
2023-01-06
LI
U
Zhiwei
t
a
rget/riscv: Add
i
tri
g
g
e
r su
p
port when ic
o
unt
is
e
nabled
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@linux.alibaba.com>
commit
|
commitdiff
|
tree
2023-01-06
L
IU Zhiwei
targ
e
t/ris
c
v: Ad
d
i
t
r
i
gger support w
h
en icount is n
o
t
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@linux.alibaba.com>
commit
|
commitdiff
|
tree
2023-01-06
LIU
Z
hiw
e
i
targ
e
t
/
r
iscv: Fi
x
PMP
prop
a
g
a
tion
for
t
l
b
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@linux.alibaba.com>
commit
|
commitdiff
|
tree
2022-02-16
LIU Zhiwei
targe
t
/
risc
v
: Fix v
i
l
l
field wr
i
te
in vtype
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2022-01-21
LIU Zhiwei
tar
g
et/ris
c
v
: Relax UXL field for debu
g
ging
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2022-01-21
LIU Zhiwei
target/riscv: Enable uxl fie
l
d write
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2022-01-21
LIU Zhiw
e
i
target/ri
s
cv
:
Set default XLEN for
hypervisor
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2022-01-21
LIU
Z
hiwei
tar
g
et/ri
s
cv: Adjus
t
scalar reg
i
n ve
c
tor
w
ith XLEN
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2022-01-21
LIU Zhiwei
target
/
riscv: Adjust vec
t
or address with mask
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2022-01-21
LIU Zhiwei
tar
g
et/risc
v
: Fix check ran
g
e for f
i
rst
f
ault
o
nly
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2022-01-21
LIU Zhiwei
tar
g
et
/
riscv:
Remove
V
IL
L
fiel
d
in VTYPE
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2022-01-21
L
IU
Z
h
iwei
target/
r
iscv: Ad
j
ust vsetvl accordin
g
to XLEN
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2022-01-21
LI
U
Z
hiwei
tar
g
et/riscv: Sp
l
it out the vill
from v
t
ype
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2022-01-21
LI
U
Zhiwei
targe
t
/ris
c
v: Spl
i
t pm_enabled into m
a
sk and
b
ase
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2022-01-21
LIU Zhiwei
targ
e
t
/
riscv: Calc
u
l
a
t
e
a
d
dress a
c
cord
i
ng
to XLEN
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2022-01-21
LIU Zhiwei
target/riscv
:
Al
l
oc tcg global for cur_pm[mask
|
base]
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2022-01-21
LIU Zhiwei
target/riscv:
C
r
eat
e
c
urrent pm fi
e
lds in env
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2022-01-21
LIU Z
h
iwei
targe
t
/
r
is
c
v
:
Adjust csr write mask with XLEN
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2022-01-21
LIU
Z
hiwei
target/riscv: Relax debug ch
e
ck for p
m
wri
t
e
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2022-01-21
LI
U
Zhiwe
i
target/riscv
:
Us
e
gdb xml accord
i
ng t
o
max mxlen
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2022-01-21
L
I
U Zhiwei
targ
e
t/riscv: Extend pc for ru
n
ti
m
e
pc w
r
i
t
e
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2022-01-21
L
IU Zhiwei
target/riscv:
Ig
n
ore the pc bits above
X
LEN
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2022-01-21
LIU Zhiwei
target/riscv: Create xl field in
e
nv
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2022-01-21
LIU
Zhiwei
target/riscv: Sig
n
ex
t
end pc
for differen
t
XLEN
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2022-01-21
L
IU Zhiwei
t
a
r
get/risc
v
: Sign e
x
tend link reg for jal and jalr
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2022-01-21
LIU Zhiwei
target
/
riscv:
D
on't save p
c
w
h
en excepti
o
n ret
u
r
n
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2022-01-21
LIU Zhiwei
target/r
i
scv: Adjust
pmpc
f
g acce
s
s wi
t
h
m
xl
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2021-12-20
LIU Zhiwei
t
arget/riscv:
r
vv-1
.
0: add vcsr regist
e
r
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2021-12-20
LIU Zhiwei
t
a
r
get/riscv:
rvv-1
.
0: add ssta
t
us V
S
field
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2021-12-20
LIU Z
h
iwei
target
/
riscv
:
rvv-1
.
0: add ms
t
atus VS
field
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2021-09-20
LIU Zhiwei
target/riscv: F
i
x sat
p
write
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2021-09-01
LIU Zhi
w
ei
ta
r
ge
t
/
riscv: Add User
C
SR
s
read-only
check
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2021-09-01
LI
U
Zhi
w
ei
tar
g
et/ri
s
cv: Don't wrongly over
r
ide isa version
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2021-06-29
LIU Zhiwei
tc
g
:
I
mplement tc
g
_gen_vec_a
d
d
{
sub}32_tl
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2021-06-29
LIU Zhiwei
tcg: A
d
d
t
c
g
_
gen
_
vec_sh
l
{shr}{sar}8i_i32
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2021-06-29
L
IU Zhiwei
tcg: Add tcg_gen_v
e
c_shl{
s
h
r}{s
a
r}
1
6i_i32
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2021-06-29
LIU Zhiwei
tcg: Ad
d
t
c
g_gen_vec_add{sub
}
8_i32
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2021-06-29
L
IU Zhiwei
t
c
g: Add tcg_gen_vec_add{sub}16_i
3
2
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2021-06-07
LIU Zhiwei
targ
e
t/r
i
scv: P
a
ss the same value to oprs
z
and ma
x
sz
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2021-05-11
LIU
Zhiw
e
i
ta
r
get/ri
s
cv: Fixup satura
t
e s
u
btract fu
n
cti
o
n
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-08-28
LIU Zhiwei
softfloat: De
f
i
n
e misc o
p
eratio
n
s
f
or bfloat
1
6
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-08-28
LIU Zhi
w
ei
softfloa
t
: D
e
f
i
ne convert operatio
n
s
f
o
r bfloat16
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-08-28
LIU Zhiwei
softfloat: Define operations
for bfl
o
at16
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-08-22
LIU Zhiwei
target/riscv: c
h
eck before alloc
a
ting TCG
temps
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-08-22
LIU Zh
i
wei
target/riscv: Cle
a
n up fmv
.
w
.
x
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-22
LIU
Zhi
w
ei
target/riscv
:
fix vector index load/store co
n
straint
s
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-22
LI
U
Zhiwei
target/
r
iscv: Quie
t
Coverity
c
omplains a
b
out vamo*
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-15
LIU Zhiwei
fpu/softflo
a
t: fix up float16 nan recognition
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Z
h
i
w
e
i
target/
r
is
c
v: con
f
igure and tur
n
on vec
t
or
extension
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
target/r
i
scv: vector
compress instruction
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
L
I
U Zhiwei
tar
g
et/riscv: vector
register ga
t
her ins
t
ruction
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU
Zhiwei
t
arget/
r
iscv
:
vector
sl
i
de instruc
t
i
o
ns
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
target
/
riscv
:
floating-point scalar move instruct
i
ons
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LI
U
Z
hiwei
t
arget/
r
i
s
cv
:
integer scalar move inst
r
u
c
tion
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhi
w
ei
ta
r
get/ris
c
v: integer extract i
n
struction
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU
Zhiwei
targe
t
/riscv: vect
o
r el
e
ment index instructi
o
n
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LI
U
Zhiwei
ta
r
get/r
i
scv: vec
t
or
iota i
n
struction
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
t
a
r
g
et/riscv: set-X-first mask bit
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zh
i
wei
target/
r
iscv
:
vmfirst fi
n
d-f
i
rst-set m
a
sk
b
it
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Z
h
iwei
target/riscv: vector mask
p
opulation co
u
nt v
m
p
o
pc
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
target/riscv: vector mask-
r
e
gi
s
ter
l
o
g
ical i
n
struc
t
ions
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
target/riscv
:
vector
w
idening fl
o
ating-po
i
nt reductio
n
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
target/r
i
scv
:
v
e
ctor single-wid
t
h f
l
oating-point reduction
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
tar
g
et/riscv: vect
o
r wideing integer
r
eduction instruc
t
ions
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
target/
r
iscv: vector single-width inte
g
er
r
educ
t
i
o
n
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU
Z
hiw
e
i
ta
r
g
e
t/riscv: nar
r
owing f
l
o
atin
g
-
p
oint/intege
r
t
y
pe
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
targe
t
/
riscv: widening floating-poin
t
/in
t
eger type
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LI
U
Zhiwei
target/r
i
scv: vector f
l
oating-poi
n
t
/
integer type-
c
o
nver
t
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
target/riscv:
ve
c
tor floating-
p
oint merge
i
nstruct
i
on
s
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
t
a
rget/ri
s
cv: ve
c
tor floating
-
p
o
int cla
s
sify ins
t
ructions
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
target/ri
s
cv: vector
floatin
g
-point compare in
s
tru
c
tions
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
target/
r
is
c
v: vector
f
loating
-
point
s
ign-inje
c
tion
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LI
U
Zh
i
wei
t
a
r
get/riscv: v
e
ctor
f
loat
i
n
g
-
p
o
int min/max instr
u
ct
i
ons
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
target/r
i
scv
:
v
e
ctor floating-point squ
a
r
e
-root instructio
n
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LI
U
Zhiwei
t
ar
g
et/ri
s
c
v: vector wi
d
ening
f
l
oating-
p
o
int fused
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU
Z
hiwei
ta
r
g
e
t/riscv:
v
ec
t
or single-wid
t
h fl
o
ating-point fu
s
ed
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LI
U
Zhiwei
target/riscv:
v
ector widening
floating-point multiply
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU
Z
hiwei
targe
t
/risc
v
:
vecto
r
s
i
n
gle-wi
d
th floati
n
g-poin
t
mu
l
tiply
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zh
i
wei
target/riscv: ve
c
to
r
widening floatin
g
-point
add/subtract
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhi
w
ei
targ
e
t/riscv: vector sing
l
e-width floating-
p
oint add
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
L
IU Zhiwei
t
arget/riscv: vector narrowing fixed-point clip instructions
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
t
a
rget/r
i
scv
:
vector single-width scaling shift instructions
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU
Z
hiw
e
i
t
a
r
g
et/riscv: v
e
ct
o
r wideni
n
g saturating sca
l
ed mu
l
tiply-add
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
targ
e
t/riscv: vector single-width fra
c
tional m
u
l
t
iply
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Z
h
iwei
target/riscv: vector single-w
i
d
th av
e
raging add and
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
target/r
i
scv: vec
t
o
r
s
i
n
g
le
-
width
saturating
a
d
d
and
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
L
I
U Zhiwei
tar
g
e
t
/
riscv:
vector integer me
r
ge and move instructions
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
L
I
U Z
h
iwei
target/riscv: v
e
ctor
wideni
n
g
inte
g
er mul
t
iply-add
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwe
i
target/risc
v
: vector single-w
i
d
t
h
intege
r
mult
i
ply
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
t
a
rget
/
riscv: vector widening integer
multi
p
ly
i
nstructions
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
target/risc
v
: v
e
ctor int
e
ger
d
ivide instruction
s
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
target
/
riscv: vect
o
r single-
w
idth integer mu
l
ti
p
ly
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU
Z
hiwei
target/riscv: vect
o
r in
t
ege
r
min/max instructions
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Z
h
i
w
ei
target/r
i
scv:
v
ector
in
t
eger comparison instruc
t
ions
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
L
IU Zh
i
w
e
i
target/riscv: vector narrowi
n
g in
t
eger right sh
i
ft
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
ta
r
g
e
t/riscv:
v
ec
t
or single
-
wid
t
h
b
it shi
f
t instruc
t
ions
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU
Zhiwei
t
arget/riscv: vec
t
or bitwise logical instruc
t
ions
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
commitdiff
|
tree
2020-07-02
LIU Zhiwei
ta
r
get/riscv
:
vector inte
g
er
a
dd-wi
t
h-ca
r
ry / subtract
.
.
.
Signed-off-by:
LIU Zhiwei
<zhiwei_liu@c-sky.com>
commit
|
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