| commit | 0aa2612a01f233a4a25fb89e8362baf6cf896be6 | |
| author | Cédric Le Goater <clg@kaod.org> | |
| Wed, 2 Mar 2022 05:51:39 +0000 (2 06:51 +0100) | ||
| committer | Cédric Le Goater <clg@kaod.org> | |
| Wed, 2 Mar 2022 05:51:39 +0000 (2 06:51 +0100) | ||
| tree | 843c92a177ce54f209f8f069fa35aa3405d5f938 | treesnapshot (tar.gz zip) |
| parent | aadf13abaad43dd1f8b6113e516649578af63775 | commitdiff |
ppc/xive: Add support for PQ state bits offload
The trigger message coming from a HW source contains a special bit
informing the XIVE interrupt controller that the PQ bits have been
checked at the source or not. Depending on the value, the IC can
perform the check and the state transition locally using its own PQ
state bits.
The following changes add new accessors to the XiveRouter required to
query and update the PQ state bits. This only applies to the PowerNV
machine. sPAPR accessors are provided but the pSeries machine should
not be concerned by such complex configuration for the moment.
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
The trigger message coming from a HW source contains a special bit
informing the XIVE interrupt controller that the PQ bits have been
checked at the source or not. Depending on the value, the IC can
perform the check and the state transition locally using its own PQ
state bits.
The following changes add new accessors to the XiveRouter required to
query and update the PQ state bits. This only applies to the PowerNV
machine. sPAPR accessors are provided but the pSeries machine should
not be concerned by such complex configuration for the moment.
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>