include/hw/ppc/xive2.h

   1 /*
   2  * QEMU PowerPC XIVE2 interrupt controller model  (POWER10)
   3  *
   4  * Copyright (c) 2019-2022, IBM Corporation.
   5  *
   6  * This code is licensed under the GPL version 2 or later. See the
   7  * COPYING file in the top-level directory.
   8  *
   9  */
  10
  11 #ifndef PPC_XIVE2_H
  12 #define PPC_XIVE2_H
  13
  14 #include "hw/ppc/xive2_regs.h"
  15
  16 /*
  17  * XIVE2 Router (POWER10)
  18  */
  19 typedef struct Xive2Router {
  20     SysBusDevice    parent;
  21
  22     XiveFabric *xfb;
  23 } Xive2Router;
  24
  25 #define TYPE_XIVE2_ROUTER "xive2-router"
  26 OBJECT_DECLARE_TYPE(Xive2Router, Xive2RouterClass, XIVE2_ROUTER);
  27
  28 typedef struct Xive2RouterClass {
  29     SysBusDeviceClass parent;
  30
  31     /* XIVE table accessors */
  32     int (*get_eas)(Xive2Router *xrtr, uint8_t eas_blk, uint32_t eas_idx,
  33                    Xive2Eas *eas);
  34     int (*get_pq)(Xive2Router *xrtr, uint8_t eas_blk, uint32_t eas_idx,
  35                   uint8_t *pq);
  36     int (*set_pq)(Xive2Router *xrtr, uint8_t eas_blk, uint32_t eas_idx,
  37                   uint8_t *pq);
  38     int (*get_end)(Xive2Router *xrtr, uint8_t end_blk, uint32_t end_idx,
  39                    Xive2End *end);
  40     int (*write_end)(Xive2Router *xrtr, uint8_t end_blk, uint32_t end_idx,
  41                      Xive2End *end, uint8_t word_number);
  42     int (*get_nvp)(Xive2Router *xrtr, uint8_t nvp_blk, uint32_t nvp_idx,
  43                    Xive2Nvp *nvp);
  44     int (*write_nvp)(Xive2Router *xrtr, uint8_t nvp_blk, uint32_t nvp_idx,
  45                      Xive2Nvp *nvp, uint8_t word_number);
  46     uint8_t (*get_block_id)(Xive2Router *xrtr);
  47 } Xive2RouterClass;
  48
  49 int xive2_router_get_eas(Xive2Router *xrtr, uint8_t eas_blk, uint32_t eas_idx,
  50                         Xive2Eas *eas);
  51 int xive2_router_get_end(Xive2Router *xrtr, uint8_t end_blk, uint32_t end_idx,
  52                         Xive2End *end);
  53 int xive2_router_write_end(Xive2Router *xrtr, uint8_t end_blk, uint32_t end_idx,
  54                           Xive2End *end, uint8_t word_number);
  55 int xive2_router_get_nvp(Xive2Router *xrtr, uint8_t nvp_blk, uint32_t nvp_idx,
  56                         Xive2Nvp *nvp);
  57 int xive2_router_write_nvp(Xive2Router *xrtr, uint8_t nvp_blk, uint32_t nvp_idx,
  58                           Xive2Nvp *nvp, uint8_t word_number);
  59
  60 void xive2_router_notify(XiveNotifier *xn, uint32_t lisn, bool pq_checked);
  61
  62 /*
  63  * XIVE2 Presenter (POWER10)
  64  */
  65
  66 int xive2_presenter_tctx_match(XivePresenter *xptr, XiveTCTX *tctx,
  67                                uint8_t format,
  68                                uint8_t nvt_blk, uint32_t nvt_idx,
  69                                bool cam_ignore, uint32_t logic_serv);
  70
  71 /*
  72  * XIVE2 END ESBs  (POWER10)
  73  */
  74
  75 #define TYPE_XIVE2_END_SOURCE "xive2-end-source"
  76 OBJECT_DECLARE_SIMPLE_TYPE(Xive2EndSource, XIVE2_END_SOURCE)
  77
  78 typedef struct Xive2EndSource {
  79     DeviceState parent;
  80
  81     uint32_t        nr_ends;
  82
  83     /* ESB memory region */
  84     uint32_t        esb_shift;
  85     MemoryRegion    esb_mmio;
  86
  87     Xive2Router     *xrtr;
  88 } Xive2EndSource;
  89
  90
  91 #endif /* PPC_XIVE2_H */