2 * Copyright(c) 2019-2022 Qualcomm Innovation Center, Inc. All Rights Reserved.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, see <http://www.gnu.org/licenses/>.
21 #include "fpu/softfloat-types.h"
23 #include "exec/cpu-defs.h"
25 #include "mmvec/mmvec.h"
26 #include "qom/object.h"
27 #include "hw/core/cpu.h"
28 #include "hw/registerfields.h"
31 #define TOTAL_PER_THREAD_REGS 64
35 #define REG_WRITES_MAX 32
36 #define PRED_WRITES_MAX 5 /* 4 insns + endloop */
39 #define TYPE_HEXAGON_CPU "hexagon-cpu"
41 #define HEXAGON_CPU_TYPE_SUFFIX "-" TYPE_HEXAGON_CPU
42 #define HEXAGON_CPU_TYPE_NAME(name) (name HEXAGON_CPU_TYPE_SUFFIX)
43 #define CPU_RESOLVING_TYPE TYPE_HEXAGON_CPU
45 #define TYPE_HEXAGON_CPU_V67 HEXAGON_CPU_TYPE_NAME("v67")
47 #define MMU_USER_IDX 0
59 DECLARE_BITMAP(mask
, MAX_VEC_SIZE_BYTES
) QEMU_ALIGNED(16);
60 MMVector data
QEMU_ALIGNED(16);
63 #define EXEC_STATUS_OK 0x0000
64 #define EXEC_STATUS_STOP 0x0002
65 #define EXEC_STATUS_REPLAY 0x0010
66 #define EXEC_STATUS_LOCKED 0x0020
67 #define EXEC_STATUS_EXCEPTION 0x0100
70 #define EXCEPTION_DETECTED (env->status & EXEC_STATUS_EXCEPTION)
71 #define REPLAY_DETECTED (env->status & EXEC_STATUS_REPLAY)
72 #define CLEAR_EXCEPTION (env->status &= (~EXEC_STATUS_EXCEPTION))
73 #define SET_EXCEPTION (env->status |= EXEC_STATUS_EXCEPTION)
75 /* Maximum number of vector temps in a packet */
76 #define VECTOR_TEMPS_MAX 4
78 typedef struct CPUArchState
{
79 target_ulong gpr
[TOTAL_PER_THREAD_REGS
];
80 target_ulong pred
[NUM_PREGS
];
81 target_ulong branch_taken
;
83 /* For comparing with LLDB on target - see adjust_stack_ptrs function */
84 target_ulong last_pc_dumped
;
85 target_ulong stack_start
;
87 uint8_t slot_cancelled
;
88 target_ulong new_value
[TOTAL_PER_THREAD_REGS
];
91 * Only used when HEX_DEBUG is on, but unconditionally included
92 * to reduce recompile time when turning HEX_DEBUG on/off.
95 target_ulong reg_written
[TOTAL_PER_THREAD_REGS
];
97 target_ulong new_pred_value
[NUM_PREGS
];
98 target_ulong pred_written
;
100 MemLog mem_log_stores
[STORES_MAX
];
101 target_ulong pkt_has_store_s1
;
102 target_ulong dczero_addr
;
104 float_status fp_status
;
106 target_ulong llsc_addr
;
107 target_ulong llsc_val
;
108 uint64_t llsc_val_i64
;
110 MMVector VRegs
[NUM_VREGS
] QEMU_ALIGNED(16);
111 MMVector future_VRegs
[VECTOR_TEMPS_MAX
] QEMU_ALIGNED(16);
112 MMVector tmp_VRegs
[VECTOR_TEMPS_MAX
] QEMU_ALIGNED(16);
114 VRegMask VRegs_updated
;
116 MMQReg QRegs
[NUM_QREGS
] QEMU_ALIGNED(16);
117 MMQReg future_QRegs
[NUM_QREGS
] QEMU_ALIGNED(16);
118 QRegMask QRegs_updated
;
120 /* Temporaries used within instructions */
121 MMVectorPair VuuV
QEMU_ALIGNED(16);
122 MMVectorPair VvvV
QEMU_ALIGNED(16);
123 MMVectorPair VxxV
QEMU_ALIGNED(16);
124 MMVector vtmp
QEMU_ALIGNED(16);
125 MMQReg qtmp
QEMU_ALIGNED(16);
127 VStoreLog vstore
[VSTORES_MAX
];
128 target_ulong vstore_pending
[VSTORES_MAX
];
130 VTCMStoreLog vtcm_log
;
133 OBJECT_DECLARE_CPU_TYPE(HexagonCPU
, HexagonCPUClass
, HEXAGON_CPU
)
135 typedef struct HexagonCPUClass
{
137 CPUClass parent_class
;
139 DeviceRealize parent_realize
;
140 ResettablePhases parent_phases
;
147 CPUNegativeOffsetState neg
;
151 target_ulong lldb_stack_adjust
;
154 #include "cpu_bits.h"
156 FIELD(TB_FLAGS
, IS_TIGHT_LOOP
, 0, 1)
158 static inline void cpu_get_tb_cpu_state(CPUHexagonState
*env
, target_ulong
*pc
,
159 target_ulong
*cs_base
, uint32_t *flags
)
161 uint32_t hex_flags
= 0;
162 *pc
= env
->gpr
[HEX_REG_PC
];
164 if (*pc
== env
->gpr
[HEX_REG_SA0
]) {
165 hex_flags
= FIELD_DP32(hex_flags
, TB_FLAGS
, IS_TIGHT_LOOP
, 1);
170 static inline int cpu_mmu_index(CPUHexagonState
*env
, bool ifetch
)
172 #ifdef CONFIG_USER_ONLY
175 #error System mode not supported on Hexagon yet
179 typedef HexagonCPU ArchCPU
;
181 void hexagon_translate_init(void);
183 #include "exec/cpu-all.h"
185 #endif /* HEXAGON_CPU_H */