hw/pci-host/pnv_phb4_pec.c

   1 /*
   2  * QEMU PowerPC PowerNV (POWER9) PHB4 model
   3  *
   4  * Copyright (c) 2018-2020, IBM Corporation.
   5  *
   6  * This code is licensed under the GPL version 2 or later. See the
   7  * COPYING file in the top-level directory.
   8  */
   9 #include "qemu/osdep.h"
  10 #include "qapi/error.h"
  11 #include "qemu-common.h"
  12 #include "qemu/log.h"
  13 #include "target/ppc/cpu.h"
  14 #include "hw/ppc/fdt.h"
  15 #include "hw/pci-host/pnv_phb4_regs.h"
  16 #include "hw/pci-host/pnv_phb4.h"
  17 #include "hw/ppc/pnv_xscom.h"
  18 #include "hw/pci/pci_bridge.h"
  19 #include "hw/pci/pci_bus.h"
  20 #include "hw/ppc/pnv.h"
  21 #include "hw/qdev-properties.h"
  22 #include "sysemu/sysemu.h"
  23
  24 #include <libfdt.h>
  25
  26 #define phb_pec_error(pec, fmt, ...)                                    \
  27     qemu_log_mask(LOG_GUEST_ERROR, "phb4_pec[%d:%d]: " fmt "\n",        \
  28                   (pec)->chip_id, (pec)->index, ## __VA_ARGS__)
  29
  30
  31 static uint64_t pnv_pec_nest_xscom_read(void *opaque, hwaddr addr,
  32                                         unsigned size)
  33 {
  34     PnvPhb4PecState *pec = PNV_PHB4_PEC(opaque);
  35     uint32_t reg = addr >> 3;
  36
  37     /* TODO: add list of allowed registers and error out if not */
  38     return pec->nest_regs[reg];
  39 }
  40
  41 static void pnv_pec_nest_xscom_write(void *opaque, hwaddr addr,
  42                                      uint64_t val, unsigned size)
  43 {
  44     PnvPhb4PecState *pec = PNV_PHB4_PEC(opaque);
  45     uint32_t reg = addr >> 3;
  46
  47     switch (reg) {
  48     case PEC_NEST_PBCQ_HW_CONFIG:
  49     case PEC_NEST_DROP_PRIO_CTRL:
  50     case PEC_NEST_PBCQ_ERR_INJECT:
  51     case PEC_NEST_PCI_NEST_CLK_TRACE_CTL:
  52     case PEC_NEST_PBCQ_PMON_CTRL:
  53     case PEC_NEST_PBCQ_PBUS_ADDR_EXT:
  54     case PEC_NEST_PBCQ_PRED_VEC_TIMEOUT:
  55     case PEC_NEST_CAPP_CTRL:
  56     case PEC_NEST_PBCQ_READ_STK_OVR:
  57     case PEC_NEST_PBCQ_WRITE_STK_OVR:
  58     case PEC_NEST_PBCQ_STORE_STK_OVR:
  59     case PEC_NEST_PBCQ_RETRY_BKOFF_CTRL:
  60         pec->nest_regs[reg] = val;
  61         break;
  62     default:
  63         phb_pec_error(pec, "%s @0x%"HWADDR_PRIx"=%"PRIx64"\n", __func__,
  64                       addr, val);
  65     }
  66 }
  67
  68 static const MemoryRegionOps pnv_pec_nest_xscom_ops = {
  69     .read = pnv_pec_nest_xscom_read,
  70     .write = pnv_pec_nest_xscom_write,
  71     .valid.min_access_size = 8,
  72     .valid.max_access_size = 8,
  73     .impl.min_access_size = 8,
  74     .impl.max_access_size = 8,
  75     .endianness = DEVICE_BIG_ENDIAN,
  76 };
  77
  78 static uint64_t pnv_pec_pci_xscom_read(void *opaque, hwaddr addr,
  79                                        unsigned size)
  80 {
  81     PnvPhb4PecState *pec = PNV_PHB4_PEC(opaque);
  82     uint32_t reg = addr >> 3;
  83
  84     /* TODO: add list of allowed registers and error out if not */
  85     return pec->pci_regs[reg];
  86 }
  87
  88 static void pnv_pec_pci_xscom_write(void *opaque, hwaddr addr,
  89                                     uint64_t val, unsigned size)
  90 {
  91     PnvPhb4PecState *pec = PNV_PHB4_PEC(opaque);
  92     uint32_t reg = addr >> 3;
  93
  94     switch (reg) {
  95     case PEC_PCI_PBAIB_HW_CONFIG:
  96     case PEC_PCI_PBAIB_READ_STK_OVR:
  97         pec->pci_regs[reg] = val;
  98         break;
  99     default:
 100         phb_pec_error(pec, "%s @0x%"HWADDR_PRIx"=%"PRIx64"\n", __func__,
 101                       addr, val);
 102     }
 103 }
 104
 105 static const MemoryRegionOps pnv_pec_pci_xscom_ops = {
 106     .read = pnv_pec_pci_xscom_read,
 107     .write = pnv_pec_pci_xscom_write,
 108     .valid.min_access_size = 8,
 109     .valid.max_access_size = 8,
 110     .impl.min_access_size = 8,
 111     .impl.max_access_size = 8,
 112     .endianness = DEVICE_BIG_ENDIAN,
 113 };
 114
 115 static void pnv_pec_default_phb_realize(PnvPhb4PecStack *stack,
 116                                         int stack_no,
 117                                         Error **errp)
 118 {
 119     PnvPhb4PecState *pec = stack->pec;
 120     PnvPhb4PecClass *pecc = PNV_PHB4_PEC_GET_CLASS(pec);
 121     int phb_id = pnv_phb4_pec_get_phb_id(pec, stack_no);
 122
 123     stack->phb = PNV_PHB4(qdev_new(TYPE_PNV_PHB4));
 124
 125     object_property_set_link(OBJECT(stack->phb), "pec", OBJECT(pec),
 126                              &error_abort);
 127     object_property_set_int(OBJECT(stack->phb), "chip-id", pec->chip_id,
 128                             &error_fatal);
 129     object_property_set_int(OBJECT(stack->phb), "index", phb_id,
 130                             &error_fatal);
 131     object_property_set_int(OBJECT(stack->phb), "version", pecc->version,
 132                             &error_fatal);
 133
 134     if (!sysbus_realize(SYS_BUS_DEVICE(stack->phb), errp)) {
 135         return;
 136     }
 137 }
 138
 139 static void pnv_pec_instance_init(Object *obj)
 140 {
 141     PnvPhb4PecState *pec = PNV_PHB4_PEC(obj);
 142     int i;
 143
 144     for (i = 0; i < PHB4_PEC_MAX_STACKS; i++) {
 145         object_initialize_child(obj, "stack[*]", &pec->stacks[i],
 146                                 TYPE_PNV_PHB4_PEC_STACK);
 147     }
 148 }
 149
 150 static void pnv_pec_realize(DeviceState *dev, Error **errp)
 151 {
 152     PnvPhb4PecState *pec = PNV_PHB4_PEC(dev);
 153     PnvPhb4PecClass *pecc = PNV_PHB4_PEC_GET_CLASS(pec);
 154     char name[64];
 155     int i;
 156
 157     if (pec->index >= PNV_CHIP_GET_CLASS(pec->chip)->num_pecs) {
 158         error_setg(errp, "invalid PEC index: %d", pec->index);
 159         return;
 160     }
 161
 162     pec->num_stacks = pecc->num_stacks[pec->index];
 163
 164     /* Create stacks */
 165     for (i = 0; i < pec->num_stacks; i++) {
 166         PnvPhb4PecStack *stack = &pec->stacks[i];
 167         Object *stk_obj = OBJECT(stack);
 168
 169         object_property_set_int(stk_obj, "stack-no", i, &error_abort);
 170         object_property_set_link(stk_obj, "pec", OBJECT(pec), &error_abort);
 171
 172         if (defaults_enabled()) {
 173             pnv_pec_default_phb_realize(stack, i, errp);
 174         }
 175
 176         /*
 177          * qdev gets angry if we don't realize 'stack' here, even
 178          * if stk_realize() is now empty.
 179          */
 180         if (!qdev_realize(DEVICE(stk_obj), NULL, errp)) {
 181             return;
 182         }
 183     }
 184     for (; i < PHB4_PEC_MAX_STACKS; i++) {
 185         object_unparent(OBJECT(&pec->stacks[i]));
 186     }
 187
 188     /* Initialize the XSCOM regions for the PEC registers */
 189     snprintf(name, sizeof(name), "xscom-pec-%d.%d-nest", pec->chip_id,
 190              pec->index);
 191     pnv_xscom_region_init(&pec->nest_regs_mr, OBJECT(dev),
 192                           &pnv_pec_nest_xscom_ops, pec, name,
 193                           PHB4_PEC_NEST_REGS_COUNT);
 194
 195     snprintf(name, sizeof(name), "xscom-pec-%d.%d-pci", pec->chip_id,
 196              pec->index);
 197     pnv_xscom_region_init(&pec->pci_regs_mr, OBJECT(dev),
 198                           &pnv_pec_pci_xscom_ops, pec, name,
 199                           PHB4_PEC_PCI_REGS_COUNT);
 200 }
 201
 202 static int pnv_pec_dt_xscom(PnvXScomInterface *dev, void *fdt,
 203                             int xscom_offset)
 204 {
 205     PnvPhb4PecState *pec = PNV_PHB4_PEC(dev);
 206     PnvPhb4PecClass *pecc = PNV_PHB4_PEC_GET_CLASS(dev);
 207     uint32_t nbase = pecc->xscom_nest_base(pec);
 208     uint32_t pbase = pecc->xscom_pci_base(pec);
 209     int offset, i;
 210     char *name;
 211     uint32_t reg[] = {
 212         cpu_to_be32(nbase),
 213         cpu_to_be32(pecc->xscom_nest_size),
 214         cpu_to_be32(pbase),
 215         cpu_to_be32(pecc->xscom_pci_size),
 216     };
 217
 218     name = g_strdup_printf("pbcq@%x", nbase);
 219     offset = fdt_add_subnode(fdt, xscom_offset, name);
 220     _FDT(offset);
 221     g_free(name);
 222
 223     _FDT((fdt_setprop(fdt, offset, "reg", reg, sizeof(reg))));
 224
 225     _FDT((fdt_setprop_cell(fdt, offset, "ibm,pec-index", pec->index)));
 226     _FDT((fdt_setprop_cell(fdt, offset, "#address-cells", 1)));
 227     _FDT((fdt_setprop_cell(fdt, offset, "#size-cells", 0)));
 228     _FDT((fdt_setprop(fdt, offset, "compatible", pecc->compat,
 229                       pecc->compat_size)));
 230
 231     for (i = 0; i < pec->num_stacks; i++) {
 232         int phb_id = pnv_phb4_pec_get_phb_id(pec, i);
 233         int stk_offset;
 234
 235         name = g_strdup_printf("stack@%x", i);
 236         stk_offset = fdt_add_subnode(fdt, offset, name);
 237         _FDT(stk_offset);
 238         g_free(name);
 239         _FDT((fdt_setprop(fdt, stk_offset, "compatible", pecc->stk_compat,
 240                           pecc->stk_compat_size)));
 241         _FDT((fdt_setprop_cell(fdt, stk_offset, "reg", i)));
 242         _FDT((fdt_setprop_cell(fdt, stk_offset, "ibm,phb-index", phb_id)));
 243     }
 244
 245     return 0;
 246 }
 247
 248 static Property pnv_pec_properties[] = {
 249         DEFINE_PROP_UINT32("index", PnvPhb4PecState, index, 0),
 250         DEFINE_PROP_UINT32("chip-id", PnvPhb4PecState, chip_id, 0),
 251         DEFINE_PROP_LINK("chip", PnvPhb4PecState, chip, TYPE_PNV_CHIP,
 252                          PnvChip *),
 253         DEFINE_PROP_END_OF_LIST(),
 254 };
 255
 256 static uint32_t pnv_pec_xscom_pci_base(PnvPhb4PecState *pec)
 257 {
 258     return PNV9_XSCOM_PEC_PCI_BASE + 0x1000000 * pec->index;
 259 }
 260
 261 static uint32_t pnv_pec_xscom_nest_base(PnvPhb4PecState *pec)
 262 {
 263     return PNV9_XSCOM_PEC_NEST_BASE + 0x400 * pec->index;
 264 }
 265
 266 /*
 267  * PEC0 -> 1 stack
 268  * PEC1 -> 2 stacks
 269  * PEC2 -> 3 stacks
 270  */
 271 static const uint32_t pnv_pec_num_stacks[] = { 1, 2, 3 };
 272
 273 static void pnv_pec_class_init(ObjectClass *klass, void *data)
 274 {
 275     DeviceClass *dc = DEVICE_CLASS(klass);
 276     PnvXScomInterfaceClass *xdc = PNV_XSCOM_INTERFACE_CLASS(klass);
 277     PnvPhb4PecClass *pecc = PNV_PHB4_PEC_CLASS(klass);
 278     static const char compat[] = "ibm,power9-pbcq";
 279     static const char stk_compat[] = "ibm,power9-phb-stack";
 280
 281     xdc->dt_xscom = pnv_pec_dt_xscom;
 282
 283     dc->realize = pnv_pec_realize;
 284     device_class_set_props(dc, pnv_pec_properties);
 285     dc->user_creatable = false;
 286
 287     pecc->xscom_nest_base = pnv_pec_xscom_nest_base;
 288     pecc->xscom_pci_base  = pnv_pec_xscom_pci_base;
 289     pecc->xscom_nest_size = PNV9_XSCOM_PEC_NEST_SIZE;
 290     pecc->xscom_pci_size  = PNV9_XSCOM_PEC_PCI_SIZE;
 291     pecc->compat = compat;
 292     pecc->compat_size = sizeof(compat);
 293     pecc->stk_compat = stk_compat;
 294     pecc->stk_compat_size = sizeof(stk_compat);
 295     pecc->version = PNV_PHB4_VERSION;
 296     pecc->num_stacks = pnv_pec_num_stacks;
 297 }
 298
 299 static const TypeInfo pnv_pec_type_info = {
 300     .name          = TYPE_PNV_PHB4_PEC,
 301     .parent        = TYPE_DEVICE,
 302     .instance_size = sizeof(PnvPhb4PecState),
 303     .instance_init = pnv_pec_instance_init,
 304     .class_init    = pnv_pec_class_init,
 305     .class_size    = sizeof(PnvPhb4PecClass),
 306     .interfaces    = (InterfaceInfo[]) {
 307         { TYPE_PNV_XSCOM_INTERFACE },
 308         { }
 309     }
 310 };
 311
 312 static void pnv_pec_stk_realize(DeviceState *dev, Error **errp)
 313 {
 314 }
 315
 316 static Property pnv_pec_stk_properties[] = {
 317         DEFINE_PROP_UINT32("stack-no", PnvPhb4PecStack, stack_no, 0),
 318         DEFINE_PROP_LINK("pec", PnvPhb4PecStack, pec, TYPE_PNV_PHB4_PEC,
 319                          PnvPhb4PecState *),
 320         DEFINE_PROP_END_OF_LIST(),
 321 };
 322
 323 static void pnv_pec_stk_class_init(ObjectClass *klass, void *data)
 324 {
 325     DeviceClass *dc = DEVICE_CLASS(klass);
 326
 327     device_class_set_props(dc, pnv_pec_stk_properties);
 328     dc->realize = pnv_pec_stk_realize;
 329     dc->user_creatable = false;
 330
 331     /* TODO: reset regs ? */
 332 }
 333
 334 static const TypeInfo pnv_pec_stk_type_info = {
 335     .name          = TYPE_PNV_PHB4_PEC_STACK,
 336     .parent        = TYPE_DEVICE,
 337     .instance_size = sizeof(PnvPhb4PecStack),
 338     .class_init    = pnv_pec_stk_class_init,
 339     .interfaces    = (InterfaceInfo[]) {
 340         { TYPE_PNV_XSCOM_INTERFACE },
 341         { }
 342     }
 343 };
 344
 345 static void pnv_pec_register_types(void)
 346 {
 347     type_register_static(&pnv_pec_type_info);
 348     type_register_static(&pnv_pec_stk_type_info);
 349 }
 350
 351 type_init(pnv_pec_register_types);