kvm/bios/acpi-ssdt.dsl

   1 /*
   2  * Bochs/QEMU ACPI SSDT ASL definition
   3  *
   4  * Copyright (c) 2006 Fabrice Bellard
   5  * Copyright (c) 2009 SGI, Jes Sorensen <jes@sgi.com>
   6  *
   7  * This library is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU Lesser General Public
   9  * License version 2 as published by the Free Software Foundation.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  19  */
  20 DefinitionBlock (
  21     "acpi-ssdt.aml",    // Output Filename
  22     "SSDT",             // Signature
  23     0x01,               // DSDT Compliance Revision
  24     "BXPC",             // OEMID
  25     "BXSSDT",           // TABLE ID
  26     0x1                 // OEM Revision
  27     )
  28 {
  29    Scope (\_PR)
  30    {
  31         /* pointer to first element of MADT APIC structures */
  32         OperationRegion(ATPR, SystemMemory, 0x0514, 4)
  33         Field (ATPR, DwordAcc, NoLock, Preserve)
  34         {
  35                 ATP, 32
  36         }
  37
  38 #define madt_addr(nr)  Add (ATP, Multiply(nr, 8))
  39
  40 #define gen_processor(nr, name)                                             \
  41         Processor (C##name, nr, 0x0000b010, 0x06) {                       \
  42             OperationRegion (MATR, SystemMemory, madt_addr(nr), 8)          \
  43             Field (MATR, ByteAcc, NoLock, Preserve)                         \
  44             {                                                               \
  45                 MAT, 64                                                     \
  46             }                                                               \
  47             Field (MATR, ByteAcc, NoLock, Preserve)                         \
  48             {                                                               \
  49                 Offset(4),                                                  \
  50                 FLG, 1                                                      \
  51             }                                                               \
  52             Method(_MAT, 0) {                                               \
  53                 Return(MAT)                                                 \
  54             }                                                               \
  55             Method (_STA) {                                                 \
  56                 If (FLG) { Return(0xF) } Else { Return(0x9) }               \
  57             }                                                               \
  58         }                                                                   \
  59
  60
  61         gen_processor(0, 0)
  62         gen_processor(1, 1)
  63         gen_processor(2, 2)
  64         gen_processor(3, 3)
  65         gen_processor(4, 4)
  66         gen_processor(5, 5)
  67         gen_processor(6, 6)
  68         gen_processor(7, 7)
  69         gen_processor(8, 8)
  70         gen_processor(9, 9)
  71         gen_processor(10, A)
  72         gen_processor(11, B)
  73         gen_processor(12, C)
  74         gen_processor(13, D)
  75         gen_processor(14, E)
  76
  77         Method (NTFY, 2) {
  78 #define gen_ntfy(nr)                                        \
  79         If (LEqual(Arg0, 0x##nr)) {                         \
  80                 If (LNotEqual(Arg1, \_PR.C##nr.FLG)) {      \
  81                         Store (Arg1, \_PR.C##nr.FLG)        \
  82                         If (LEqual(Arg1, 1)) {              \
  83                                 Notify(C##nr, 1)            \
  84                         } Else {                            \
  85                                 Notify(C##nr, 3)            \
  86                         }                                   \
  87                 }                                           \
  88         }
  89                 gen_ntfy(0)
  90                 gen_ntfy(1)
  91                 gen_ntfy(2)
  92                 gen_ntfy(3)
  93                 gen_ntfy(4)
  94                 gen_ntfy(5)
  95                 gen_ntfy(6)
  96                 gen_ntfy(7)
  97                 gen_ntfy(8)
  98                 gen_ntfy(9)
  99                 gen_ntfy(A)
 100                 gen_ntfy(B)
 101                 gen_ntfy(C)
 102                 gen_ntfy(D)
 103                 gen_ntfy(E)
 104                 Return(One)
 105         }
 106
 107         OperationRegion(PRST, SystemIO, 0xaf00, 32)
 108         Field (PRST, ByteAcc, NoLock, Preserve)
 109         {
 110                 PRS, 256
 111         }
 112
 113         Method(PRSC, 0) {
 114                 Store(PRS, Local3)
 115                 Store(Zero, Local0)
 116                 While(LLess(Local0, 32)) {
 117                         Store(Zero, Local1)
 118                         Store(DerefOf(Index(Local3, Local0)), Local2)
 119                         While(LLess(Local1, 8)) {
 120                                 NTFY(Add(Multiply(Local0, 8), Local1),
 121                                                 And(Local2, 1))
 122                                 ShiftRight(Local2, 1, Local2)
 123                                 Increment(Local1)
 124                         }
 125                         Increment(Local0)
 126                 }
 127                 Return(One)
 128         }
 129     }
 130
 131     /*
 132      * Add the missing _L02 method for CPU notification
 133      */
 134     Scope (\_GPE)
 135     {
 136         Method(_L02) {
 137             Return(\_PR.PRSC())
 138         }
 139     }
 140 }