tests/test-i386.c

   1 /*
   2  *  x86 CPU test
   3  *
   4  *  Copyright (c) 2003 Fabrice Bellard
   5  *
   6  *  This program is free software; you can redistribute it and/or modify
   7  *  it under the terms of the GNU General Public License as published by
   8  *  the Free Software Foundation; either version 2 of the License, or
   9  *  (at your option) any later version.
  10  *
  11  *  This program is distributed in the hope that it will be useful,
  12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *  GNU General Public License for more details.
  15  *
  16  *  You should have received a copy of the GNU General Public License
  17  *  along with this program; if not, write to the Free Software
  18  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19  */
  20 #define _GNU_SOURCE
  21 #include <stdlib.h>
  22 #include <stdio.h>
  23 #include <string.h>
  24 #include <inttypes.h>
  25 #include <math.h>
  26 #include <signal.h>
  27 #include <setjmp.h>
  28 #include <errno.h>
  29 #include <sys/ucontext.h>
  30 #include <sys/mman.h>
  31
  32 #if !defined(__x86_64__)
  33 #define TEST_VM86
  34 #define TEST_SEGS
  35 #endif
  36 //#define LINUX_VM86_IOPL_FIX
  37 //#define TEST_P4_FLAGS
  38 #if defined(__x86_64__)
  39 #define TEST_SSE
  40 #define TEST_CMOV  1
  41 #define TEST_FCOMI 1
  42 #else
  43 //#define TEST_SSE
  44 #define TEST_CMOV  0
  45 #define TEST_FCOMI 0
  46 #endif
  47
  48 #if defined(__x86_64__)
  49 #define FMT64X "%016lx"
  50 #define FMTLX "%016lx"
  51 #define X86_64_ONLY(x) x
  52 #else
  53 #define FMT64X "%016" PRIx64
  54 #define FMTLX "%08lx"
  55 #define X86_64_ONLY(x)
  56 #endif
  57
  58 #ifdef TEST_VM86
  59 #include <asm/vm86.h>
  60 #endif
  61
  62 #define xglue(x, y) x ## y
  63 #define glue(x, y) xglue(x, y)
  64 #define stringify(s)    tostring(s)
  65 #define tostring(s)     #s
  66
  67 #define CC_C    0x0001
  68 #define CC_P    0x0004
  69 #define CC_A    0x0010
  70 #define CC_Z    0x0040
  71 #define CC_S    0x0080
  72 #define CC_O    0x0800
  73
  74 #define __init_call     __attribute__ ((unused,__section__ ("initcall")))
  75
  76 #define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A)
  77
  78 #if defined(__x86_64__)
  79 static inline long i2l(long v)
  80 {
  81     return v | ((v ^ 0xabcd) << 32);
  82 }
  83 #else
  84 static inline long i2l(long v)
  85 {
  86     return v;
  87 }
  88 #endif
  89
  90 #define OP add
  91 #include "test-i386.h"
  92
  93 #define OP sub
  94 #include "test-i386.h"
  95
  96 #define OP xor
  97 #include "test-i386.h"
  98
  99 #define OP and
 100 #include "test-i386.h"
 101
 102 #define OP or
 103 #include "test-i386.h"
 104
 105 #define OP cmp
 106 #include "test-i386.h"
 107
 108 #define OP adc
 109 #define OP_CC
 110 #include "test-i386.h"
 111
 112 #define OP sbb
 113 #define OP_CC
 114 #include "test-i386.h"
 115
 116 #define OP inc
 117 #define OP_CC
 118 #define OP1
 119 #include "test-i386.h"
 120
 121 #define OP dec
 122 #define OP_CC
 123 #define OP1
 124 #include "test-i386.h"
 125
 126 #define OP neg
 127 #define OP_CC
 128 #define OP1
 129 #include "test-i386.h"
 130
 131 #define OP not
 132 #define OP_CC
 133 #define OP1
 134 #include "test-i386.h"
 135
 136 #undef CC_MASK
 137 #define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O)
 138
 139 #define OP shl
 140 #include "test-i386-shift.h"
 141
 142 #define OP shr
 143 #include "test-i386-shift.h"
 144
 145 #define OP sar
 146 #include "test-i386-shift.h"
 147
 148 #define OP rol
 149 #include "test-i386-shift.h"
 150
 151 #define OP ror
 152 #include "test-i386-shift.h"
 153
 154 #define OP rcr
 155 #define OP_CC
 156 #include "test-i386-shift.h"
 157
 158 #define OP rcl
 159 #define OP_CC
 160 #include "test-i386-shift.h"
 161
 162 #define OP shld
 163 #define OP_SHIFTD
 164 #define OP_NOBYTE
 165 #include "test-i386-shift.h"
 166
 167 #define OP shrd
 168 #define OP_SHIFTD
 169 #define OP_NOBYTE
 170 #include "test-i386-shift.h"
 171
 172 /* XXX: should be more precise ? */
 173 #undef CC_MASK
 174 #define CC_MASK (CC_C)
 175
 176 #define OP bt
 177 #define OP_NOBYTE
 178 #include "test-i386-shift.h"
 179
 180 #define OP bts
 181 #define OP_NOBYTE
 182 #include "test-i386-shift.h"
 183
 184 #define OP btr
 185 #define OP_NOBYTE
 186 #include "test-i386-shift.h"
 187
 188 #define OP btc
 189 #define OP_NOBYTE
 190 #include "test-i386-shift.h"
 191
 192 /* lea test (modrm support) */
 193 #define TEST_LEAQ(STR)\
 194 {\
 195     asm("lea " STR ", %0"\
 196         : "=r" (res)\
 197         : "a" (eax), "b" (ebx), "c" (ecx), "d" (edx), "S" (esi), "D" (edi));\
 198     printf("lea %s = " FMTLX "\n", STR, res);\
 199 }
 200
 201 #define TEST_LEA(STR)\
 202 {\
 203     asm("lea " STR ", %0"\
 204         : "=r" (res)\
 205         : "a" (eax), "b" (ebx), "c" (ecx), "d" (edx), "S" (esi), "D" (edi));\
 206     printf("lea %s = " FMTLX "\n", STR, res);\
 207 }
 208
 209 #define TEST_LEA16(STR)\
 210 {\
 211     asm(".code16 ; .byte 0x67 ; leal " STR ", %0 ; .code32"\
 212         : "=wq" (res)\
 213         : "a" (eax), "b" (ebx), "c" (ecx), "d" (edx), "S" (esi), "D" (edi));\
 214     printf("lea %s = %08lx\n", STR, res);\
 215 }
 216
 217
 218 void test_lea(void)
 219 {
 220     long eax, ebx, ecx, edx, esi, edi, res;
 221     eax = i2l(0x0001);
 222     ebx = i2l(0x0002);
 223     ecx = i2l(0x0004);
 224     edx = i2l(0x0008);
 225     esi = i2l(0x0010);
 226     edi = i2l(0x0020);
 227
 228     TEST_LEA("0x4000");
 229
 230     TEST_LEA("(%%eax)");
 231     TEST_LEA("(%%ebx)");
 232     TEST_LEA("(%%ecx)");
 233     TEST_LEA("(%%edx)");
 234     TEST_LEA("(%%esi)");
 235     TEST_LEA("(%%edi)");
 236
 237     TEST_LEA("0x40(%%eax)");
 238     TEST_LEA("0x40(%%ebx)");
 239     TEST_LEA("0x40(%%ecx)");
 240     TEST_LEA("0x40(%%edx)");
 241     TEST_LEA("0x40(%%esi)");
 242     TEST_LEA("0x40(%%edi)");
 243
 244     TEST_LEA("0x4000(%%eax)");
 245     TEST_LEA("0x4000(%%ebx)");
 246     TEST_LEA("0x4000(%%ecx)");
 247     TEST_LEA("0x4000(%%edx)");
 248     TEST_LEA("0x4000(%%esi)");
 249     TEST_LEA("0x4000(%%edi)");
 250
 251     TEST_LEA("(%%eax, %%ecx)");
 252     TEST_LEA("(%%ebx, %%edx)");
 253     TEST_LEA("(%%ecx, %%ecx)");
 254     TEST_LEA("(%%edx, %%ecx)");
 255     TEST_LEA("(%%esi, %%ecx)");
 256     TEST_LEA("(%%edi, %%ecx)");
 257
 258     TEST_LEA("0x40(%%eax, %%ecx)");
 259     TEST_LEA("0x4000(%%ebx, %%edx)");
 260
 261     TEST_LEA("(%%ecx, %%ecx, 2)");
 262     TEST_LEA("(%%edx, %%ecx, 4)");
 263     TEST_LEA("(%%esi, %%ecx, 8)");
 264
 265     TEST_LEA("(,%%eax, 2)");
 266     TEST_LEA("(,%%ebx, 4)");
 267     TEST_LEA("(,%%ecx, 8)");
 268
 269     TEST_LEA("0x40(,%%eax, 2)");
 270     TEST_LEA("0x40(,%%ebx, 4)");
 271     TEST_LEA("0x40(,%%ecx, 8)");
 272
 273
 274     TEST_LEA("-10(%%ecx, %%ecx, 2)");
 275     TEST_LEA("-10(%%edx, %%ecx, 4)");
 276     TEST_LEA("-10(%%esi, %%ecx, 8)");
 277
 278     TEST_LEA("0x4000(%%ecx, %%ecx, 2)");
 279     TEST_LEA("0x4000(%%edx, %%ecx, 4)");
 280     TEST_LEA("0x4000(%%esi, %%ecx, 8)");
 281
 282 #if defined(__x86_64__)
 283     TEST_LEAQ("0x4000");
 284     TEST_LEAQ("0x4000(%%rip)");
 285
 286     TEST_LEAQ("(%%rax)");
 287     TEST_LEAQ("(%%rbx)");
 288     TEST_LEAQ("(%%rcx)");
 289     TEST_LEAQ("(%%rdx)");
 290     TEST_LEAQ("(%%rsi)");
 291     TEST_LEAQ("(%%rdi)");
 292
 293     TEST_LEAQ("0x40(%%rax)");
 294     TEST_LEAQ("0x40(%%rbx)");
 295     TEST_LEAQ("0x40(%%rcx)");
 296     TEST_LEAQ("0x40(%%rdx)");
 297     TEST_LEAQ("0x40(%%rsi)");
 298     TEST_LEAQ("0x40(%%rdi)");
 299
 300     TEST_LEAQ("0x4000(%%rax)");
 301     TEST_LEAQ("0x4000(%%rbx)");
 302     TEST_LEAQ("0x4000(%%rcx)");
 303     TEST_LEAQ("0x4000(%%rdx)");
 304     TEST_LEAQ("0x4000(%%rsi)");
 305     TEST_LEAQ("0x4000(%%rdi)");
 306
 307     TEST_LEAQ("(%%rax, %%rcx)");
 308     TEST_LEAQ("(%%rbx, %%rdx)");
 309     TEST_LEAQ("(%%rcx, %%rcx)");
 310     TEST_LEAQ("(%%rdx, %%rcx)");
 311     TEST_LEAQ("(%%rsi, %%rcx)");
 312     TEST_LEAQ("(%%rdi, %%rcx)");
 313
 314     TEST_LEAQ("0x40(%%rax, %%rcx)");
 315     TEST_LEAQ("0x4000(%%rbx, %%rdx)");
 316
 317     TEST_LEAQ("(%%rcx, %%rcx, 2)");
 318     TEST_LEAQ("(%%rdx, %%rcx, 4)");
 319     TEST_LEAQ("(%%rsi, %%rcx, 8)");
 320
 321     TEST_LEAQ("(,%%rax, 2)");
 322     TEST_LEAQ("(,%%rbx, 4)");
 323     TEST_LEAQ("(,%%rcx, 8)");
 324
 325     TEST_LEAQ("0x40(,%%rax, 2)");
 326     TEST_LEAQ("0x40(,%%rbx, 4)");
 327     TEST_LEAQ("0x40(,%%rcx, 8)");
 328
 329
 330     TEST_LEAQ("-10(%%rcx, %%rcx, 2)");
 331     TEST_LEAQ("-10(%%rdx, %%rcx, 4)");
 332     TEST_LEAQ("-10(%%rsi, %%rcx, 8)");
 333
 334     TEST_LEAQ("0x4000(%%rcx, %%rcx, 2)");
 335     TEST_LEAQ("0x4000(%%rdx, %%rcx, 4)");
 336     TEST_LEAQ("0x4000(%%rsi, %%rcx, 8)");
 337 #else
 338     /* limited 16 bit addressing test */
 339     TEST_LEA16("0x4000");
 340     TEST_LEA16("(%%bx)");
 341     TEST_LEA16("(%%si)");
 342     TEST_LEA16("(%%di)");
 343     TEST_LEA16("0x40(%%bx)");
 344     TEST_LEA16("0x40(%%si)");
 345     TEST_LEA16("0x40(%%di)");
 346     TEST_LEA16("0x4000(%%bx)");
 347     TEST_LEA16("0x4000(%%si)");
 348     TEST_LEA16("(%%bx,%%si)");
 349     TEST_LEA16("(%%bx,%%di)");
 350     TEST_LEA16("0x40(%%bx,%%si)");
 351     TEST_LEA16("0x40(%%bx,%%di)");
 352     TEST_LEA16("0x4000(%%bx,%%si)");
 353     TEST_LEA16("0x4000(%%bx,%%di)");
 354 #endif
 355 }
 356
 357 #define TEST_JCC(JCC, v1, v2)\
 358 {\
 359     int res;\
 360     asm("movl $1, %0\n\t"\
 361         "cmpl %2, %1\n\t"\
 362         "j" JCC " 1f\n\t"\
 363         "movl $0, %0\n\t"\
 364         "1:\n\t"\
 365         : "=r" (res)\
 366         : "r" (v1), "r" (v2));\
 367     printf("%-10s %d\n", "j" JCC, res);\
 368 \
 369     asm("movl $0, %0\n\t"\
 370         "cmpl %2, %1\n\t"\
 371         "set" JCC " %b0\n\t"\
 372         : "=r" (res)\
 373         : "r" (v1), "r" (v2));\
 374     printf("%-10s %d\n", "set" JCC, res);\
 375  if (TEST_CMOV) {\
 376     long val = i2l(1);\
 377     long res = i2l(0x12345678);\
 378 X86_64_ONLY(\
 379     asm("cmpl %2, %1\n\t"\
 380         "cmov" JCC "q %3, %0\n\t"\
 381         : "=r" (res)\
 382         : "r" (v1), "r" (v2), "m" (val), "0" (res));\
 383         printf("%-10s R=" FMTLX "\n", "cmov" JCC "q", res);)\
 384     asm("cmpl %2, %1\n\t"\
 385         "cmov" JCC "l %k3, %k0\n\t"\
 386         : "=r" (res)\
 387         : "r" (v1), "r" (v2), "m" (val), "0" (res));\
 388         printf("%-10s R=" FMTLX "\n", "cmov" JCC "l", res);\
 389     asm("cmpl %2, %1\n\t"\
 390         "cmov" JCC "w %w3, %w0\n\t"\
 391         : "=r" (res)\
 392         : "r" (v1), "r" (v2), "r" (1), "0" (res));\
 393         printf("%-10s R=" FMTLX "\n", "cmov" JCC "w", res);\
 394  } \
 395 }
 396
 397 /* various jump tests */
 398 void test_jcc(void)
 399 {
 400     TEST_JCC("ne", 1, 1);
 401     TEST_JCC("ne", 1, 0);
 402
 403     TEST_JCC("e", 1, 1);
 404     TEST_JCC("e", 1, 0);
 405
 406     TEST_JCC("l", 1, 1);
 407     TEST_JCC("l", 1, 0);
 408     TEST_JCC("l", 1, -1);
 409
 410     TEST_JCC("le", 1, 1);
 411     TEST_JCC("le", 1, 0);
 412     TEST_JCC("le", 1, -1);
 413
 414     TEST_JCC("ge", 1, 1);
 415     TEST_JCC("ge", 1, 0);
 416     TEST_JCC("ge", -1, 1);
 417
 418     TEST_JCC("g", 1, 1);
 419     TEST_JCC("g", 1, 0);
 420     TEST_JCC("g", 1, -1);
 421
 422     TEST_JCC("b", 1, 1);
 423     TEST_JCC("b", 1, 0);
 424     TEST_JCC("b", 1, -1);
 425
 426     TEST_JCC("be", 1, 1);
 427     TEST_JCC("be", 1, 0);
 428     TEST_JCC("be", 1, -1);
 429
 430     TEST_JCC("ae", 1, 1);
 431     TEST_JCC("ae", 1, 0);
 432     TEST_JCC("ae", 1, -1);
 433
 434     TEST_JCC("a", 1, 1);
 435     TEST_JCC("a", 1, 0);
 436     TEST_JCC("a", 1, -1);
 437
 438
 439     TEST_JCC("p", 1, 1);
 440     TEST_JCC("p", 1, 0);
 441
 442     TEST_JCC("np", 1, 1);
 443     TEST_JCC("np", 1, 0);
 444
 445     TEST_JCC("o", 0x7fffffff, 0);
 446     TEST_JCC("o", 0x7fffffff, -1);
 447
 448     TEST_JCC("no", 0x7fffffff, 0);
 449     TEST_JCC("no", 0x7fffffff, -1);
 450
 451     TEST_JCC("s", 0, 1);
 452     TEST_JCC("s", 0, -1);
 453     TEST_JCC("s", 0, 0);
 454
 455     TEST_JCC("ns", 0, 1);
 456     TEST_JCC("ns", 0, -1);
 457     TEST_JCC("ns", 0, 0);
 458 }
 459
 460 #undef CC_MASK
 461 #ifdef TEST_P4_FLAGS
 462 #define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A)
 463 #else
 464 #define CC_MASK (CC_O | CC_C)
 465 #endif
 466
 467 #define OP mul
 468 #include "test-i386-muldiv.h"
 469
 470 #define OP imul
 471 #include "test-i386-muldiv.h"
 472
 473 void test_imulw2(long op0, long op1)
 474 {
 475     long res, s1, s0, flags;
 476     s0 = op0;
 477     s1 = op1;
 478     res = s0;
 479     flags = 0;
 480     asm volatile ("push %4\n\t"
 481          "popf\n\t"
 482          "imulw %w2, %w0\n\t"
 483          "pushf\n\t"
 484          "pop %1\n\t"
 485          : "=q" (res), "=g" (flags)
 486          : "q" (s1), "0" (res), "1" (flags));
 487     printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CC=%04lx\n",
 488            "imulw", s0, s1, res, flags & CC_MASK);
 489 }
 490
 491 void test_imull2(long op0, long op1)
 492 {
 493     long res, s1, s0, flags;
 494     s0 = op0;
 495     s1 = op1;
 496     res = s0;
 497     flags = 0;
 498     asm volatile ("push %4\n\t"
 499          "popf\n\t"
 500          "imull %k2, %k0\n\t"
 501          "pushf\n\t"
 502          "pop %1\n\t"
 503          : "=q" (res), "=g" (flags)
 504          : "q" (s1), "0" (res), "1" (flags));
 505     printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CC=%04lx\n",
 506            "imull", s0, s1, res, flags & CC_MASK);
 507 }
 508
 509 #if defined(__x86_64__)
 510 void test_imulq2(long op0, long op1)
 511 {
 512     long res, s1, s0, flags;
 513     s0 = op0;
 514     s1 = op1;
 515     res = s0;
 516     flags = 0;
 517     asm volatile ("push %4\n\t"
 518          "popf\n\t"
 519          "imulq %2, %0\n\t"
 520          "pushf\n\t"
 521          "pop %1\n\t"
 522          : "=q" (res), "=g" (flags)
 523          : "q" (s1), "0" (res), "1" (flags));
 524     printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CC=%04lx\n",
 525            "imulq", s0, s1, res, flags & CC_MASK);
 526 }
 527 #endif
 528
 529 #define TEST_IMUL_IM(size, rsize, op0, op1)\
 530 {\
 531     long res, flags, s1;\
 532     flags = 0;\
 533     res = 0;\
 534     s1 = op1;\
 535     asm volatile ("push %3\n\t"\
 536          "popf\n\t"\
 537          "imul" size " $" #op0 ", %" rsize "2, %" rsize "0\n\t" \
 538          "pushf\n\t"\
 539          "pop %1\n\t"\
 540          : "=r" (res), "=g" (flags)\
 541          : "r" (s1), "1" (flags), "0" (res));\
 542     printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CC=%04lx\n",\
 543            "imul" size " im", (long)op0, (long)op1, res, flags & CC_MASK);\
 544 }
 545
 546
 547 #undef CC_MASK
 548 #define CC_MASK (0)
 549
 550 #define OP div
 551 #include "test-i386-muldiv.h"
 552
 553 #define OP idiv
 554 #include "test-i386-muldiv.h"
 555
 556 void test_mul(void)
 557 {
 558     test_imulb(0x1234561d, 4);
 559     test_imulb(3, -4);
 560     test_imulb(0x80, 0x80);
 561     test_imulb(0x10, 0x10);
 562
 563     test_imulw(0, 0x1234001d, 45);
 564     test_imulw(0, 23, -45);
 565     test_imulw(0, 0x8000, 0x8000);
 566     test_imulw(0, 0x100, 0x100);
 567
 568     test_imull(0, 0x1234001d, 45);
 569     test_imull(0, 23, -45);
 570     test_imull(0, 0x80000000, 0x80000000);
 571     test_imull(0, 0x10000, 0x10000);
 572
 573     test_mulb(0x1234561d, 4);
 574     test_mulb(3, -4);
 575     test_mulb(0x80, 0x80);
 576     test_mulb(0x10, 0x10);
 577
 578     test_mulw(0, 0x1234001d, 45);
 579     test_mulw(0, 23, -45);
 580     test_mulw(0, 0x8000, 0x8000);
 581     test_mulw(0, 0x100, 0x100);
 582
 583     test_mull(0, 0x1234001d, 45);
 584     test_mull(0, 23, -45);
 585     test_mull(0, 0x80000000, 0x80000000);
 586     test_mull(0, 0x10000, 0x10000);
 587
 588     test_imulw2(0x1234001d, 45);
 589     test_imulw2(23, -45);
 590     test_imulw2(0x8000, 0x8000);
 591     test_imulw2(0x100, 0x100);
 592
 593     test_imull2(0x1234001d, 45);
 594     test_imull2(23, -45);
 595     test_imull2(0x80000000, 0x80000000);
 596     test_imull2(0x10000, 0x10000);
 597
 598     TEST_IMUL_IM("w", "w", 45, 0x1234);
 599     TEST_IMUL_IM("w", "w", -45, 23);
 600     TEST_IMUL_IM("w", "w", 0x8000, 0x80000000);
 601     TEST_IMUL_IM("w", "w", 0x7fff, 0x1000);
 602
 603     TEST_IMUL_IM("l", "k", 45, 0x1234);
 604     TEST_IMUL_IM("l", "k", -45, 23);
 605     TEST_IMUL_IM("l", "k", 0x8000, 0x80000000);
 606     TEST_IMUL_IM("l", "k", 0x7fff, 0x1000);
 607
 608     test_idivb(0x12341678, 0x127e);
 609     test_idivb(0x43210123, -5);
 610     test_idivb(0x12340004, -1);
 611
 612     test_idivw(0, 0x12345678, 12347);
 613     test_idivw(0, -23223, -45);
 614     test_idivw(0, 0x12348000, -1);
 615     test_idivw(0x12343, 0x12345678, 0x81238567);
 616
 617     test_idivl(0, 0x12345678, 12347);
 618     test_idivl(0, -233223, -45);
 619     test_idivl(0, 0x80000000, -1);
 620     test_idivl(0x12343, 0x12345678, 0x81234567);
 621
 622     test_divb(0x12341678, 0x127e);
 623     test_divb(0x43210123, -5);
 624     test_divb(0x12340004, -1);
 625
 626     test_divw(0, 0x12345678, 12347);
 627     test_divw(0, -23223, -45);
 628     test_divw(0, 0x12348000, -1);
 629     test_divw(0x12343, 0x12345678, 0x81238567);
 630
 631     test_divl(0, 0x12345678, 12347);
 632     test_divl(0, -233223, -45);
 633     test_divl(0, 0x80000000, -1);
 634     test_divl(0x12343, 0x12345678, 0x81234567);
 635
 636 #if defined(__x86_64__)
 637     test_imulq(0, 0x1234001d1234001d, 45);
 638     test_imulq(0, 23, -45);
 639     test_imulq(0, 0x8000000000000000, 0x8000000000000000);
 640     test_imulq(0, 0x100000000, 0x100000000);
 641
 642     test_mulq(0, 0x1234001d1234001d, 45);
 643     test_mulq(0, 23, -45);
 644     test_mulq(0, 0x8000000000000000, 0x8000000000000000);
 645     test_mulq(0, 0x100000000, 0x100000000);
 646
 647     test_imulq2(0x1234001d1234001d, 45);
 648     test_imulq2(23, -45);
 649     test_imulq2(0x8000000000000000, 0x8000000000000000);
 650     test_imulq2(0x100000000, 0x100000000);
 651
 652     TEST_IMUL_IM("q", "", 45, 0x12341234);
 653     TEST_IMUL_IM("q", "", -45, 23);
 654     TEST_IMUL_IM("q", "", 0x8000, 0x8000000000000000);
 655     TEST_IMUL_IM("q", "", 0x7fff, 0x10000000);
 656
 657     test_idivq(0, 0x12345678abcdef, 12347);
 658     test_idivq(0, -233223, -45);
 659     test_idivq(0, 0x8000000000000000, -1);
 660     test_idivq(0x12343, 0x12345678, 0x81234567);
 661
 662     test_divq(0, 0x12345678abcdef, 12347);
 663     test_divq(0, -233223, -45);
 664     test_divq(0, 0x8000000000000000, -1);
 665     test_divq(0x12343, 0x12345678, 0x81234567);
 666 #endif
 667 }
 668
 669 #define TEST_BSX(op, size, op0)\
 670 {\
 671     long res, val, resz;\
 672     val = op0;\
 673     asm("xor %1, %1\n"\
 674         "mov $0x12345678, %0\n"\
 675         #op " %" size "2, %" size "0 ; setz %b1" \
 676         : "=r" (res), "=q" (resz)\
 677         : "g" (val));\
 678     printf("%-10s A=" FMTLX " R=" FMTLX " %ld\n", #op, val, res, resz);\
 679 }
 680
 681 void test_bsx(void)
 682 {
 683     TEST_BSX(bsrw, "w", 0);
 684     TEST_BSX(bsrw, "w", 0x12340128);
 685     TEST_BSX(bsfw, "w", 0);
 686     TEST_BSX(bsfw, "w", 0x12340128);
 687     TEST_BSX(bsrl, "k", 0);
 688     TEST_BSX(bsrl, "k", 0x00340128);
 689     TEST_BSX(bsfl, "k", 0);
 690     TEST_BSX(bsfl, "k", 0x00340128);
 691 #if defined(__x86_64__)
 692     TEST_BSX(bsrq, "", 0);
 693     TEST_BSX(bsrq, "", 0x003401281234);
 694     TEST_BSX(bsfq, "", 0);
 695     TEST_BSX(bsfq, "", 0x003401281234);
 696 #endif
 697 }
 698
 699 /**********************************************/
 700
 701 union float64u {
 702     double d;
 703     uint64_t l;
 704 };
 705
 706 union float64u q_nan = { .l = 0xFFF8000000000000LL };
 707 union float64u s_nan = { .l = 0xFFF0000000000000LL };
 708
 709 void test_fops(double a, double b)
 710 {
 711     printf("a=%f b=%f a+b=%f\n", a, b, a + b);
 712     printf("a=%f b=%f a-b=%f\n", a, b, a - b);
 713     printf("a=%f b=%f a*b=%f\n", a, b, a * b);
 714     printf("a=%f b=%f a/b=%f\n", a, b, a / b);
 715     printf("a=%f b=%f fmod(a, b)=%f\n", a, b, fmod(a, b));
 716     printf("a=%f sqrt(a)=%f\n", a, sqrt(a));
 717     printf("a=%f sin(a)=%f\n", a, sin(a));
 718     printf("a=%f cos(a)=%f\n", a, cos(a));
 719     printf("a=%f tan(a)=%f\n", a, tan(a));
 720     printf("a=%f log(a)=%f\n", a, log(a));
 721     printf("a=%f exp(a)=%f\n", a, exp(a));
 722     printf("a=%f b=%f atan2(a, b)=%f\n", a, b, atan2(a, b));
 723     /* just to test some op combining */
 724     printf("a=%f asin(sin(a))=%f\n", a, asin(sin(a)));
 725     printf("a=%f acos(cos(a))=%f\n", a, acos(cos(a)));
 726     printf("a=%f atan(tan(a))=%f\n", a, atan(tan(a)));
 727
 728 }
 729
 730 void fpu_clear_exceptions(void)
 731 {
 732     struct __attribute__((packed)) {
 733         uint16_t fpuc;
 734         uint16_t dummy1;
 735         uint16_t fpus;
 736         uint16_t dummy2;
 737         uint16_t fptag;
 738         uint16_t dummy3;
 739         uint32_t ignored[4];
 740         long double fpregs[8];
 741     } float_env32;
 742
 743     asm volatile ("fnstenv %0\n" : : "m" (float_env32));
 744     float_env32.fpus &= ~0x7f;
 745     asm volatile ("fldenv %0\n" : : "m" (float_env32));
 746 }
 747
 748 /* XXX: display exception bits when supported */
 749 #define FPUS_EMASK 0x0000
 750 //#define FPUS_EMASK 0x007f
 751
 752 void test_fcmp(double a, double b)
 753 {
 754     long eflags, fpus;
 755
 756     fpu_clear_exceptions();
 757     asm("fcom %2\n"
 758         "fstsw %%ax\n"
 759         : "=a" (fpus)
 760         : "t" (a), "u" (b));
 761     printf("fcom(%f %f)=%04lx \n",
 762            a, b, fpus & (0x4500 | FPUS_EMASK));
 763     fpu_clear_exceptions();
 764     asm("fucom %2\n"
 765         "fstsw %%ax\n"
 766         : "=a" (fpus)
 767         : "t" (a), "u" (b));
 768     printf("fucom(%f %f)=%04lx\n",
 769            a, b, fpus & (0x4500 | FPUS_EMASK));
 770     if (TEST_FCOMI) {
 771         /* test f(u)comi instruction */
 772         fpu_clear_exceptions();
 773         asm("fcomi %3, %2\n"
 774             "fstsw %%ax\n"
 775             "pushf\n"
 776             "pop %0\n"
 777             : "=r" (eflags), "=a" (fpus)
 778             : "t" (a), "u" (b));
 779         printf("fcomi(%f %f)=%04lx %02lx\n",
 780                a, b, fpus & FPUS_EMASK, eflags & (CC_Z | CC_P | CC_C));
 781         fpu_clear_exceptions();
 782         asm("fucomi %3, %2\n"
 783             "fstsw %%ax\n"
 784             "pushf\n"
 785             "pop %0\n"
 786             : "=r" (eflags), "=a" (fpus)
 787             : "t" (a), "u" (b));
 788         printf("fucomi(%f %f)=%04lx %02lx\n",
 789                a, b, fpus & FPUS_EMASK, eflags & (CC_Z | CC_P | CC_C));
 790     }
 791     fpu_clear_exceptions();
 792     asm volatile("fxam\n"
 793                  "fstsw %%ax\n"
 794                  : "=a" (fpus)
 795                  : "t" (a));
 796     printf("fxam(%f)=%04lx\n", a, fpus & 0x4700);
 797     fpu_clear_exceptions();
 798 }
 799
 800 void test_fcvt(double a)
 801 {
 802     float fa;
 803     long double la;
 804     int16_t fpuc;
 805     int i;
 806     int64_t lla;
 807     int ia;
 808     int16_t wa;
 809     double ra;
 810
 811     fa = a;
 812     la = a;
 813     printf("(float)%f = %f\n", a, fa);
 814     printf("(long double)%f = %Lf\n", a, la);
 815     printf("a=" FMT64X "\n", *(uint64_t *)&a);
 816     printf("la=" FMT64X " %04x\n", *(uint64_t *)&la,
 817            *(unsigned short *)((char *)(&la) + 8));
 818
 819     /* test all roundings */
 820     asm volatile ("fstcw %0" : "=m" (fpuc));
 821     for(i=0;i<4;i++) {
 822         uint16_t val16;
 823         val16 = (fpuc & ~0x0c00) | (i << 10);
 824         asm volatile ("fldcw %0" : : "m" (val16));
 825         asm volatile ("fist %0" : "=m" (wa) : "t" (a));
 826         asm volatile ("fistl %0" : "=m" (ia) : "t" (a));
 827         asm volatile ("fistpll %0" : "=m" (lla) : "t" (a) : "st");
 828         asm volatile ("frndint ; fstl %0" : "=m" (ra) : "t" (a));
 829         asm volatile ("fldcw %0" : : "m" (fpuc));
 830         printf("(short)a = %d\n", wa);
 831         printf("(int)a = %d\n", ia);
 832         printf("(int64_t)a = " FMT64X "\n", lla);
 833         printf("rint(a) = %f\n", ra);
 834     }
 835 }
 836
 837 #define TEST(N) \
 838     asm("fld" #N : "=t" (a)); \
 839     printf("fld" #N "= %f\n", a);
 840
 841 void test_fconst(void)
 842 {
 843     double a;
 844     TEST(1);
 845     TEST(l2t);
 846     TEST(l2e);
 847     TEST(pi);
 848     TEST(lg2);
 849     TEST(ln2);
 850     TEST(z);
 851 }
 852
 853 void test_fbcd(double a)
 854 {
 855     unsigned short bcd[5];
 856     double b;
 857
 858     asm("fbstp %0" : "=m" (bcd[0]) : "t" (a) : "st");
 859     asm("fbld %1" : "=t" (b) : "m" (bcd[0]));
 860     printf("a=%f bcd=%04x%04x%04x%04x%04x b=%f\n",
 861            a, bcd[4], bcd[3], bcd[2], bcd[1], bcd[0], b);
 862 }
 863
 864 #define TEST_ENV(env, save, restore)\
 865 {\
 866     memset((env), 0xaa, sizeof(*(env)));\
 867     for(i=0;i<5;i++)\
 868         asm volatile ("fldl %0" : : "m" (dtab[i]));\
 869     asm volatile (save " %0\n" : : "m" (*(env)));\
 870     asm volatile (restore " %0\n": : "m" (*(env)));\
 871     for(i=0;i<5;i++)\
 872         asm volatile ("fstpl %0" : "=m" (rtab[i]));\
 873     for(i=0;i<5;i++)\
 874         printf("res[%d]=%f\n", i, rtab[i]);\
 875     printf("fpuc=%04x fpus=%04x fptag=%04x\n",\
 876            (env)->fpuc,\
 877            (env)->fpus & 0xff00,\
 878            (env)->fptag);\
 879 }
 880
 881 void test_fenv(void)
 882 {
 883     struct __attribute__((packed)) {
 884         uint16_t fpuc;
 885         uint16_t dummy1;
 886         uint16_t fpus;
 887         uint16_t dummy2;
 888         uint16_t fptag;
 889         uint16_t dummy3;
 890         uint32_t ignored[4];
 891         long double fpregs[8];
 892     } float_env32;
 893     struct __attribute__((packed)) {
 894         uint16_t fpuc;
 895         uint16_t fpus;
 896         uint16_t fptag;
 897         uint16_t ignored[4];
 898         long double fpregs[8];
 899     } float_env16;
 900     double dtab[8];
 901     double rtab[8];
 902     int i;
 903
 904     for(i=0;i<8;i++)
 905         dtab[i] = i + 1;
 906
 907     TEST_ENV(&float_env16, "data16 fnstenv", "data16 fldenv");
 908     TEST_ENV(&float_env16, "data16 fnsave", "data16 frstor");
 909     TEST_ENV(&float_env32, "fnstenv", "fldenv");
 910     TEST_ENV(&float_env32, "fnsave", "frstor");
 911
 912     /* test for ffree */
 913     for(i=0;i<5;i++)
 914         asm volatile ("fldl %0" : : "m" (dtab[i]));
 915     asm volatile("ffree %st(2)");
 916     asm volatile ("fnstenv %0\n" : : "m" (float_env32));
 917     asm volatile ("fninit");
 918     printf("fptag=%04x\n", float_env32.fptag);
 919 }
 920
 921
 922 #define TEST_FCMOV(a, b, eflags, CC)\
 923 {\
 924     double res;\
 925     asm("push %3\n"\
 926         "popf\n"\
 927         "fcmov" CC " %2, %0\n"\
 928         : "=t" (res)\
 929         : "0" (a), "u" (b), "g" (eflags));\
 930     printf("fcmov%s eflags=0x%04lx-> %f\n", \
 931            CC, (long)eflags, res);\
 932 }
 933
 934 void test_fcmov(void)
 935 {
 936     double a, b;
 937     long eflags, i;
 938
 939     a = 1.0;
 940     b = 2.0;
 941     for(i = 0; i < 4; i++) {
 942         eflags = 0;
 943         if (i & 1)
 944             eflags |= CC_C;
 945         if (i & 2)
 946             eflags |= CC_Z;
 947         TEST_FCMOV(a, b, eflags, "b");
 948         TEST_FCMOV(a, b, eflags, "e");
 949         TEST_FCMOV(a, b, eflags, "be");
 950         TEST_FCMOV(a, b, eflags, "nb");
 951         TEST_FCMOV(a, b, eflags, "ne");
 952         TEST_FCMOV(a, b, eflags, "nbe");
 953     }
 954     TEST_FCMOV(a, b, 0, "u");
 955     TEST_FCMOV(a, b, CC_P, "u");
 956     TEST_FCMOV(a, b, 0, "nu");
 957     TEST_FCMOV(a, b, CC_P, "nu");
 958 }
 959
 960 void test_floats(void)
 961 {
 962     test_fops(2, 3);
 963     test_fops(1.4, -5);
 964     test_fcmp(2, -1);
 965     test_fcmp(2, 2);
 966     test_fcmp(2, 3);
 967     test_fcmp(2, q_nan.d);
 968     test_fcmp(q_nan.d, -1);
 969     test_fcmp(-1.0/0.0, -1);
 970     test_fcmp(1.0/0.0, -1);
 971     test_fcvt(0.5);
 972     test_fcvt(-0.5);
 973     test_fcvt(1.0/7.0);
 974     test_fcvt(-1.0/9.0);
 975     test_fcvt(32768);
 976     test_fcvt(-1e20);
 977     test_fcvt(-1.0/0.0);
 978     test_fcvt(1.0/0.0);
 979     test_fcvt(q_nan.d);
 980     test_fconst();
 981     test_fbcd(1234567890123456.0);
 982     test_fbcd(-123451234567890.0);
 983     test_fenv();
 984     if (TEST_CMOV) {
 985         test_fcmov();
 986     }
 987 }
 988
 989 /**********************************************/
 990 #if !defined(__x86_64__)
 991
 992 #define TEST_BCD(op, op0, cc_in, cc_mask)\
 993 {\
 994     int res, flags;\
 995     res = op0;\
 996     flags = cc_in;\
 997     asm ("push %3\n\t"\
 998          "popf\n\t"\
 999          #op "\n\t"\
1000          "pushf\n\t"\
1001          "pop %1\n\t"\
1002         : "=a" (res), "=g" (flags)\
1003         : "0" (res), "1" (flags));\
1004     printf("%-10s A=%08x R=%08x CCIN=%04x CC=%04x\n",\
1005            #op, op0, res, cc_in, flags & cc_mask);\
1006 }
1007
1008 void test_bcd(void)
1009 {
1010     TEST_BCD(daa, 0x12340503, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1011     TEST_BCD(daa, 0x12340506, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1012     TEST_BCD(daa, 0x12340507, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1013     TEST_BCD(daa, 0x12340559, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1014     TEST_BCD(daa, 0x12340560, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1015     TEST_BCD(daa, 0x1234059f, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1016     TEST_BCD(daa, 0x123405a0, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1017     TEST_BCD(daa, 0x12340503, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1018     TEST_BCD(daa, 0x12340506, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1019     TEST_BCD(daa, 0x12340503, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1020     TEST_BCD(daa, 0x12340506, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1021     TEST_BCD(daa, 0x12340503, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1022     TEST_BCD(daa, 0x12340506, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1023
1024     TEST_BCD(das, 0x12340503, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1025     TEST_BCD(das, 0x12340506, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1026     TEST_BCD(das, 0x12340507, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1027     TEST_BCD(das, 0x12340559, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1028     TEST_BCD(das, 0x12340560, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1029     TEST_BCD(das, 0x1234059f, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1030     TEST_BCD(das, 0x123405a0, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1031     TEST_BCD(das, 0x12340503, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1032     TEST_BCD(das, 0x12340506, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1033     TEST_BCD(das, 0x12340503, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1034     TEST_BCD(das, 0x12340506, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1035     TEST_BCD(das, 0x12340503, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1036     TEST_BCD(das, 0x12340506, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1037
1038     TEST_BCD(aaa, 0x12340205, CC_A, (CC_C | CC_A));
1039     TEST_BCD(aaa, 0x12340306, CC_A, (CC_C | CC_A));
1040     TEST_BCD(aaa, 0x1234040a, CC_A, (CC_C | CC_A));
1041     TEST_BCD(aaa, 0x123405fa, CC_A, (CC_C | CC_A));
1042     TEST_BCD(aaa, 0x12340205, 0, (CC_C | CC_A));
1043     TEST_BCD(aaa, 0x12340306, 0, (CC_C | CC_A));
1044     TEST_BCD(aaa, 0x1234040a, 0, (CC_C | CC_A));
1045     TEST_BCD(aaa, 0x123405fa, 0, (CC_C | CC_A));
1046
1047     TEST_BCD(aas, 0x12340205, CC_A, (CC_C | CC_A));
1048     TEST_BCD(aas, 0x12340306, CC_A, (CC_C | CC_A));
1049     TEST_BCD(aas, 0x1234040a, CC_A, (CC_C | CC_A));
1050     TEST_BCD(aas, 0x123405fa, CC_A, (CC_C | CC_A));
1051     TEST_BCD(aas, 0x12340205, 0, (CC_C | CC_A));
1052     TEST_BCD(aas, 0x12340306, 0, (CC_C | CC_A));
1053     TEST_BCD(aas, 0x1234040a, 0, (CC_C | CC_A));
1054     TEST_BCD(aas, 0x123405fa, 0, (CC_C | CC_A));
1055
1056     TEST_BCD(aam, 0x12340547, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));
1057     TEST_BCD(aad, 0x12340407, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));
1058 }
1059 #endif
1060
1061 #define TEST_XCHG(op, size, opconst)\
1062 {\
1063     long op0, op1;\
1064     op0 = i2l(0x12345678);\
1065     op1 = i2l(0xfbca7654);\
1066     asm(#op " %" size "0, %" size "1" \
1067         : "=q" (op0), opconst (op1) \
1068         : "0" (op0), "1" (op1));\
1069     printf("%-10s A=" FMTLX " B=" FMTLX "\n",\
1070            #op, op0, op1);\
1071 }
1072
1073 #define TEST_CMPXCHG(op, size, opconst, eax)\
1074 {\
1075     long op0, op1, op2;\
1076     op0 = i2l(0x12345678);\
1077     op1 = i2l(0xfbca7654);\
1078     op2 = i2l(eax);\
1079     asm(#op " %" size "0, %" size "1" \
1080         : "=q" (op0), opconst (op1) \
1081         : "0" (op0), "1" (op1), "a" (op2));\
1082     printf("%-10s EAX=" FMTLX " A=" FMTLX " C=" FMTLX "\n",\
1083            #op, op2, op0, op1);\
1084 }
1085
1086 void test_xchg(void)
1087 {
1088 #if defined(__x86_64__)
1089     TEST_XCHG(xchgq, "", "=q");
1090 #endif
1091     TEST_XCHG(xchgl, "k", "=q");
1092     TEST_XCHG(xchgw, "w", "=q");
1093     TEST_XCHG(xchgb, "b", "=q");
1094
1095 #if defined(__x86_64__)
1096     TEST_XCHG(xchgq, "", "=m");
1097 #endif
1098     TEST_XCHG(xchgl, "k", "=m");
1099     TEST_XCHG(xchgw, "w", "=m");
1100     TEST_XCHG(xchgb, "b", "=m");
1101
1102 #if defined(__x86_64__)
1103     TEST_XCHG(xaddq, "", "=q");
1104 #endif
1105     TEST_XCHG(xaddl, "k", "=q");
1106     TEST_XCHG(xaddw, "w", "=q");
1107     TEST_XCHG(xaddb, "b", "=q");
1108
1109     {
1110         int res;
1111         res = 0x12345678;
1112         asm("xaddl %1, %0" : "=r" (res) : "0" (res));
1113         printf("xaddl same res=%08x\n", res);
1114     }
1115
1116 #if defined(__x86_64__)
1117     TEST_XCHG(xaddq, "", "=m");
1118 #endif
1119     TEST_XCHG(xaddl, "k", "=m");
1120     TEST_XCHG(xaddw, "w", "=m");
1121     TEST_XCHG(xaddb, "b", "=m");
1122
1123 #if defined(__x86_64__)
1124     TEST_CMPXCHG(cmpxchgq, "", "=q", 0xfbca7654);
1125 #endif
1126     TEST_CMPXCHG(cmpxchgl, "k", "=q", 0xfbca7654);
1127     TEST_CMPXCHG(cmpxchgw, "w", "=q", 0xfbca7654);
1128     TEST_CMPXCHG(cmpxchgb, "b", "=q", 0xfbca7654);
1129
1130 #if defined(__x86_64__)
1131     TEST_CMPXCHG(cmpxchgq, "", "=q", 0xfffefdfc);
1132 #endif
1133     TEST_CMPXCHG(cmpxchgl, "k", "=q", 0xfffefdfc);
1134     TEST_CMPXCHG(cmpxchgw, "w", "=q", 0xfffefdfc);
1135     TEST_CMPXCHG(cmpxchgb, "b", "=q", 0xfffefdfc);
1136
1137 #if defined(__x86_64__)
1138     TEST_CMPXCHG(cmpxchgq, "", "=m", 0xfbca7654);
1139 #endif
1140     TEST_CMPXCHG(cmpxchgl, "k", "=m", 0xfbca7654);
1141     TEST_CMPXCHG(cmpxchgw, "w", "=m", 0xfbca7654);
1142     TEST_CMPXCHG(cmpxchgb, "b", "=m", 0xfbca7654);
1143
1144 #if defined(__x86_64__)
1145     TEST_CMPXCHG(cmpxchgq, "", "=m", 0xfffefdfc);
1146 #endif
1147     TEST_CMPXCHG(cmpxchgl, "k", "=m", 0xfffefdfc);
1148     TEST_CMPXCHG(cmpxchgw, "w", "=m", 0xfffefdfc);
1149     TEST_CMPXCHG(cmpxchgb, "b", "=m", 0xfffefdfc);
1150
1151     {
1152         uint64_t op0, op1, op2;
1153         long i, eflags;
1154
1155         for(i = 0; i < 2; i++) {
1156             op0 = 0x123456789abcdLL;
1157             if (i == 0)
1158                 op1 = 0xfbca765423456LL;
1159             else
1160                 op1 = op0;
1161             op2 = 0x6532432432434LL;
1162             asm("cmpxchg8b %1\n"
1163                 "pushf\n"
1164                 "pop %2\n"
1165                 : "=A" (op0), "=m" (op1), "=g" (eflags)
1166                 : "0" (op0), "m" (op1), "b" ((int)op2), "c" ((int)(op2 >> 32)));
1167             printf("cmpxchg8b: op0=" FMT64X " op1=" FMT64X " CC=%02lx\n",
1168                     op0, op1, eflags & CC_Z);
1169         }
1170     }
1171 }
1172
1173 #ifdef TEST_SEGS
1174 /**********************************************/
1175 /* segmentation tests */
1176
1177 #include <sys/syscall.h>
1178 #include <unistd.h>
1179 #include <asm/ldt.h>
1180 #include <linux/version.h>
1181
1182 static inline int modify_ldt(int func, void * ptr, unsigned long bytecount)
1183 {
1184     return syscall(__NR_modify_ldt, func, ptr, bytecount);
1185 }
1186
1187 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 5, 66)
1188 #define modify_ldt_ldt_s user_desc
1189 #endif
1190
1191 #define MK_SEL(n) (((n) << 3) | 7)
1192
1193 uint8_t seg_data1[4096];
1194 uint8_t seg_data2[4096];
1195
1196 #define TEST_LR(op, size, seg, mask)\
1197 {\
1198     int res, res2;\
1199     res = 0x12345678;\
1200     asm (op " %" size "2, %" size "0\n" \
1201          "movl $0, %1\n"\
1202          "jnz 1f\n"\
1203          "movl $1, %1\n"\
1204          "1:\n"\
1205          : "=r" (res), "=r" (res2) : "m" (seg), "0" (res));\
1206     printf(op ": Z=%d %08x\n", res2, res & ~(mask));\
1207 }
1208
1209 /* NOTE: we use Linux modify_ldt syscall */
1210 void test_segs(void)
1211 {
1212     struct modify_ldt_ldt_s ldt;
1213     long long ldt_table[3];
1214     int res, res2;
1215     char tmp;
1216     struct {
1217         uint32_t offset;
1218         uint16_t seg;
1219     } __attribute__((packed)) segoff;
1220
1221     ldt.entry_number = 1;
1222     ldt.base_addr = (unsigned long)&seg_data1;
1223     ldt.limit = (sizeof(seg_data1) + 0xfff) >> 12;
1224     ldt.seg_32bit = 1;
1225     ldt.contents = MODIFY_LDT_CONTENTS_DATA;
1226     ldt.read_exec_only = 0;
1227     ldt.limit_in_pages = 1;
1228     ldt.seg_not_present = 0;
1229     ldt.useable = 1;
1230     modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
1231
1232     ldt.entry_number = 2;
1233     ldt.base_addr = (unsigned long)&seg_data2;
1234     ldt.limit = (sizeof(seg_data2) + 0xfff) >> 12;
1235     ldt.seg_32bit = 1;
1236     ldt.contents = MODIFY_LDT_CONTENTS_DATA;
1237     ldt.read_exec_only = 0;
1238     ldt.limit_in_pages = 1;
1239     ldt.seg_not_present = 0;
1240     ldt.useable = 1;
1241     modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
1242
1243     modify_ldt(0, &ldt_table, sizeof(ldt_table)); /* read ldt entries */
1244 #if 0
1245     {
1246         int i;
1247         for(i=0;i<3;i++)
1248             printf("%d: %016Lx\n", i, ldt_table[i]);
1249     }
1250 #endif
1251     /* do some tests with fs or gs */
1252     asm volatile ("movl %0, %%fs" : : "r" (MK_SEL(1)));
1253
1254     seg_data1[1] = 0xaa;
1255     seg_data2[1] = 0x55;
1256
1257     asm volatile ("fs movzbl 0x1, %0" : "=r" (res));
1258     printf("FS[1] = %02x\n", res);
1259
1260     asm volatile ("pushl %%gs\n"
1261                   "movl %1, %%gs\n"
1262                   "gs movzbl 0x1, %0\n"
1263                   "popl %%gs\n"
1264                   : "=r" (res)
1265                   : "r" (MK_SEL(2)));
1266     printf("GS[1] = %02x\n", res);
1267
1268     /* tests with ds/ss (implicit segment case) */
1269     tmp = 0xa5;
1270     asm volatile ("pushl %%ebp\n\t"
1271                   "pushl %%ds\n\t"
1272                   "movl %2, %%ds\n\t"
1273                   "movl %3, %%ebp\n\t"
1274                   "movzbl 0x1, %0\n\t"
1275                   "movzbl (%%ebp), %1\n\t"
1276                   "popl %%ds\n\t"
1277                   "popl %%ebp\n\t"
1278                   : "=r" (res), "=r" (res2)
1279                   : "r" (MK_SEL(1)), "r" (&tmp));
1280     printf("DS[1] = %02x\n", res);
1281     printf("SS[tmp] = %02x\n", res2);
1282
1283     segoff.seg = MK_SEL(2);
1284     segoff.offset = 0xabcdef12;
1285     asm volatile("lfs %2, %0\n\t"
1286                  "movl %%fs, %1\n\t"
1287                  : "=r" (res), "=g" (res2)
1288                  : "m" (segoff));
1289     printf("FS:reg = %04x:%08x\n", res2, res);
1290
1291     TEST_LR("larw", "w", MK_SEL(2), 0x0100);
1292     TEST_LR("larl", "", MK_SEL(2), 0x0100);
1293     TEST_LR("lslw", "w", MK_SEL(2), 0);
1294     TEST_LR("lsll", "", MK_SEL(2), 0);
1295
1296     TEST_LR("larw", "w", 0xfff8, 0);
1297     TEST_LR("larl", "", 0xfff8, 0);
1298     TEST_LR("lslw", "w", 0xfff8, 0);
1299     TEST_LR("lsll", "", 0xfff8, 0);
1300 }
1301
1302 /* 16 bit code test */
1303 extern char code16_start, code16_end;
1304 extern char code16_func1;
1305 extern char code16_func2;
1306 extern char code16_func3;
1307
1308 void test_code16(void)
1309 {
1310     struct modify_ldt_ldt_s ldt;
1311     int res, res2;
1312
1313     /* build a code segment */
1314     ldt.entry_number = 1;
1315     ldt.base_addr = (unsigned long)&code16_start;
1316     ldt.limit = &code16_end - &code16_start;
1317     ldt.seg_32bit = 0;
1318     ldt.contents = MODIFY_LDT_CONTENTS_CODE;
1319     ldt.read_exec_only = 0;
1320     ldt.limit_in_pages = 0;
1321     ldt.seg_not_present = 0;
1322     ldt.useable = 1;
1323     modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
1324
1325     /* call the first function */
1326     asm volatile ("lcall %1, %2"
1327                   : "=a" (res)
1328                   : "i" (MK_SEL(1)), "i" (&code16_func1): "memory", "cc");
1329     printf("func1() = 0x%08x\n", res);
1330     asm volatile ("lcall %2, %3"
1331                   : "=a" (res), "=c" (res2)
1332                   : "i" (MK_SEL(1)), "i" (&code16_func2): "memory", "cc");
1333     printf("func2() = 0x%08x spdec=%d\n", res, res2);
1334     asm volatile ("lcall %1, %2"
1335                   : "=a" (res)
1336                   : "i" (MK_SEL(1)), "i" (&code16_func3): "memory", "cc");
1337     printf("func3() = 0x%08x\n", res);
1338 }
1339 #endif
1340
1341 #if defined(__x86_64__)
1342 asm(".globl func_lret\n"
1343     "func_lret:\n"
1344     "movl $0x87654641, %eax\n"
1345     "lretq\n");
1346 #else
1347 asm(".globl func_lret\n"
1348     "func_lret:\n"
1349     "movl $0x87654321, %eax\n"
1350     "lret\n"
1351
1352     ".globl func_iret\n"
1353     "func_iret:\n"
1354     "movl $0xabcd4321, %eax\n"
1355     "iret\n");
1356 #endif
1357
1358 extern char func_lret;
1359 extern char func_iret;
1360
1361 void test_misc(void)
1362 {
1363     char table[256];
1364     long res, i;
1365
1366     for(i=0;i<256;i++) table[i] = 256 - i;
1367     res = 0x12345678;
1368     asm ("xlat" : "=a" (res) : "b" (table), "0" (res));
1369     printf("xlat: EAX=" FMTLX "\n", res);
1370
1371 #if defined(__x86_64__)
1372     {
1373         static struct __attribute__((packed)) {
1374             uint32_t offset;
1375             uint16_t seg;
1376         } desc;
1377         long cs_sel;
1378
1379         asm volatile ("mov %%cs, %0" : "=r" (cs_sel));
1380
1381         asm volatile ("push %1\n"
1382                       "call func_lret\n"
1383                       : "=a" (res)
1384                       : "r" (cs_sel) : "memory", "cc");
1385         printf("func_lret=" FMTLX "\n", res);
1386
1387         /* NOTE: we assume that &func_lret < 4GB */
1388         desc.offset = (long)&func_lret;
1389         desc.seg = cs_sel;
1390
1391         asm volatile ("xor %%rax, %%rax\n"
1392                       "rex64 lcall %1\n"
1393                       : "=a" (res)
1394                       : "m" (desc)
1395                       : "memory", "cc");
1396         printf("func_lret2=" FMTLX "\n", res);
1397
1398         asm volatile ("push %2\n"
1399                       "mov $ 1f, %%rax\n"
1400                       "push %%rax\n"
1401                       "ljmp %1\n"
1402                       "1:\n"
1403                       : "=a" (res)
1404                       : "m" (desc), "b" (cs_sel)
1405                       : "memory", "cc");
1406         printf("func_lret3=" FMTLX "\n", res);
1407     }
1408 #else
1409     asm volatile ("push %%cs ; call %1"
1410                   : "=a" (res)
1411                   : "m" (func_lret): "memory", "cc");
1412     printf("func_lret=" FMTLX "\n", res);
1413
1414     asm volatile ("pushf ; push %%cs ; call %1"
1415                   : "=a" (res)
1416                   : "m" (func_iret): "memory", "cc");
1417     printf("func_iret=" FMTLX "\n", res);
1418 #endif
1419
1420 #if defined(__x86_64__)
1421     /* specific popl test */
1422     asm volatile ("push $12345432 ; push $0x9abcdef ; pop (%%rsp) ; pop %0"
1423                   : "=g" (res));
1424     printf("popl esp=" FMTLX "\n", res);
1425 #else
1426     /* specific popl test */
1427     asm volatile ("pushl $12345432 ; pushl $0x9abcdef ; popl (%%esp) ; popl %0"
1428                   : "=g" (res));
1429     printf("popl esp=" FMTLX "\n", res);
1430
1431     /* specific popw test */
1432     asm volatile ("pushl $12345432 ; pushl $0x9abcdef ; popw (%%esp) ; addl $2, %%esp ; popl %0"
1433                   : "=g" (res));
1434     printf("popw esp=" FMTLX "\n", res);
1435 #endif
1436 }
1437
1438 uint8_t str_buffer[4096];
1439
1440 #define TEST_STRING1(OP, size, DF, REP)\
1441 {\
1442     long esi, edi, eax, ecx, eflags;\
1443 \
1444     esi = (long)(str_buffer + sizeof(str_buffer) / 2);\
1445     edi = (long)(str_buffer + sizeof(str_buffer) / 2) + 16;\
1446     eax = i2l(0x12345678);\
1447     ecx = 17;\
1448 \
1449     asm volatile ("push $0\n\t"\
1450                   "popf\n\t"\
1451                   DF "\n\t"\
1452                   REP #OP size "\n\t"\
1453                   "cld\n\t"\
1454                   "pushf\n\t"\
1455                   "pop %4\n\t"\
1456                   : "=S" (esi), "=D" (edi), "=a" (eax), "=c" (ecx), "=g" (eflags)\
1457                   : "0" (esi), "1" (edi), "2" (eax), "3" (ecx));\
1458     printf("%-10s ESI=" FMTLX " EDI=" FMTLX " EAX=" FMTLX " ECX=" FMTLX " EFL=%04x\n",\
1459            REP #OP size, esi, edi, eax, ecx,\
1460            (int)(eflags & (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A)));\
1461 }
1462
1463 #define TEST_STRING(OP, REP)\
1464     TEST_STRING1(OP, "b", "", REP);\
1465     TEST_STRING1(OP, "w", "", REP);\
1466     TEST_STRING1(OP, "l", "", REP);\
1467     X86_64_ONLY(TEST_STRING1(OP, "q", "", REP));\
1468     TEST_STRING1(OP, "b", "std", REP);\
1469     TEST_STRING1(OP, "w", "std", REP);\
1470     TEST_STRING1(OP, "l", "std", REP);\
1471     X86_64_ONLY(TEST_STRING1(OP, "q", "std", REP))
1472
1473 void test_string(void)
1474 {
1475     int i;
1476     for(i = 0;i < sizeof(str_buffer); i++)
1477         str_buffer[i] = i + 0x56;
1478    TEST_STRING(stos, "");
1479    TEST_STRING(stos, "rep ");
1480    TEST_STRING(lods, ""); /* to verify stos */
1481    TEST_STRING(lods, "rep ");
1482    TEST_STRING(movs, "");
1483    TEST_STRING(movs, "rep ");
1484    TEST_STRING(lods, ""); /* to verify stos */
1485
1486    /* XXX: better tests */
1487    TEST_STRING(scas, "");
1488    TEST_STRING(scas, "repz ");
1489    TEST_STRING(scas, "repnz ");
1490    TEST_STRING(cmps, "");
1491    TEST_STRING(cmps, "repz ");
1492    TEST_STRING(cmps, "repnz ");
1493 }
1494
1495 #ifdef TEST_VM86
1496 /* VM86 test */
1497
1498 static inline void set_bit(uint8_t *a, unsigned int bit)
1499 {
1500     a[bit / 8] |= (1 << (bit % 8));
1501 }
1502
1503 static inline uint8_t *seg_to_linear(unsigned int seg, unsigned int reg)
1504 {
1505     return (uint8_t *)((seg << 4) + (reg & 0xffff));
1506 }
1507
1508 static inline void pushw(struct vm86_regs *r, int val)
1509 {
1510     r->esp = (r->esp & ~0xffff) | ((r->esp - 2) & 0xffff);
1511     *(uint16_t *)seg_to_linear(r->ss, r->esp) = val;
1512 }
1513
1514 static inline int vm86(int func, struct vm86plus_struct *v86)
1515 {
1516     return syscall(__NR_vm86, func, v86);
1517 }
1518
1519 extern char vm86_code_start;
1520 extern char vm86_code_end;
1521
1522 #define VM86_CODE_CS 0x100
1523 #define VM86_CODE_IP 0x100
1524
1525 void test_vm86(void)
1526 {
1527     struct vm86plus_struct ctx;
1528     struct vm86_regs *r;
1529     uint8_t *vm86_mem;
1530     int seg, ret;
1531
1532     vm86_mem = mmap((void *)0x00000000, 0x110000,
1533                     PROT_WRITE | PROT_READ | PROT_EXEC,
1534                     MAP_FIXED | MAP_ANON | MAP_PRIVATE, -1, 0);
1535     if (vm86_mem == MAP_FAILED) {
1536         printf("ERROR: could not map vm86 memory");
1537         return;
1538     }
1539     memset(&ctx, 0, sizeof(ctx));
1540
1541     /* init basic registers */
1542     r = &ctx.regs;
1543     r->eip = VM86_CODE_IP;
1544     r->esp = 0xfffe;
1545     seg = VM86_CODE_CS;
1546     r->cs = seg;
1547     r->ss = seg;
1548     r->ds = seg;
1549     r->es = seg;
1550     r->fs = seg;
1551     r->gs = seg;
1552     r->eflags = VIF_MASK;
1553
1554     /* move code to proper address. We use the same layout as a .com
1555        dos program. */
1556     memcpy(vm86_mem + (VM86_CODE_CS << 4) + VM86_CODE_IP,
1557            &vm86_code_start, &vm86_code_end - &vm86_code_start);
1558
1559     /* mark int 0x21 as being emulated */
1560     set_bit((uint8_t *)&ctx.int_revectored, 0x21);
1561
1562     for(;;) {
1563         ret = vm86(VM86_ENTER, &ctx);
1564         switch(VM86_TYPE(ret)) {
1565         case VM86_INTx:
1566             {
1567                 int int_num, ah, v;
1568
1569                 int_num = VM86_ARG(ret);
1570                 if (int_num != 0x21)
1571                     goto unknown_int;
1572                 ah = (r->eax >> 8) & 0xff;
1573                 switch(ah) {
1574                 case 0x00: /* exit */
1575                     goto the_end;
1576                 case 0x02: /* write char */
1577                     {
1578                         uint8_t c = r->edx;
1579                         putchar(c);
1580                     }
1581                     break;
1582                 case 0x09: /* write string */
1583                     {
1584                         uint8_t c, *ptr;
1585                         ptr = seg_to_linear(r->ds, r->edx);
1586                         for(;;) {
1587                             c = *ptr++;
1588                             if (c == '$')
1589                                 break;
1590                             putchar(c);
1591                         }
1592                         r->eax = (r->eax & ~0xff) | '$';
1593                     }
1594                     break;
1595                 case 0xff: /* extension: write eflags number in edx */
1596                     v = (int)r->edx;
1597 #ifndef LINUX_VM86_IOPL_FIX
1598                     v &= ~0x3000;
1599 #endif
1600                     printf("%08x\n", v);
1601                     break;
1602                 default:
1603                 unknown_int:
1604                     printf("unsupported int 0x%02x\n", int_num);
1605                     goto the_end;
1606                 }
1607             }
1608             break;
1609         case VM86_SIGNAL:
1610             /* a signal came, we just ignore that */
1611             break;
1612         case VM86_STI:
1613             break;
1614         default:
1615             printf("ERROR: unhandled vm86 return code (0x%x)\n", ret);
1616             goto the_end;
1617         }
1618     }
1619  the_end:
1620     printf("VM86 end\n");
1621     munmap(vm86_mem, 0x110000);
1622 }
1623 #endif
1624
1625 /* exception tests */
1626 #if defined(__i386__) && !defined(REG_EAX)
1627 #define REG_EAX EAX
1628 #define REG_EBX EBX
1629 #define REG_ECX ECX
1630 #define REG_EDX EDX
1631 #define REG_ESI ESI
1632 #define REG_EDI EDI
1633 #define REG_EBP EBP
1634 #define REG_ESP ESP
1635 #define REG_EIP EIP
1636 #define REG_EFL EFL
1637 #define REG_TRAPNO TRAPNO
1638 #define REG_ERR ERR
1639 #endif
1640
1641 #if defined(__x86_64__)
1642 #define REG_EIP REG_RIP
1643 #endif
1644
1645 jmp_buf jmp_env;
1646 int v1;
1647 int tab[2];
1648
1649 void sig_handler(int sig, siginfo_t *info, void *puc)
1650 {
1651     struct ucontext *uc = puc;
1652
1653     printf("si_signo=%d si_errno=%d si_code=%d",
1654            info->si_signo, info->si_errno, info->si_code);
1655     printf(" si_addr=0x%08lx",
1656            (unsigned long)info->si_addr);
1657     printf("\n");
1658
1659     printf("trapno=" FMTLX " err=" FMTLX,
1660            (long)uc->uc_mcontext.gregs[REG_TRAPNO],
1661            (long)uc->uc_mcontext.gregs[REG_ERR]);
1662     printf(" EIP=" FMTLX, (long)uc->uc_mcontext.gregs[REG_EIP]);
1663     printf("\n");
1664     longjmp(jmp_env, 1);
1665 }
1666
1667 void test_exceptions(void)
1668 {
1669     struct sigaction act;
1670     volatile int val;
1671
1672     act.sa_sigaction = sig_handler;
1673     sigemptyset(&act.sa_mask);
1674     act.sa_flags = SA_SIGINFO | SA_NODEFER;
1675     sigaction(SIGFPE, &act, NULL);
1676     sigaction(SIGILL, &act, NULL);
1677     sigaction(SIGSEGV, &act, NULL);
1678     sigaction(SIGBUS, &act, NULL);
1679     sigaction(SIGTRAP, &act, NULL);
1680
1681     /* test division by zero reporting */
1682     printf("DIVZ exception:\n");
1683     if (setjmp(jmp_env) == 0) {
1684         /* now divide by zero */
1685         v1 = 0;
1686         v1 = 2 / v1;
1687     }
1688
1689 #if !defined(__x86_64__)
1690     printf("BOUND exception:\n");
1691     if (setjmp(jmp_env) == 0) {
1692         /* bound exception */
1693         tab[0] = 1;
1694         tab[1] = 10;
1695         asm volatile ("bound %0, %1" : : "r" (11), "m" (tab[0]));
1696     }
1697 #endif
1698
1699 #ifdef TEST_SEGS
1700     printf("segment exceptions:\n");
1701     if (setjmp(jmp_env) == 0) {
1702         /* load an invalid segment */
1703         asm volatile ("movl %0, %%fs" : : "r" ((0x1234 << 3) | 1));
1704     }
1705     if (setjmp(jmp_env) == 0) {
1706         /* null data segment is valid */
1707         asm volatile ("movl %0, %%fs" : : "r" (3));
1708         /* null stack segment */
1709         asm volatile ("movl %0, %%ss" : : "r" (3));
1710     }
1711
1712     {
1713         struct modify_ldt_ldt_s ldt;
1714         ldt.entry_number = 1;
1715         ldt.base_addr = (unsigned long)&seg_data1;
1716         ldt.limit = (sizeof(seg_data1) + 0xfff) >> 12;
1717         ldt.seg_32bit = 1;
1718         ldt.contents = MODIFY_LDT_CONTENTS_DATA;
1719         ldt.read_exec_only = 0;
1720         ldt.limit_in_pages = 1;
1721         ldt.seg_not_present = 1;
1722         ldt.useable = 1;
1723         modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
1724
1725         if (setjmp(jmp_env) == 0) {
1726             /* segment not present */
1727             asm volatile ("movl %0, %%fs" : : "r" (MK_SEL(1)));
1728         }
1729     }
1730 #endif
1731
1732     /* test SEGV reporting */
1733     printf("PF exception:\n");
1734     if (setjmp(jmp_env) == 0) {
1735         val = 1;
1736         /* we add a nop to test a weird PC retrieval case */
1737         asm volatile ("nop");
1738         /* now store in an invalid address */
1739         *(char *)0x1234 = 1;
1740     }
1741
1742     /* test SEGV reporting */
1743     printf("PF exception:\n");
1744     if (setjmp(jmp_env) == 0) {
1745         val = 1;
1746         /* read from an invalid address */
1747         v1 = *(char *)0x1234;
1748     }
1749
1750     /* test illegal instruction reporting */
1751     printf("UD2 exception:\n");
1752     if (setjmp(jmp_env) == 0) {
1753         /* now execute an invalid instruction */
1754         asm volatile("ud2");
1755     }
1756     printf("lock nop exception:\n");
1757     if (setjmp(jmp_env) == 0) {
1758         /* now execute an invalid instruction */
1759         asm volatile("lock nop");
1760     }
1761
1762     printf("INT exception:\n");
1763     if (setjmp(jmp_env) == 0) {
1764         asm volatile ("int $0xfd");
1765     }
1766     if (setjmp(jmp_env) == 0) {
1767         asm volatile ("int $0x01");
1768     }
1769     if (setjmp(jmp_env) == 0) {
1770         asm volatile (".byte 0xcd, 0x03");
1771     }
1772     if (setjmp(jmp_env) == 0) {
1773         asm volatile ("int $0x04");
1774     }
1775     if (setjmp(jmp_env) == 0) {
1776         asm volatile ("int $0x05");
1777     }
1778
1779     printf("INT3 exception:\n");
1780     if (setjmp(jmp_env) == 0) {
1781         asm volatile ("int3");
1782     }
1783
1784     printf("CLI exception:\n");
1785     if (setjmp(jmp_env) == 0) {
1786         asm volatile ("cli");
1787     }
1788
1789     printf("STI exception:\n");
1790     if (setjmp(jmp_env) == 0) {
1791         asm volatile ("cli");
1792     }
1793
1794 #if !defined(__x86_64__)
1795     printf("INTO exception:\n");
1796     if (setjmp(jmp_env) == 0) {
1797         /* overflow exception */
1798         asm volatile ("addl $1, %0 ; into" : : "r" (0x7fffffff));
1799     }
1800 #endif
1801
1802     printf("OUTB exception:\n");
1803     if (setjmp(jmp_env) == 0) {
1804         asm volatile ("outb %%al, %%dx" : : "d" (0x4321), "a" (0));
1805     }
1806
1807     printf("INB exception:\n");
1808     if (setjmp(jmp_env) == 0) {
1809         asm volatile ("inb %%dx, %%al" : "=a" (val) : "d" (0x4321));
1810     }
1811
1812     printf("REP OUTSB exception:\n");
1813     if (setjmp(jmp_env) == 0) {
1814         asm volatile ("rep outsb" : : "d" (0x4321), "S" (tab), "c" (1));
1815     }
1816
1817     printf("REP INSB exception:\n");
1818     if (setjmp(jmp_env) == 0) {
1819         asm volatile ("rep insb" : : "d" (0x4321), "D" (tab), "c" (1));
1820     }
1821
1822     printf("HLT exception:\n");
1823     if (setjmp(jmp_env) == 0) {
1824         asm volatile ("hlt");
1825     }
1826
1827     printf("single step exception:\n");
1828     val = 0;
1829     if (setjmp(jmp_env) == 0) {
1830         asm volatile ("pushf\n"
1831                       "orl $0x00100, (%%esp)\n"
1832                       "popf\n"
1833                       "movl $0xabcd, %0\n"
1834                       "movl $0x0, %0\n" : "=m" (val) : : "cc", "memory");
1835     }
1836     printf("val=0x%x\n", val);
1837 }
1838
1839 #if !defined(__x86_64__)
1840 /* specific precise single step test */
1841 void sig_trap_handler(int sig, siginfo_t *info, void *puc)
1842 {
1843     struct ucontext *uc = puc;
1844     printf("EIP=" FMTLX "\n", (long)uc->uc_mcontext.gregs[REG_EIP]);
1845 }
1846
1847 const uint8_t sstep_buf1[4] = { 1, 2, 3, 4};
1848 uint8_t sstep_buf2[4];
1849
1850 void test_single_step(void)
1851 {
1852     struct sigaction act;
1853     volatile int val;
1854     int i;
1855
1856     val = 0;
1857     act.sa_sigaction = sig_trap_handler;
1858     sigemptyset(&act.sa_mask);
1859     act.sa_flags = SA_SIGINFO;
1860     sigaction(SIGTRAP, &act, NULL);
1861     asm volatile ("pushf\n"
1862                   "orl $0x00100, (%%esp)\n"
1863                   "popf\n"
1864                   "movl $0xabcd, %0\n"
1865
1866                   /* jmp test */
1867                   "movl $3, %%ecx\n"
1868                   "1:\n"
1869                   "addl $1, %0\n"
1870                   "decl %%ecx\n"
1871                   "jnz 1b\n"
1872
1873                   /* movsb: the single step should stop at each movsb iteration */
1874                   "movl $sstep_buf1, %%esi\n"
1875                   "movl $sstep_buf2, %%edi\n"
1876                   "movl $0, %%ecx\n"
1877                   "rep movsb\n"
1878                   "movl $3, %%ecx\n"
1879                   "rep movsb\n"
1880                   "movl $1, %%ecx\n"
1881                   "rep movsb\n"
1882
1883                   /* cmpsb: the single step should stop at each cmpsb iteration */
1884                   "movl $sstep_buf1, %%esi\n"
1885                   "movl $sstep_buf2, %%edi\n"
1886                   "movl $0, %%ecx\n"
1887                   "rep cmpsb\n"
1888                   "movl $4, %%ecx\n"
1889                   "rep cmpsb\n"
1890
1891                   /* getpid() syscall: single step should skip one
1892                      instruction */
1893                   "movl $20, %%eax\n"
1894                   "int $0x80\n"
1895                   "movl $0, %%eax\n"
1896
1897                   /* when modifying SS, trace is not done on the next
1898                      instruction */
1899                   "movl %%ss, %%ecx\n"
1900                   "movl %%ecx, %%ss\n"
1901                   "addl $1, %0\n"
1902                   "movl $1, %%eax\n"
1903                   "movl %%ecx, %%ss\n"
1904                   "jmp 1f\n"
1905                   "addl $1, %0\n"
1906                   "1:\n"
1907                   "movl $1, %%eax\n"
1908                   "pushl %%ecx\n"
1909                   "popl %%ss\n"
1910                   "addl $1, %0\n"
1911                   "movl $1, %%eax\n"
1912
1913                   "pushf\n"
1914                   "andl $~0x00100, (%%esp)\n"
1915                   "popf\n"
1916                   : "=m" (val)
1917                   :
1918                   : "cc", "memory", "eax", "ecx", "esi", "edi");
1919     printf("val=%d\n", val);
1920     for(i = 0; i < 4; i++)
1921         printf("sstep_buf2[%d] = %d\n", i, sstep_buf2[i]);
1922 }
1923
1924 /* self modifying code test */
1925 uint8_t code[] = {
1926     0xb8, 0x1, 0x00, 0x00, 0x00, /* movl $1, %eax */
1927     0xc3, /* ret */
1928 };
1929
1930 asm("smc_code2:\n"
1931     "movl 4(%esp), %eax\n"
1932     "movl %eax, smc_patch_addr2 + 1\n"
1933     "nop\n"
1934     "nop\n"
1935     "nop\n"
1936     "nop\n"
1937     "nop\n"
1938     "nop\n"
1939     "nop\n"
1940     "nop\n"
1941     "smc_patch_addr2:\n"
1942     "movl $1, %eax\n"
1943     "ret\n");
1944
1945 typedef int FuncType(void);
1946 extern int smc_code2(int);
1947 void test_self_modifying_code(void)
1948 {
1949     int i;
1950
1951     printf("self modifying code:\n");
1952     printf("func1 = 0x%x\n", ((FuncType *)code)());
1953     for(i = 2; i <= 4; i++) {
1954         code[1] = i;
1955         printf("func%d = 0x%x\n", i, ((FuncType *)code)());
1956     }
1957
1958     /* more difficult test : the modified code is just after the
1959        modifying instruction. It is forbidden in Intel specs, but it
1960        is used by old DOS programs */
1961     for(i = 2; i <= 4; i++) {
1962         printf("smc_code2(%d) = %d\n", i, smc_code2(i));
1963     }
1964 }
1965 #endif
1966
1967 long enter_stack[4096];
1968
1969 #if defined(__x86_64__)
1970 #define RSP "%%rsp"
1971 #define RBP "%%rbp"
1972 #else
1973 #define RSP "%%esp"
1974 #define RBP "%%ebp"
1975 #endif
1976
1977 #define TEST_ENTER(size, stack_type, level)\
1978 {\
1979     long esp_save, esp_val, ebp_val, ebp_save, i;\
1980     stack_type *ptr, *stack_end, *stack_ptr;\
1981     memset(enter_stack, 0, sizeof(enter_stack));\
1982     stack_end = stack_ptr = (stack_type *)(enter_stack + 4096);\
1983     ebp_val = (long)stack_ptr;\
1984     for(i=1;i<=32;i++)\
1985        *--stack_ptr = i;\
1986     esp_val = (long)stack_ptr;\
1987     asm("mov " RSP ", %[esp_save]\n"\
1988         "mov " RBP ", %[ebp_save]\n"\
1989         "mov %[esp_val], " RSP "\n"\
1990         "mov %[ebp_val], " RBP "\n"\
1991         "enter" size " $8, $" #level "\n"\
1992         "mov " RSP ", %[esp_val]\n"\
1993         "mov " RBP ", %[ebp_val]\n"\
1994         "mov %[esp_save], " RSP "\n"\
1995         "mov %[ebp_save], " RBP "\n"\
1996         : [esp_save] "=r" (esp_save),\
1997         [ebp_save] "=r" (ebp_save),\
1998         [esp_val] "=r" (esp_val),\
1999         [ebp_val] "=r" (ebp_val)\
2000         :  "[esp_val]" (esp_val),\
2001         "[ebp_val]" (ebp_val));\
2002     printf("level=%d:\n", level);\
2003     printf("esp_val=" FMTLX "\n", esp_val - (long)stack_end);\
2004     printf("ebp_val=" FMTLX "\n", ebp_val - (long)stack_end);\
2005     for(ptr = (stack_type *)esp_val; ptr < stack_end; ptr++)\
2006         printf(FMTLX "\n", (long)ptr[0]);\
2007 }
2008
2009 static void test_enter(void)
2010 {
2011 #if defined(__x86_64__)
2012     TEST_ENTER("q", uint64_t, 0);
2013     TEST_ENTER("q", uint64_t, 1);
2014     TEST_ENTER("q", uint64_t, 2);
2015     TEST_ENTER("q", uint64_t, 31);
2016 #else
2017     TEST_ENTER("l", uint32_t, 0);
2018     TEST_ENTER("l", uint32_t, 1);
2019     TEST_ENTER("l", uint32_t, 2);
2020     TEST_ENTER("l", uint32_t, 31);
2021 #endif
2022
2023     TEST_ENTER("w", uint16_t, 0);
2024     TEST_ENTER("w", uint16_t, 1);
2025     TEST_ENTER("w", uint16_t, 2);
2026     TEST_ENTER("w", uint16_t, 31);
2027 }
2028
2029 #ifdef TEST_SSE
2030
2031 typedef int __m64 __attribute__ ((__mode__ (__V2SI__)));
2032 typedef int __m128 __attribute__ ((__mode__(__V4SF__)));
2033
2034 typedef union {
2035     double d[2];
2036     float s[4];
2037     uint32_t l[4];
2038     uint64_t q[2];
2039     __m128 dq;
2040 } XMMReg;
2041
2042 static uint64_t __attribute__((aligned(16))) test_values[4][2] = {
2043     { 0x456723c698694873, 0xdc515cff944a58ec },
2044     { 0x1f297ccd58bad7ab, 0x41f21efba9e3e146 },
2045     { 0x007c62c2085427f8, 0x231be9e8cde7438d },
2046     { 0x0f76255a085427f8, 0xc233e9e8c4c9439a },
2047 };
2048
2049 #define SSE_OP(op)\
2050 {\
2051     asm volatile (#op " %2, %0" : "=x" (r.dq) : "0" (a.dq), "x" (b.dq));\
2052     printf("%-9s: a=" FMT64X "" FMT64X " b=" FMT64X "" FMT64X " r=" FMT64X "" FMT64X "\n",\
2053            #op,\
2054            a.q[1], a.q[0],\
2055            b.q[1], b.q[0],\
2056            r.q[1], r.q[0]);\
2057 }
2058
2059 #define SSE_OP2(op)\
2060 {\
2061     int i;\
2062     for(i=0;i<2;i++) {\
2063     a.q[0] = test_values[2*i][0];\
2064     a.q[1] = test_values[2*i][1];\
2065     b.q[0] = test_values[2*i+1][0];\
2066     b.q[1] = test_values[2*i+1][1];\
2067     SSE_OP(op);\
2068     }\
2069 }
2070
2071 #define MMX_OP2(op)\
2072 {\
2073     int i;\
2074     for(i=0;i<2;i++) {\
2075     a.q[0] = test_values[2*i][0];\
2076     b.q[0] = test_values[2*i+1][0];\
2077     asm volatile (#op " %2, %0" : "=y" (r.q[0]) : "0" (a.q[0]), "y" (b.q[0]));\
2078     printf("%-9s: a=" FMT64X " b=" FMT64X " r=" FMT64X "\n",\
2079            #op,\
2080            a.q[0],\
2081            b.q[0],\
2082            r.q[0]);\
2083     }\
2084     SSE_OP2(op);\
2085 }
2086
2087 #define SHUF_OP(op, ib)\
2088 {\
2089     a.q[0] = test_values[0][0];\
2090     a.q[1] = test_values[0][1];\
2091     b.q[0] = test_values[1][0];\
2092     b.q[1] = test_values[1][1];\
2093     asm volatile (#op " $" #ib ", %2, %0" : "=x" (r.dq) : "0" (a.dq), "x" (b.dq));\
2094     printf("%-9s: a=" FMT64X "" FMT64X " b=" FMT64X "" FMT64X " ib=%02x r=" FMT64X "" FMT64X "\n",\
2095            #op,\
2096            a.q[1], a.q[0],\
2097            b.q[1], b.q[0],\
2098            ib,\
2099            r.q[1], r.q[0]);\
2100 }
2101
2102 #define PSHUF_OP(op, ib)\
2103 {\
2104     int i;\
2105     for(i=0;i<2;i++) {\
2106     a.q[0] = test_values[2*i][0];\
2107     a.q[1] = test_values[2*i][1];\
2108     asm volatile (#op " $" #ib ", %1, %0" : "=x" (r.dq) : "x" (a.dq));\
2109     printf("%-9s: a=" FMT64X "" FMT64X " ib=%02x r=" FMT64X "" FMT64X "\n",\
2110            #op,\
2111            a.q[1], a.q[0],\
2112            ib,\
2113            r.q[1], r.q[0]);\
2114     }\
2115 }
2116
2117 #define SHIFT_IM(op, ib)\
2118 {\
2119     int i;\
2120     for(i=0;i<2;i++) {\
2121     a.q[0] = test_values[2*i][0];\
2122     a.q[1] = test_values[2*i][1];\
2123     asm volatile (#op " $" #ib ", %0" : "=x" (r.dq) : "0" (a.dq));\
2124     printf("%-9s: a=" FMT64X "" FMT64X " ib=%02x r=" FMT64X "" FMT64X "\n",\
2125            #op,\
2126            a.q[1], a.q[0],\
2127            ib,\
2128            r.q[1], r.q[0]);\
2129     }\
2130 }
2131
2132 #define SHIFT_OP(op, ib)\
2133 {\
2134     int i;\
2135     SHIFT_IM(op, ib);\
2136     for(i=0;i<2;i++) {\
2137     a.q[0] = test_values[2*i][0];\
2138     a.q[1] = test_values[2*i][1];\
2139     b.q[0] = ib;\
2140     b.q[1] = 0;\
2141     asm volatile (#op " %2, %0" : "=x" (r.dq) : "0" (a.dq), "x" (b.dq));\
2142     printf("%-9s: a=" FMT64X "" FMT64X " b=" FMT64X "" FMT64X " r=" FMT64X "" FMT64X "\n",\
2143            #op,\
2144            a.q[1], a.q[0],\
2145            b.q[1], b.q[0],\
2146            r.q[1], r.q[0]);\
2147     }\
2148 }
2149
2150 #define MOVMSK(op)\
2151 {\
2152     int i, reg;\
2153     for(i=0;i<2;i++) {\
2154     a.q[0] = test_values[2*i][0];\
2155     a.q[1] = test_values[2*i][1];\
2156     asm volatile (#op " %1, %0" : "=r" (reg) : "x" (a.dq));\
2157     printf("%-9s: a=" FMT64X "" FMT64X " r=%08x\n",\
2158            #op,\
2159            a.q[1], a.q[0],\
2160            reg);\
2161     }\
2162 }
2163
2164 #define SSE_OPS(a) \
2165 SSE_OP(a ## ps);\
2166 SSE_OP(a ## ss);
2167
2168 #define SSE_OPD(a) \
2169 SSE_OP(a ## pd);\
2170 SSE_OP(a ## sd);
2171
2172 #define SSE_COMI(op, field)\
2173 {\
2174     unsigned int eflags;\
2175     XMMReg a, b;\
2176     a.field[0] = a1;\
2177     b.field[0] = b1;\
2178     asm volatile (#op " %2, %1\n"\
2179         "pushf\n"\
2180         "pop %0\n"\
2181         : "=m" (eflags)\
2182         : "x" (a.dq), "x" (b.dq));\
2183     printf("%-9s: a=%f b=%f cc=%04x\n",\
2184            #op, a1, b1,\
2185            eflags & (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));\
2186 }
2187
2188 void test_sse_comi(double a1, double b1)
2189 {
2190     SSE_COMI(ucomiss, s);
2191     SSE_COMI(ucomisd, d);
2192     SSE_COMI(comiss, s);
2193     SSE_COMI(comisd, d);
2194 }
2195
2196 #define CVT_OP_XMM(op)\
2197 {\
2198     asm volatile (#op " %1, %0" : "=x" (r.dq) : "x" (a.dq));\
2199     printf("%-9s: a=" FMT64X "" FMT64X " r=" FMT64X "" FMT64X "\n",\
2200            #op,\
2201            a.q[1], a.q[0],\
2202            r.q[1], r.q[0]);\
2203 }
2204
2205 /* Force %xmm0 usage to avoid the case where both register index are 0
2206    to test intruction decoding more extensively */
2207 #define CVT_OP_XMM2MMX(op)\
2208 {\
2209     asm volatile (#op " %1, %0" : "=y" (r.q[0]) : "x" (a.dq) \
2210                   : "%xmm0");\
2211     printf("%-9s: a=" FMT64X "" FMT64X " r=" FMT64X "\n",\
2212            #op,\
2213            a.q[1], a.q[0],\
2214            r.q[0]);\
2215 }
2216
2217 #define CVT_OP_MMX2XMM(op)\
2218 {\
2219     asm volatile (#op " %1, %0" : "=x" (r.dq) : "y" (a.q[0]));\
2220     printf("%-9s: a=" FMT64X " r=" FMT64X "" FMT64X "\n",\
2221            #op,\
2222            a.q[0],\
2223            r.q[1], r.q[0]);\
2224 }
2225
2226 #define CVT_OP_REG2XMM(op)\
2227 {\
2228     asm volatile (#op " %1, %0" : "=x" (r.dq) : "r" (a.l[0]));\
2229     printf("%-9s: a=%08x r=" FMT64X "" FMT64X "\n",\
2230            #op,\
2231            a.l[0],\
2232            r.q[1], r.q[0]);\
2233 }
2234
2235 #define CVT_OP_XMM2REG(op)\
2236 {\
2237     asm volatile (#op " %1, %0" : "=r" (r.l[0]) : "x" (a.dq));\
2238     printf("%-9s: a=" FMT64X "" FMT64X " r=%08x\n",\
2239            #op,\
2240            a.q[1], a.q[0],\
2241            r.l[0]);\
2242 }
2243
2244 struct fpxstate {
2245     uint16_t fpuc;
2246     uint16_t fpus;
2247     uint16_t fptag;
2248     uint16_t fop;
2249     uint32_t fpuip;
2250     uint16_t cs_sel;
2251     uint16_t dummy0;
2252     uint32_t fpudp;
2253     uint16_t ds_sel;
2254     uint16_t dummy1;
2255     uint32_t mxcsr;
2256     uint32_t mxcsr_mask;
2257     uint8_t fpregs1[8 * 16];
2258     uint8_t xmm_regs[8 * 16];
2259     uint8_t dummy2[224];
2260 };
2261
2262 static struct fpxstate fpx_state __attribute__((aligned(16)));
2263 static struct fpxstate fpx_state2 __attribute__((aligned(16)));
2264
2265 void test_fxsave(void)
2266 {
2267     struct fpxstate *fp = &fpx_state;
2268     struct fpxstate *fp2 = &fpx_state2;
2269     int i, nb_xmm;
2270     XMMReg a, b;
2271     a.q[0] = test_values[0][0];
2272     a.q[1] = test_values[0][1];
2273     b.q[0] = test_values[1][0];
2274     b.q[1] = test_values[1][1];
2275
2276     asm("movdqa %2, %%xmm0\n"
2277         "movdqa %3, %%xmm7\n"
2278 #if defined(__x86_64__)
2279         "movdqa %2, %%xmm15\n"
2280 #endif
2281         " fld1\n"
2282         " fldpi\n"
2283         " fldln2\n"
2284         " fxsave %0\n"
2285         " fxrstor %0\n"
2286         " fxsave %1\n"
2287         " fninit\n"
2288         : "=m" (*(uint32_t *)fp2), "=m" (*(uint32_t *)fp)
2289         : "m" (a), "m" (b));
2290     printf("fpuc=%04x\n", fp->fpuc);
2291     printf("fpus=%04x\n", fp->fpus);
2292     printf("fptag=%04x\n", fp->fptag);
2293     for(i = 0; i < 3; i++) {
2294         printf("ST%d: " FMT64X " %04x\n",
2295                i,
2296                *(uint64_t *)&fp->fpregs1[i * 16],
2297                *(uint16_t *)&fp->fpregs1[i * 16 + 8]);
2298     }
2299     printf("mxcsr=%08x\n", fp->mxcsr & 0x1f80);
2300 #if defined(__x86_64__)
2301     nb_xmm = 16;
2302 #else
2303     nb_xmm = 8;
2304 #endif
2305     for(i = 0; i < nb_xmm; i++) {
2306         printf("xmm%d: " FMT64X "" FMT64X "\n",
2307                i,
2308                *(uint64_t *)&fp->xmm_regs[i * 16],
2309                *(uint64_t *)&fp->xmm_regs[i * 16 + 8]);
2310     }
2311 }
2312
2313 void test_sse(void)
2314 {
2315     XMMReg r, a, b;
2316     int i;
2317
2318     MMX_OP2(punpcklbw);
2319     MMX_OP2(punpcklwd);
2320     MMX_OP2(punpckldq);
2321     MMX_OP2(packsswb);
2322     MMX_OP2(pcmpgtb);
2323     MMX_OP2(pcmpgtw);
2324     MMX_OP2(pcmpgtd);
2325     MMX_OP2(packuswb);
2326     MMX_OP2(punpckhbw);
2327     MMX_OP2(punpckhwd);
2328     MMX_OP2(punpckhdq);
2329     MMX_OP2(packssdw);
2330     MMX_OP2(pcmpeqb);
2331     MMX_OP2(pcmpeqw);
2332     MMX_OP2(pcmpeqd);
2333
2334     MMX_OP2(paddq);
2335     MMX_OP2(pmullw);
2336     MMX_OP2(psubusb);
2337     MMX_OP2(psubusw);
2338     MMX_OP2(pminub);
2339     MMX_OP2(pand);
2340     MMX_OP2(paddusb);
2341     MMX_OP2(paddusw);
2342     MMX_OP2(pmaxub);
2343     MMX_OP2(pandn);
2344
2345     MMX_OP2(pmulhuw);
2346     MMX_OP2(pmulhw);
2347
2348     MMX_OP2(psubsb);
2349     MMX_OP2(psubsw);
2350     MMX_OP2(pminsw);
2351     MMX_OP2(por);
2352     MMX_OP2(paddsb);
2353     MMX_OP2(paddsw);
2354     MMX_OP2(pmaxsw);
2355     MMX_OP2(pxor);
2356     MMX_OP2(pmuludq);
2357     MMX_OP2(pmaddwd);
2358     MMX_OP2(psadbw);
2359     MMX_OP2(psubb);
2360     MMX_OP2(psubw);
2361     MMX_OP2(psubd);
2362     MMX_OP2(psubq);
2363     MMX_OP2(paddb);
2364     MMX_OP2(paddw);
2365     MMX_OP2(paddd);
2366
2367     MMX_OP2(pavgb);
2368     MMX_OP2(pavgw);
2369
2370     asm volatile ("pinsrw $1, %1, %0" : "=y" (r.q[0]) : "r" (0x12345678));
2371     printf("%-9s: r=" FMT64X "\n", "pinsrw", r.q[0]);
2372
2373     asm volatile ("pinsrw $5, %1, %0" : "=x" (r.dq) : "r" (0x12345678));
2374     printf("%-9s: r=" FMT64X "" FMT64X "\n", "pinsrw", r.q[1], r.q[0]);
2375
2376     a.q[0] = test_values[0][0];
2377     a.q[1] = test_values[0][1];
2378     asm volatile ("pextrw $1, %1, %0" : "=r" (r.l[0]) : "y" (a.q[0]));
2379     printf("%-9s: r=%08x\n", "pextrw", r.l[0]);
2380
2381     asm volatile ("pextrw $5, %1, %0" : "=r" (r.l[0]) : "x" (a.dq));
2382     printf("%-9s: r=%08x\n", "pextrw", r.l[0]);
2383
2384     asm volatile ("pmovmskb %1, %0" : "=r" (r.l[0]) : "y" (a.q[0]));
2385     printf("%-9s: r=%08x\n", "pmovmskb", r.l[0]);
2386
2387     asm volatile ("pmovmskb %1, %0" : "=r" (r.l[0]) : "x" (a.dq));
2388     printf("%-9s: r=%08x\n", "pmovmskb", r.l[0]);
2389
2390     {
2391         r.q[0] = -1;
2392         r.q[1] = -1;
2393
2394         a.q[0] = test_values[0][0];
2395         a.q[1] = test_values[0][1];
2396         b.q[0] = test_values[1][0];
2397         b.q[1] = test_values[1][1];
2398         asm volatile("maskmovq %1, %0" :
2399                      : "y" (a.q[0]), "y" (b.q[0]), "D" (&r)
2400                      : "memory");
2401         printf("%-9s: r=" FMT64X " a=" FMT64X " b=" FMT64X "\n",
2402                "maskmov",
2403                r.q[0],
2404                a.q[0],
2405                b.q[0]);
2406         asm volatile("maskmovdqu %1, %0" :
2407                      : "x" (a.dq), "x" (b.dq), "D" (&r)
2408                      : "memory");
2409         printf("%-9s: r=" FMT64X "" FMT64X " a=" FMT64X "" FMT64X " b=" FMT64X "" FMT64X "\n",
2410                "maskmov",
2411                r.q[1], r.q[0],
2412                a.q[1], a.q[0],
2413                b.q[1], b.q[0]);
2414     }
2415
2416     asm volatile ("emms");
2417
2418     SSE_OP2(punpcklqdq);
2419     SSE_OP2(punpckhqdq);
2420     SSE_OP2(andps);
2421     SSE_OP2(andpd);
2422     SSE_OP2(andnps);
2423     SSE_OP2(andnpd);
2424     SSE_OP2(orps);
2425     SSE_OP2(orpd);
2426     SSE_OP2(xorps);
2427     SSE_OP2(xorpd);
2428
2429     SSE_OP2(unpcklps);
2430     SSE_OP2(unpcklpd);
2431     SSE_OP2(unpckhps);
2432     SSE_OP2(unpckhpd);
2433
2434     SHUF_OP(shufps, 0x78);
2435     SHUF_OP(shufpd, 0x02);
2436
2437     PSHUF_OP(pshufd, 0x78);
2438     PSHUF_OP(pshuflw, 0x78);
2439     PSHUF_OP(pshufhw, 0x78);
2440
2441     SHIFT_OP(psrlw, 7);
2442     SHIFT_OP(psrlw, 16);
2443     SHIFT_OP(psraw, 7);
2444     SHIFT_OP(psraw, 16);
2445     SHIFT_OP(psllw, 7);
2446     SHIFT_OP(psllw, 16);
2447
2448     SHIFT_OP(psrld, 7);
2449     SHIFT_OP(psrld, 32);
2450     SHIFT_OP(psrad, 7);
2451     SHIFT_OP(psrad, 32);
2452     SHIFT_OP(pslld, 7);
2453     SHIFT_OP(pslld, 32);
2454
2455     SHIFT_OP(psrlq, 7);
2456     SHIFT_OP(psrlq, 32);
2457     SHIFT_OP(psllq, 7);
2458     SHIFT_OP(psllq, 32);
2459
2460     SHIFT_IM(psrldq, 16);
2461     SHIFT_IM(psrldq, 7);
2462     SHIFT_IM(pslldq, 16);
2463     SHIFT_IM(pslldq, 7);
2464
2465     MOVMSK(movmskps);
2466     MOVMSK(movmskpd);
2467
2468     /* FPU specific ops */
2469
2470     {
2471         uint32_t mxcsr;
2472         asm volatile("stmxcsr %0" : "=m" (mxcsr));
2473         printf("mxcsr=%08x\n", mxcsr & 0x1f80);
2474         asm volatile("ldmxcsr %0" : : "m" (mxcsr));
2475     }
2476
2477     test_sse_comi(2, -1);
2478     test_sse_comi(2, 2);
2479     test_sse_comi(2, 3);
2480     test_sse_comi(2, q_nan.d);
2481     test_sse_comi(q_nan.d, -1);
2482
2483     for(i = 0; i < 2; i++) {
2484         a.s[0] = 2.7;
2485         a.s[1] = 3.4;
2486         a.s[2] = 4;
2487         a.s[3] = -6.3;
2488         b.s[0] = 45.7;
2489         b.s[1] = 353.4;
2490         b.s[2] = 4;
2491         b.s[3] = 56.3;
2492         if (i == 1) {
2493             a.s[0] = q_nan.d;
2494             b.s[3] = q_nan.d;
2495         }
2496
2497         SSE_OPS(add);
2498         SSE_OPS(mul);
2499         SSE_OPS(sub);
2500         SSE_OPS(min);
2501         SSE_OPS(div);
2502         SSE_OPS(max);
2503         SSE_OPS(sqrt);
2504         SSE_OPS(cmpeq);
2505         SSE_OPS(cmplt);
2506         SSE_OPS(cmple);
2507         SSE_OPS(cmpunord);
2508         SSE_OPS(cmpneq);
2509         SSE_OPS(cmpnlt);
2510         SSE_OPS(cmpnle);
2511         SSE_OPS(cmpord);
2512
2513
2514         a.d[0] = 2.7;
2515         a.d[1] = -3.4;
2516         b.d[0] = 45.7;
2517         b.d[1] = -53.4;
2518         if (i == 1) {
2519             a.d[0] = q_nan.d;
2520             b.d[1] = q_nan.d;
2521         }
2522         SSE_OPD(add);
2523         SSE_OPD(mul);
2524         SSE_OPD(sub);
2525         SSE_OPD(min);
2526         SSE_OPD(div);
2527         SSE_OPD(max);
2528         SSE_OPD(sqrt);
2529         SSE_OPD(cmpeq);
2530         SSE_OPD(cmplt);
2531         SSE_OPD(cmple);
2532         SSE_OPD(cmpunord);
2533         SSE_OPD(cmpneq);
2534         SSE_OPD(cmpnlt);
2535         SSE_OPD(cmpnle);
2536         SSE_OPD(cmpord);
2537     }
2538
2539     /* float to float/int */
2540     a.s[0] = 2.7;
2541     a.s[1] = 3.4;
2542     a.s[2] = 4;
2543     a.s[3] = -6.3;
2544     CVT_OP_XMM(cvtps2pd);
2545     CVT_OP_XMM(cvtss2sd);
2546     CVT_OP_XMM2MMX(cvtps2pi);
2547     CVT_OP_XMM2MMX(cvttps2pi);
2548     CVT_OP_XMM2REG(cvtss2si);
2549     CVT_OP_XMM2REG(cvttss2si);
2550     CVT_OP_XMM(cvtps2dq);
2551     CVT_OP_XMM(cvttps2dq);
2552
2553     a.d[0] = 2.6;
2554     a.d[1] = -3.4;
2555     CVT_OP_XMM(cvtpd2ps);
2556     CVT_OP_XMM(cvtsd2ss);
2557     CVT_OP_XMM2MMX(cvtpd2pi);
2558     CVT_OP_XMM2MMX(cvttpd2pi);
2559     CVT_OP_XMM2REG(cvtsd2si);
2560     CVT_OP_XMM2REG(cvttsd2si);
2561     CVT_OP_XMM(cvtpd2dq);
2562     CVT_OP_XMM(cvttpd2dq);
2563
2564     /* sse/mmx moves */
2565     CVT_OP_XMM2MMX(movdq2q);
2566     CVT_OP_MMX2XMM(movq2dq);
2567
2568     /* int to float */
2569     a.l[0] = -6;
2570     a.l[1] = 2;
2571     a.l[2] = 100;
2572     a.l[3] = -60000;
2573     CVT_OP_MMX2XMM(cvtpi2ps);
2574     CVT_OP_MMX2XMM(cvtpi2pd);
2575     CVT_OP_REG2XMM(cvtsi2ss);
2576     CVT_OP_REG2XMM(cvtsi2sd);
2577     CVT_OP_XMM(cvtdq2ps);
2578     CVT_OP_XMM(cvtdq2pd);
2579
2580     /* XXX: test PNI insns */
2581 #if 0
2582     SSE_OP2(movshdup);
2583 #endif
2584     asm volatile ("emms");
2585 }
2586
2587 #endif
2588
2589 #define TEST_CONV_RAX(op)\
2590 {\
2591     unsigned long a, r;\
2592     a = i2l(0x8234a6f8);\
2593     r = a;\
2594     asm volatile(#op : "=a" (r) : "0" (r));\
2595     printf("%-10s A=" FMTLX " R=" FMTLX "\n", #op, a, r);\
2596 }
2597
2598 #define TEST_CONV_RAX_RDX(op)\
2599 {\
2600     unsigned long a, d, r, rh;                   \
2601     a = i2l(0x8234a6f8);\
2602     d = i2l(0x8345a1f2);\
2603     r = a;\
2604     rh = d;\
2605     asm volatile(#op : "=a" (r), "=d" (rh) : "0" (r), "1" (rh));   \
2606     printf("%-10s A=" FMTLX " R=" FMTLX ":" FMTLX "\n", #op, a, r, rh);  \
2607 }
2608
2609 void test_conv(void)
2610 {
2611     TEST_CONV_RAX(cbw);
2612     TEST_CONV_RAX(cwde);
2613 #if defined(__x86_64__)
2614     TEST_CONV_RAX(cdqe);
2615 #endif
2616
2617     TEST_CONV_RAX_RDX(cwd);
2618     TEST_CONV_RAX_RDX(cdq);
2619 #if defined(__x86_64__)
2620     TEST_CONV_RAX_RDX(cqo);
2621 #endif
2622 }
2623
2624 extern void *__start_initcall;
2625 extern void *__stop_initcall;
2626
2627
2628 int main(int argc, char **argv)
2629 {
2630     void **ptr;
2631     void (*func)(void);
2632
2633     ptr = &__start_initcall;
2634     while (ptr != &__stop_initcall) {
2635         func = *ptr++;
2636         func();
2637     }
2638     test_bsx();
2639     test_mul();
2640     test_jcc();
2641     test_floats();
2642 #if !defined(__x86_64__)
2643     test_bcd();
2644 #endif
2645     test_xchg();
2646     test_string();
2647     test_misc();
2648     test_lea();
2649 #ifdef TEST_SEGS
2650     test_segs();
2651     test_code16();
2652 #endif
2653 #ifdef TEST_VM86
2654     test_vm86();
2655 #endif
2656     test_exceptions();
2657 #if !defined(__x86_64__)
2658     test_self_modifying_code();
2659     test_single_step();
2660 #endif
2661     test_enter();
2662     test_conv();
2663 #ifdef TEST_SSE
2664     test_sse();
2665     test_fxsave();
2666 #endif
2667     return 0;
2668 }