4 * Copyright (c) 2003-2005 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA 02110-1301 USA
21 #include "qemu-common.h"
22 #ifdef CONFIG_USER_ONLY
34 #include "qemu-char.h"
39 #define MAX_PACKET_LENGTH 4096
41 #include "qemu_socket.h"
49 GDB_SIGNAL_UNKNOWN
= 143
52 #ifdef CONFIG_USER_ONLY
54 /* Map target signal numbers to GDB protocol signal numbers and vice
55 * versa. For user emulation's currently supported systems, we can
56 * assume most signals are defined.
59 static int gdb_signal_table
[] = {
219 /* In system mode we only need SIGINT and SIGTRAP; other signals
220 are not yet supported. */
227 static int gdb_signal_table
[] = {
237 #ifdef CONFIG_USER_ONLY
238 static int target_signal_to_gdb (int sig
)
241 for (i
= 0; i
< ARRAY_SIZE (gdb_signal_table
); i
++)
242 if (gdb_signal_table
[i
] == sig
)
244 return GDB_SIGNAL_UNKNOWN
;
248 static int gdb_signal_to_target (int sig
)
250 if (sig
< ARRAY_SIZE (gdb_signal_table
))
251 return gdb_signal_table
[sig
];
258 typedef struct GDBRegisterState
{
264 struct GDBRegisterState
*next
;
275 typedef struct GDBState
{
276 CPUState
*c_cpu
; /* current CPU for step/continue ops */
277 CPUState
*g_cpu
; /* current CPU for other ops */
278 CPUState
*query_cpu
; /* for q{f|s}ThreadInfo */
279 enum RSState state
; /* parsing state */
280 char line_buf
[MAX_PACKET_LENGTH
];
283 uint8_t last_packet
[MAX_PACKET_LENGTH
+ 4];
286 #ifdef CONFIG_USER_ONLY
290 CharDriverState
*chr
;
291 CharDriverState
*mon_chr
;
295 /* By default use no IRQs and no timers while single stepping so as to
296 * make single stepping like an ICE HW step.
298 static int sstep_flags
= SSTEP_ENABLE
|SSTEP_NOIRQ
|SSTEP_NOTIMER
;
300 static GDBState
*gdbserver_state
;
302 /* This is an ugly hack to cope with both new and old gdb.
303 If gdb sends qXfer:features:read then assume we're talking to a newish
304 gdb that understands target descriptions. */
305 static int gdb_has_xml
;
307 #ifdef CONFIG_USER_ONLY
308 /* XXX: This is not thread safe. Do we care? */
309 static int gdbserver_fd
= -1;
311 static int get_char(GDBState
*s
)
317 ret
= recv(s
->fd
, &ch
, 1, 0);
319 if (errno
== ECONNRESET
)
321 if (errno
!= EINTR
&& errno
!= EAGAIN
)
323 } else if (ret
== 0) {
335 static gdb_syscall_complete_cb gdb_current_syscall_cb
;
343 /* If gdb is connected when the first semihosting syscall occurs then use
344 remote gdb syscalls. Otherwise use native file IO. */
345 int use_gdb_syscalls(void)
347 if (gdb_syscall_mode
== GDB_SYS_UNKNOWN
) {
348 gdb_syscall_mode
= (gdbserver_state
? GDB_SYS_ENABLED
351 return gdb_syscall_mode
== GDB_SYS_ENABLED
;
354 /* Resume execution. */
355 static inline void gdb_continue(GDBState
*s
)
357 #ifdef CONFIG_USER_ONLY
358 s
->running_state
= 1;
364 static void put_buffer(GDBState
*s
, const uint8_t *buf
, int len
)
366 #ifdef CONFIG_USER_ONLY
370 ret
= send(s
->fd
, buf
, len
, 0);
372 if (errno
!= EINTR
&& errno
!= EAGAIN
)
380 qemu_chr_write(s
->chr
, buf
, len
);
384 static inline int fromhex(int v
)
386 if (v
>= '0' && v
<= '9')
388 else if (v
>= 'A' && v
<= 'F')
390 else if (v
>= 'a' && v
<= 'f')
396 static inline int tohex(int v
)
404 static void memtohex(char *buf
, const uint8_t *mem
, int len
)
409 for(i
= 0; i
< len
; i
++) {
411 *q
++ = tohex(c
>> 4);
412 *q
++ = tohex(c
& 0xf);
417 static void hextomem(uint8_t *mem
, const char *buf
, int len
)
421 for(i
= 0; i
< len
; i
++) {
422 mem
[i
] = (fromhex(buf
[0]) << 4) | fromhex(buf
[1]);
427 /* return -1 if error, 0 if OK */
428 static int put_packet_binary(GDBState
*s
, const char *buf
, int len
)
439 for(i
= 0; i
< len
; i
++) {
443 *(p
++) = tohex((csum
>> 4) & 0xf);
444 *(p
++) = tohex((csum
) & 0xf);
446 s
->last_packet_len
= p
- s
->last_packet
;
447 put_buffer(s
, (uint8_t *)s
->last_packet
, s
->last_packet_len
);
449 #ifdef CONFIG_USER_ONLY
462 /* return -1 if error, 0 if OK */
463 static int put_packet(GDBState
*s
, const char *buf
)
466 printf("reply='%s'\n", buf
);
469 return put_packet_binary(s
, buf
, strlen(buf
));
472 /* The GDB remote protocol transfers values in target byte order. This means
473 we can use the raw memory access routines to access the value buffer.
474 Conveniently, these also handle the case where the buffer is mis-aligned.
476 #define GET_REG8(val) do { \
477 stb_p(mem_buf, val); \
480 #define GET_REG16(val) do { \
481 stw_p(mem_buf, val); \
484 #define GET_REG32(val) do { \
485 stl_p(mem_buf, val); \
488 #define GET_REG64(val) do { \
489 stq_p(mem_buf, val); \
493 #if TARGET_LONG_BITS == 64
494 #define GET_REGL(val) GET_REG64(val)
495 #define ldtul_p(addr) ldq_p(addr)
497 #define GET_REGL(val) GET_REG32(val)
498 #define ldtul_p(addr) ldl_p(addr)
501 #if defined(TARGET_I386)
504 static const int gpr_map
[16] = {
505 R_EAX
, R_EBX
, R_ECX
, R_EDX
, R_ESI
, R_EDI
, R_EBP
, R_ESP
,
506 8, 9, 10, 11, 12, 13, 14, 15
509 static const int gpr_map
[8] = {0, 1, 2, 3, 4, 5, 6, 7};
512 #define NUM_CORE_REGS (CPU_NB_REGS * 2 + 25)
514 static int cpu_gdb_read_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
516 if (n
< CPU_NB_REGS
) {
517 GET_REGL(env
->regs
[gpr_map
[n
]]);
518 } else if (n
>= CPU_NB_REGS
+ 8 && n
< CPU_NB_REGS
+ 16) {
519 /* FIXME: byteswap float values. */
520 #ifdef USE_X86LDOUBLE
521 memcpy(mem_buf
, &env
->fpregs
[n
- (CPU_NB_REGS
+ 8)], 10);
523 memset(mem_buf
, 0, 10);
526 } else if (n
>= CPU_NB_REGS
+ 24) {
527 n
-= CPU_NB_REGS
+ 24;
528 if (n
< CPU_NB_REGS
) {
529 stq_p(mem_buf
, env
->xmm_regs
[n
].XMM_Q(0));
530 stq_p(mem_buf
+ 8, env
->xmm_regs
[n
].XMM_Q(1));
532 } else if (n
== CPU_NB_REGS
) {
533 GET_REG32(env
->mxcsr
);
538 case 0: GET_REGL(env
->eip
);
539 case 1: GET_REG32(env
->eflags
);
540 case 2: GET_REG32(env
->segs
[R_CS
].selector
);
541 case 3: GET_REG32(env
->segs
[R_SS
].selector
);
542 case 4: GET_REG32(env
->segs
[R_DS
].selector
);
543 case 5: GET_REG32(env
->segs
[R_ES
].selector
);
544 case 6: GET_REG32(env
->segs
[R_FS
].selector
);
545 case 7: GET_REG32(env
->segs
[R_GS
].selector
);
546 /* 8...15 x87 regs. */
547 case 16: GET_REG32(env
->fpuc
);
548 case 17: GET_REG32((env
->fpus
& ~0x3800) | (env
->fpstt
& 0x7) << 11);
549 case 18: GET_REG32(0); /* ftag */
550 case 19: GET_REG32(0); /* fiseg */
551 case 20: GET_REG32(0); /* fioff */
552 case 21: GET_REG32(0); /* foseg */
553 case 22: GET_REG32(0); /* fooff */
554 case 23: GET_REG32(0); /* fop */
561 static int cpu_gdb_write_register(CPUState
*env
, uint8_t *mem_buf
, int i
)
565 if (i
< CPU_NB_REGS
) {
566 env
->regs
[gpr_map
[i
]] = ldtul_p(mem_buf
);
567 return sizeof(target_ulong
);
568 } else if (i
>= CPU_NB_REGS
+ 8 && i
< CPU_NB_REGS
+ 16) {
569 i
-= CPU_NB_REGS
+ 8;
570 #ifdef USE_X86LDOUBLE
571 memcpy(&env
->fpregs
[i
], mem_buf
, 10);
574 } else if (i
>= CPU_NB_REGS
+ 24) {
575 i
-= CPU_NB_REGS
+ 24;
576 if (i
< CPU_NB_REGS
) {
577 env
->xmm_regs
[i
].XMM_Q(0) = ldq_p(mem_buf
);
578 env
->xmm_regs
[i
].XMM_Q(1) = ldq_p(mem_buf
+ 8);
580 } else if (i
== CPU_NB_REGS
) {
581 env
->mxcsr
= ldl_p(mem_buf
);
587 case 0: env
->eip
= ldtul_p(mem_buf
); return sizeof(target_ulong
);
588 case 1: env
->eflags
= ldl_p(mem_buf
); return 4;
589 #if defined(CONFIG_USER_ONLY)
590 #define LOAD_SEG(index, sreg)\
591 tmp = ldl_p(mem_buf);\
592 if (tmp != env->segs[sreg].selector)\
593 cpu_x86_load_seg(env, sreg, tmp);
595 /* FIXME: Honor segment registers. Needs to avoid raising an exception
596 when the selector is invalid. */
597 #define LOAD_SEG(index, sreg) do {} while(0)
599 case 2: LOAD_SEG(10, R_CS
); return 4;
600 case 3: LOAD_SEG(11, R_SS
); return 4;
601 case 4: LOAD_SEG(12, R_DS
); return 4;
602 case 5: LOAD_SEG(13, R_ES
); return 4;
603 case 6: LOAD_SEG(14, R_FS
); return 4;
604 case 7: LOAD_SEG(15, R_GS
); return 4;
605 /* 8...15 x87 regs. */
606 case 16: env
->fpuc
= ldl_p(mem_buf
); return 4;
608 tmp
= ldl_p(mem_buf
);
609 env
->fpstt
= (tmp
>> 11) & 7;
610 env
->fpus
= tmp
& ~0x3800;
612 case 18: /* ftag */ return 4;
613 case 19: /* fiseg */ return 4;
614 case 20: /* fioff */ return 4;
615 case 21: /* foseg */ return 4;
616 case 22: /* fooff */ return 4;
617 case 23: /* fop */ return 4;
621 /* Unrecognised register. */
625 #elif defined (TARGET_PPC)
627 /* Old gdb always expects FP registers. Newer (xml-aware) gdb only
628 expects whatever the target description contains. Due to a
629 historical mishap the FP registers appear in between core integer
630 regs and PC, MSR, CR, and so forth. We hack round this by giving the
631 FP regs zero size when talking to a newer gdb. */
632 #define NUM_CORE_REGS 71
633 #if defined (TARGET_PPC64)
634 #define GDB_CORE_XML "power64-core.xml"
636 #define GDB_CORE_XML "power-core.xml"
639 static int cpu_gdb_read_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
643 GET_REGL(env
->gpr
[n
]);
648 stfq_p(mem_buf
, env
->fpr
[n
-32]);
652 case 64: GET_REGL(env
->nip
);
653 case 65: GET_REGL(env
->msr
);
658 for (i
= 0; i
< 8; i
++)
659 cr
|= env
->crf
[i
] << (32 - ((i
+ 1) * 4));
662 case 67: GET_REGL(env
->lr
);
663 case 68: GET_REGL(env
->ctr
);
664 case 69: GET_REGL(env
->xer
);
669 GET_REG32(0); /* fpscr */
676 static int cpu_gdb_write_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
680 env
->gpr
[n
] = ldtul_p(mem_buf
);
681 return sizeof(target_ulong
);
686 env
->fpr
[n
-32] = ldfq_p(mem_buf
);
691 env
->nip
= ldtul_p(mem_buf
);
692 return sizeof(target_ulong
);
694 ppc_store_msr(env
, ldtul_p(mem_buf
));
695 return sizeof(target_ulong
);
698 uint32_t cr
= ldl_p(mem_buf
);
700 for (i
= 0; i
< 8; i
++)
701 env
->crf
[i
] = (cr
>> (32 - ((i
+ 1) * 4))) & 0xF;
705 env
->lr
= ldtul_p(mem_buf
);
706 return sizeof(target_ulong
);
708 env
->ctr
= ldtul_p(mem_buf
);
709 return sizeof(target_ulong
);
711 env
->xer
= ldtul_p(mem_buf
);
712 return sizeof(target_ulong
);
723 #elif defined (TARGET_SPARC)
725 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
726 #define NUM_CORE_REGS 86
728 #define NUM_CORE_REGS 72
732 #define GET_REGA(val) GET_REG32(val)
734 #define GET_REGA(val) GET_REGL(val)
737 static int cpu_gdb_read_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
741 GET_REGA(env
->gregs
[n
]);
744 /* register window */
745 GET_REGA(env
->regwptr
[n
- 8]);
747 #if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
750 GET_REG32(*((uint32_t *)&env
->fpr
[n
- 32]));
752 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
754 case 64: GET_REGA(env
->y
);
755 case 65: GET_REGA(GET_PSR(env
));
756 case 66: GET_REGA(env
->wim
);
757 case 67: GET_REGA(env
->tbr
);
758 case 68: GET_REGA(env
->pc
);
759 case 69: GET_REGA(env
->npc
);
760 case 70: GET_REGA(env
->fsr
);
761 case 71: GET_REGA(0); /* csr */
762 default: GET_REGA(0);
767 GET_REG32(*((uint32_t *)&env
->fpr
[n
- 32]));
770 /* f32-f62 (double width, even numbers only) */
773 val
= (uint64_t)*((uint32_t *)&env
->fpr
[(n
- 64) * 2 + 32]) << 32;
774 val
|= *((uint32_t *)&env
->fpr
[(n
- 64) * 2 + 33]);
778 case 80: GET_REGL(env
->pc
);
779 case 81: GET_REGL(env
->npc
);
780 case 82: GET_REGL(((uint64_t)GET_CCR(env
) << 32) |
781 ((env
->asi
& 0xff) << 24) |
782 ((env
->pstate
& 0xfff) << 8) |
784 case 83: GET_REGL(env
->fsr
);
785 case 84: GET_REGL(env
->fprs
);
786 case 85: GET_REGL(env
->y
);
792 static int cpu_gdb_write_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
794 #if defined(TARGET_ABI32)
797 tmp
= ldl_p(mem_buf
);
801 tmp
= ldtul_p(mem_buf
);
808 /* register window */
809 env
->regwptr
[n
- 8] = tmp
;
811 #if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
814 *((uint32_t *)&env
->fpr
[n
- 32]) = tmp
;
816 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
818 case 64: env
->y
= tmp
; break;
819 case 65: PUT_PSR(env
, tmp
); break;
820 case 66: env
->wim
= tmp
; break;
821 case 67: env
->tbr
= tmp
; break;
822 case 68: env
->pc
= tmp
; break;
823 case 69: env
->npc
= tmp
; break;
824 case 70: env
->fsr
= tmp
; break;
832 env
->fpr
[n
] = ldfl_p(mem_buf
);
835 /* f32-f62 (double width, even numbers only) */
836 *((uint32_t *)&env
->fpr
[(n
- 64) * 2 + 32]) = tmp
>> 32;
837 *((uint32_t *)&env
->fpr
[(n
- 64) * 2 + 33]) = tmp
;
840 case 80: env
->pc
= tmp
; break;
841 case 81: env
->npc
= tmp
; break;
843 PUT_CCR(env
, tmp
>> 32);
844 env
->asi
= (tmp
>> 24) & 0xff;
845 env
->pstate
= (tmp
>> 8) & 0xfff;
846 PUT_CWP64(env
, tmp
& 0xff);
848 case 83: env
->fsr
= tmp
; break;
849 case 84: env
->fprs
= tmp
; break;
850 case 85: env
->y
= tmp
; break;
857 #elif defined (TARGET_ARM)
859 /* Old gdb always expect FPA registers. Newer (xml-aware) gdb only expect
860 whatever the target description contains. Due to a historical mishap
861 the FPA registers appear in between core integer regs and the CPSR.
862 We hack round this by giving the FPA regs zero size when talking to a
864 #define NUM_CORE_REGS 26
865 #define GDB_CORE_XML "arm-core.xml"
867 static int cpu_gdb_read_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
870 /* Core integer register. */
871 GET_REG32(env
->regs
[n
]);
877 memset(mem_buf
, 0, 12);
882 /* FPA status register. */
888 GET_REG32(cpsr_read(env
));
890 /* Unknown register. */
894 static int cpu_gdb_write_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
898 tmp
= ldl_p(mem_buf
);
900 /* Mask out low bit of PC to workaround gdb bugs. This will probably
901 cause problems if we ever implement the Jazelle DBX extensions. */
906 /* Core integer register. */
910 if (n
< 24) { /* 16-23 */
911 /* FPA registers (ignored). */
918 /* FPA status register (ignored). */
924 cpsr_write (env
, tmp
, 0xffffffff);
927 /* Unknown register. */
931 #elif defined (TARGET_M68K)
933 #define NUM_CORE_REGS 18
935 #define GDB_CORE_XML "cf-core.xml"
937 static int cpu_gdb_read_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
941 GET_REG32(env
->dregs
[n
]);
944 GET_REG32(env
->aregs
[n
- 8]);
947 case 16: GET_REG32(env
->sr
);
948 case 17: GET_REG32(env
->pc
);
951 /* FP registers not included here because they vary between
952 ColdFire and m68k. Use XML bits for these. */
956 static int cpu_gdb_write_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
960 tmp
= ldl_p(mem_buf
);
967 env
->aregs
[n
- 8] = tmp
;
970 case 16: env
->sr
= tmp
; break;
971 case 17: env
->pc
= tmp
; break;
977 #elif defined (TARGET_MIPS)
979 #define NUM_CORE_REGS 73
981 static int cpu_gdb_read_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
984 GET_REGL(env
->active_tc
.gpr
[n
]);
986 if (env
->CP0_Config1
& (1 << CP0C1_FP
)) {
987 if (n
>= 38 && n
< 70) {
988 if (env
->CP0_Status
& (1 << CP0St_FR
))
989 GET_REGL(env
->active_fpu
.fpr
[n
- 38].d
);
991 GET_REGL(env
->active_fpu
.fpr
[n
- 38].w
[FP_ENDIAN_IDX
]);
994 case 70: GET_REGL((int32_t)env
->active_fpu
.fcr31
);
995 case 71: GET_REGL((int32_t)env
->active_fpu
.fcr0
);
999 case 32: GET_REGL((int32_t)env
->CP0_Status
);
1000 case 33: GET_REGL(env
->active_tc
.LO
[0]);
1001 case 34: GET_REGL(env
->active_tc
.HI
[0]);
1002 case 35: GET_REGL(env
->CP0_BadVAddr
);
1003 case 36: GET_REGL((int32_t)env
->CP0_Cause
);
1004 case 37: GET_REGL(env
->active_tc
.PC
);
1005 case 72: GET_REGL(0); /* fp */
1006 case 89: GET_REGL((int32_t)env
->CP0_PRid
);
1008 if (n
>= 73 && n
<= 88) {
1009 /* 16 embedded regs. */
1016 /* convert MIPS rounding mode in FCR31 to IEEE library */
1017 static unsigned int ieee_rm
[] =
1019 float_round_nearest_even
,
1020 float_round_to_zero
,
1024 #define RESTORE_ROUNDING_MODE \
1025 set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3], &env->active_fpu.fp_status)
1027 static int cpu_gdb_write_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
1031 tmp
= ldtul_p(mem_buf
);
1034 env
->active_tc
.gpr
[n
] = tmp
;
1035 return sizeof(target_ulong
);
1037 if (env
->CP0_Config1
& (1 << CP0C1_FP
)
1038 && n
>= 38 && n
< 73) {
1040 if (env
->CP0_Status
& (1 << CP0St_FR
))
1041 env
->active_fpu
.fpr
[n
- 38].d
= tmp
;
1043 env
->active_fpu
.fpr
[n
- 38].w
[FP_ENDIAN_IDX
] = tmp
;
1047 env
->active_fpu
.fcr31
= tmp
& 0xFF83FFFF;
1048 /* set rounding mode */
1049 RESTORE_ROUNDING_MODE
;
1050 #ifndef CONFIG_SOFTFLOAT
1051 /* no floating point exception for native float */
1052 SET_FP_ENABLE(env
->active_fpu
.fcr31
, 0);
1055 case 71: env
->active_fpu
.fcr0
= tmp
; break;
1057 return sizeof(target_ulong
);
1060 case 32: env
->CP0_Status
= tmp
; break;
1061 case 33: env
->active_tc
.LO
[0] = tmp
; break;
1062 case 34: env
->active_tc
.HI
[0] = tmp
; break;
1063 case 35: env
->CP0_BadVAddr
= tmp
; break;
1064 case 36: env
->CP0_Cause
= tmp
; break;
1065 case 37: env
->active_tc
.PC
= tmp
; break;
1066 case 72: /* fp, ignored */ break;
1070 /* Other registers are readonly. Ignore writes. */
1074 return sizeof(target_ulong
);
1076 #elif defined (TARGET_SH4)
1078 /* Hint: Use "set architecture sh4" in GDB to see fpu registers */
1079 /* FIXME: We should use XML for this. */
1081 #define NUM_CORE_REGS 59
1083 static int cpu_gdb_read_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
1086 if ((env
->sr
& (SR_MD
| SR_RB
)) == (SR_MD
| SR_RB
)) {
1087 GET_REGL(env
->gregs
[n
+ 16]);
1089 GET_REGL(env
->gregs
[n
]);
1091 } else if (n
< 16) {
1092 GET_REGL(env
->gregs
[n
- 8]);
1093 } else if (n
>= 25 && n
< 41) {
1094 GET_REGL(env
->fregs
[(n
- 25) + ((env
->fpscr
& FPSCR_FR
) ? 16 : 0)]);
1095 } else if (n
>= 43 && n
< 51) {
1096 GET_REGL(env
->gregs
[n
- 43]);
1097 } else if (n
>= 51 && n
< 59) {
1098 GET_REGL(env
->gregs
[n
- (51 - 16)]);
1101 case 16: GET_REGL(env
->pc
);
1102 case 17: GET_REGL(env
->pr
);
1103 case 18: GET_REGL(env
->gbr
);
1104 case 19: GET_REGL(env
->vbr
);
1105 case 20: GET_REGL(env
->mach
);
1106 case 21: GET_REGL(env
->macl
);
1107 case 22: GET_REGL(env
->sr
);
1108 case 23: GET_REGL(env
->fpul
);
1109 case 24: GET_REGL(env
->fpscr
);
1110 case 41: GET_REGL(env
->ssr
);
1111 case 42: GET_REGL(env
->spc
);
1117 static int cpu_gdb_write_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
1121 tmp
= ldl_p(mem_buf
);
1124 if ((env
->sr
& (SR_MD
| SR_RB
)) == (SR_MD
| SR_RB
)) {
1125 env
->gregs
[n
+ 16] = tmp
;
1127 env
->gregs
[n
] = tmp
;
1130 } else if (n
< 16) {
1131 env
->gregs
[n
- 8] = tmp
;
1133 } else if (n
>= 25 && n
< 41) {
1134 env
->fregs
[(n
- 25) + ((env
->fpscr
& FPSCR_FR
) ? 16 : 0)] = tmp
;
1135 } else if (n
>= 43 && n
< 51) {
1136 env
->gregs
[n
- 43] = tmp
;
1138 } else if (n
>= 51 && n
< 59) {
1139 env
->gregs
[n
- (51 - 16)] = tmp
;
1143 case 16: env
->pc
= tmp
;
1144 case 17: env
->pr
= tmp
;
1145 case 18: env
->gbr
= tmp
;
1146 case 19: env
->vbr
= tmp
;
1147 case 20: env
->mach
= tmp
;
1148 case 21: env
->macl
= tmp
;
1149 case 22: env
->sr
= tmp
;
1150 case 23: env
->fpul
= tmp
;
1151 case 24: env
->fpscr
= tmp
;
1152 case 41: env
->ssr
= tmp
;
1153 case 42: env
->spc
= tmp
;
1159 #elif defined (TARGET_CRIS)
1161 #define NUM_CORE_REGS 49
1163 static int cpu_gdb_read_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
1167 srs
= env
->pregs
[PR_SRS
];
1169 GET_REG32(env
->regs
[n
]);
1172 if (n
>= 21 && n
< 32) {
1173 GET_REG32(env
->pregs
[n
- 16]);
1175 if (n
>= 33 && n
< 49) {
1176 GET_REG32(env
->sregs
[srs
][n
- 33]);
1179 case 16: GET_REG8(env
->pregs
[0]);
1180 case 17: GET_REG8(env
->pregs
[1]);
1181 case 18: GET_REG32(env
->pregs
[2]);
1182 case 19: GET_REG8(srs
);
1183 case 20: GET_REG16(env
->pregs
[4]);
1184 case 32: GET_REG32(env
->pc
);
1190 static int cpu_gdb_write_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
1197 tmp
= ldl_p(mem_buf
);
1203 if (n
>= 21 && n
< 32) {
1204 env
->pregs
[n
- 16] = tmp
;
1207 /* FIXME: Should support function regs be writable? */
1211 case 18: env
->pregs
[PR_PID
] = tmp
; break;
1214 case 32: env
->pc
= tmp
; break;
1219 #elif defined (TARGET_ALPHA)
1221 #define NUM_CORE_REGS 65
1223 static int cpu_gdb_read_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
1226 GET_REGL(env
->ir
[n
]);
1234 val
=*((uint64_t *)&env
->fir
[n
-32]);
1238 GET_REGL(env
->fpcr
);
1250 static int cpu_gdb_write_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
1253 tmp
= ldtul_p(mem_buf
);
1259 if (n
> 31 && n
< 63) {
1260 env
->fir
[n
- 32] = ldfl_p(mem_buf
);
1271 #define NUM_CORE_REGS 0
1273 static int cpu_gdb_read_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
1278 static int cpu_gdb_write_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
1285 static int num_g_regs
= NUM_CORE_REGS
;
1288 /* Encode data using the encoding for 'x' packets. */
1289 static int memtox(char *buf
, const char *mem
, int len
)
1297 case '#': case '$': case '*': case '}':
1309 static const char *get_feature_xml(const char *p
, const char **newp
)
1311 extern const char *const xml_builtin
[][2];
1315 static char target_xml
[1024];
1318 while (p
[len
] && p
[len
] != ':')
1323 if (strncmp(p
, "target.xml", len
) == 0) {
1324 /* Generate the XML description for this CPU. */
1325 if (!target_xml
[0]) {
1326 GDBRegisterState
*r
;
1328 snprintf(target_xml
, sizeof(target_xml
),
1329 "<?xml version=\"1.0\"?>"
1330 "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">"
1332 "<xi:include href=\"%s\"/>",
1335 for (r
= first_cpu
->gdb_regs
; r
; r
= r
->next
) {
1336 strcat(target_xml
, "<xi:include href=\"");
1337 strcat(target_xml
, r
->xml
);
1338 strcat(target_xml
, "\"/>");
1340 strcat(target_xml
, "</target>");
1344 for (i
= 0; ; i
++) {
1345 name
= xml_builtin
[i
][0];
1346 if (!name
|| (strncmp(name
, p
, len
) == 0 && strlen(name
) == len
))
1349 return name
? xml_builtin
[i
][1] : NULL
;
1353 static int gdb_read_register(CPUState
*env
, uint8_t *mem_buf
, int reg
)
1355 GDBRegisterState
*r
;
1357 if (reg
< NUM_CORE_REGS
)
1358 return cpu_gdb_read_register(env
, mem_buf
, reg
);
1360 for (r
= env
->gdb_regs
; r
; r
= r
->next
) {
1361 if (r
->base_reg
<= reg
&& reg
< r
->base_reg
+ r
->num_regs
) {
1362 return r
->get_reg(env
, mem_buf
, reg
- r
->base_reg
);
1368 static int gdb_write_register(CPUState
*env
, uint8_t *mem_buf
, int reg
)
1370 GDBRegisterState
*r
;
1372 if (reg
< NUM_CORE_REGS
)
1373 return cpu_gdb_write_register(env
, mem_buf
, reg
);
1375 for (r
= env
->gdb_regs
; r
; r
= r
->next
) {
1376 if (r
->base_reg
<= reg
&& reg
< r
->base_reg
+ r
->num_regs
) {
1377 return r
->set_reg(env
, mem_buf
, reg
- r
->base_reg
);
1383 /* Register a supplemental set of CPU registers. If g_pos is nonzero it
1384 specifies the first register number and these registers are included in
1385 a standard "g" packet. Direction is relative to gdb, i.e. get_reg is
1386 gdb reading a CPU register, and set_reg is gdb modifying a CPU register.
1389 void gdb_register_coprocessor(CPUState
* env
,
1390 gdb_reg_cb get_reg
, gdb_reg_cb set_reg
,
1391 int num_regs
, const char *xml
, int g_pos
)
1393 GDBRegisterState
*s
;
1394 GDBRegisterState
**p
;
1395 static int last_reg
= NUM_CORE_REGS
;
1397 s
= (GDBRegisterState
*)qemu_mallocz(sizeof(GDBRegisterState
));
1398 s
->base_reg
= last_reg
;
1399 s
->num_regs
= num_regs
;
1400 s
->get_reg
= get_reg
;
1401 s
->set_reg
= set_reg
;
1405 /* Check for duplicates. */
1406 if (strcmp((*p
)->xml
, xml
) == 0)
1410 /* Add to end of list. */
1411 last_reg
+= num_regs
;
1414 if (g_pos
!= s
->base_reg
) {
1415 fprintf(stderr
, "Error: Bad gdb register numbering for '%s'\n"
1416 "Expected %d got %d\n", xml
, g_pos
, s
->base_reg
);
1418 num_g_regs
= last_reg
;
1423 #ifndef CONFIG_USER_ONLY
1424 static const int xlat_gdb_type
[] = {
1425 [GDB_WATCHPOINT_WRITE
] = BP_GDB
| BP_MEM_WRITE
,
1426 [GDB_WATCHPOINT_READ
] = BP_GDB
| BP_MEM_READ
,
1427 [GDB_WATCHPOINT_ACCESS
] = BP_GDB
| BP_MEM_ACCESS
,
1431 static int gdb_breakpoint_insert(target_ulong addr
, target_ulong len
, int type
)
1437 return kvm_insert_breakpoint(gdbserver_state
->c_cpu
, addr
, len
, type
);
1440 case GDB_BREAKPOINT_SW
:
1441 case GDB_BREAKPOINT_HW
:
1442 for (env
= first_cpu
; env
!= NULL
; env
= env
->next_cpu
) {
1443 err
= cpu_breakpoint_insert(env
, addr
, BP_GDB
, NULL
);
1448 #ifndef CONFIG_USER_ONLY
1449 case GDB_WATCHPOINT_WRITE
:
1450 case GDB_WATCHPOINT_READ
:
1451 case GDB_WATCHPOINT_ACCESS
:
1452 for (env
= first_cpu
; env
!= NULL
; env
= env
->next_cpu
) {
1453 err
= cpu_watchpoint_insert(env
, addr
, len
, xlat_gdb_type
[type
],
1465 static int gdb_breakpoint_remove(target_ulong addr
, target_ulong len
, int type
)
1471 return kvm_remove_breakpoint(gdbserver_state
->c_cpu
, addr
, len
, type
);
1474 case GDB_BREAKPOINT_SW
:
1475 case GDB_BREAKPOINT_HW
:
1476 for (env
= first_cpu
; env
!= NULL
; env
= env
->next_cpu
) {
1477 err
= cpu_breakpoint_remove(env
, addr
, BP_GDB
);
1482 #ifndef CONFIG_USER_ONLY
1483 case GDB_WATCHPOINT_WRITE
:
1484 case GDB_WATCHPOINT_READ
:
1485 case GDB_WATCHPOINT_ACCESS
:
1486 for (env
= first_cpu
; env
!= NULL
; env
= env
->next_cpu
) {
1487 err
= cpu_watchpoint_remove(env
, addr
, len
, xlat_gdb_type
[type
]);
1498 static void gdb_breakpoint_remove_all(void)
1502 if (kvm_enabled()) {
1503 kvm_remove_all_breakpoints(gdbserver_state
->c_cpu
);
1507 for (env
= first_cpu
; env
!= NULL
; env
= env
->next_cpu
) {
1508 cpu_breakpoint_remove_all(env
, BP_GDB
);
1509 #ifndef CONFIG_USER_ONLY
1510 cpu_watchpoint_remove_all(env
, BP_GDB
);
1515 static int gdb_handle_packet(GDBState
*s
, const char *line_buf
)
1519 int ch
, reg_size
, type
, res
, thread
;
1520 char buf
[MAX_PACKET_LENGTH
];
1521 uint8_t mem_buf
[MAX_PACKET_LENGTH
];
1523 target_ulong addr
, len
;
1526 printf("command='%s'\n", line_buf
);
1532 /* TODO: Make this return the correct value for user-mode. */
1533 snprintf(buf
, sizeof(buf
), "T%02xthread:%02x;", GDB_SIGNAL_TRAP
,
1534 s
->c_cpu
->cpu_index
+1);
1536 /* Remove all the breakpoints when this query is issued,
1537 * because gdb is doing and initial connect and the state
1538 * should be cleaned up.
1540 gdb_breakpoint_remove_all();
1544 addr
= strtoull(p
, (char **)&p
, 16);
1545 #if defined(TARGET_I386)
1546 s
->c_cpu
->eip
= addr
;
1547 cpu_synchronize_state(s
->c_cpu
, 1);
1548 #elif defined (TARGET_PPC)
1549 s
->c_cpu
->nip
= addr
;
1550 #elif defined (TARGET_SPARC)
1551 s
->c_cpu
->pc
= addr
;
1552 s
->c_cpu
->npc
= addr
+ 4;
1553 #elif defined (TARGET_ARM)
1554 s
->c_cpu
->regs
[15] = addr
;
1555 #elif defined (TARGET_SH4)
1556 s
->c_cpu
->pc
= addr
;
1557 #elif defined (TARGET_MIPS)
1558 s
->c_cpu
->active_tc
.PC
= addr
;
1559 #elif defined (TARGET_CRIS)
1560 s
->c_cpu
->pc
= addr
;
1561 #elif defined (TARGET_ALPHA)
1562 s
->c_cpu
->pc
= addr
;
1569 s
->signal
= gdb_signal_to_target (strtoul(p
, (char **)&p
, 16));
1570 if (s
->signal
== -1)
1575 /* Kill the target */
1576 fprintf(stderr
, "\nQEMU: Terminated via GDBstub\n");
1580 gdb_breakpoint_remove_all();
1582 put_packet(s
, "OK");
1586 addr
= strtoull(p
, (char **)&p
, 16);
1587 #if defined(TARGET_I386)
1588 s
->c_cpu
->eip
= addr
;
1589 cpu_synchronize_state(s
->c_cpu
, 1);
1590 #elif defined (TARGET_PPC)
1591 s
->c_cpu
->nip
= addr
;
1592 #elif defined (TARGET_SPARC)
1593 s
->c_cpu
->pc
= addr
;
1594 s
->c_cpu
->npc
= addr
+ 4;
1595 #elif defined (TARGET_ARM)
1596 s
->c_cpu
->regs
[15] = addr
;
1597 #elif defined (TARGET_SH4)
1598 s
->c_cpu
->pc
= addr
;
1599 #elif defined (TARGET_MIPS)
1600 s
->c_cpu
->active_tc
.PC
= addr
;
1601 #elif defined (TARGET_CRIS)
1602 s
->c_cpu
->pc
= addr
;
1603 #elif defined (TARGET_ALPHA)
1604 s
->c_cpu
->pc
= addr
;
1607 cpu_single_step(s
->c_cpu
, sstep_flags
);
1615 ret
= strtoull(p
, (char **)&p
, 16);
1618 err
= strtoull(p
, (char **)&p
, 16);
1625 if (gdb_current_syscall_cb
)
1626 gdb_current_syscall_cb(s
->c_cpu
, ret
, err
);
1628 put_packet(s
, "T02");
1635 cpu_synchronize_state(s
->g_cpu
, 0);
1637 for (addr
= 0; addr
< num_g_regs
; addr
++) {
1638 reg_size
= gdb_read_register(s
->g_cpu
, mem_buf
+ len
, addr
);
1641 memtohex(buf
, mem_buf
, len
);
1645 registers
= mem_buf
;
1646 len
= strlen(p
) / 2;
1647 hextomem((uint8_t *)registers
, p
, len
);
1648 for (addr
= 0; addr
< num_g_regs
&& len
> 0; addr
++) {
1649 reg_size
= gdb_write_register(s
->g_cpu
, registers
, addr
);
1651 registers
+= reg_size
;
1653 cpu_synchronize_state(s
->g_cpu
, 1);
1654 put_packet(s
, "OK");
1657 addr
= strtoull(p
, (char **)&p
, 16);
1660 len
= strtoull(p
, NULL
, 16);
1661 if (cpu_memory_rw_debug(s
->g_cpu
, addr
, mem_buf
, len
, 0) != 0) {
1662 put_packet (s
, "E14");
1664 memtohex(buf
, mem_buf
, len
);
1669 addr
= strtoull(p
, (char **)&p
, 16);
1672 len
= strtoull(p
, (char **)&p
, 16);
1675 hextomem(mem_buf
, p
, len
);
1676 if (cpu_memory_rw_debug(s
->g_cpu
, addr
, mem_buf
, len
, 1) != 0)
1677 put_packet(s
, "E14");
1679 put_packet(s
, "OK");
1682 /* Older gdb are really dumb, and don't use 'g' if 'p' is avaialable.
1683 This works, but can be very slow. Anything new enough to
1684 understand XML also knows how to use this properly. */
1686 goto unknown_command
;
1687 addr
= strtoull(p
, (char **)&p
, 16);
1688 reg_size
= gdb_read_register(s
->g_cpu
, mem_buf
, addr
);
1690 memtohex(buf
, mem_buf
, reg_size
);
1693 put_packet(s
, "E14");
1698 goto unknown_command
;
1699 addr
= strtoull(p
, (char **)&p
, 16);
1702 reg_size
= strlen(p
) / 2;
1703 hextomem(mem_buf
, p
, reg_size
);
1704 gdb_write_register(s
->g_cpu
, mem_buf
, addr
);
1705 put_packet(s
, "OK");
1709 type
= strtoul(p
, (char **)&p
, 16);
1712 addr
= strtoull(p
, (char **)&p
, 16);
1715 len
= strtoull(p
, (char **)&p
, 16);
1717 res
= gdb_breakpoint_insert(addr
, len
, type
);
1719 res
= gdb_breakpoint_remove(addr
, len
, type
);
1721 put_packet(s
, "OK");
1722 else if (res
== -ENOSYS
)
1725 put_packet(s
, "E22");
1729 thread
= strtoull(p
, (char **)&p
, 16);
1730 if (thread
== -1 || thread
== 0) {
1731 put_packet(s
, "OK");
1734 for (env
= first_cpu
; env
!= NULL
; env
= env
->next_cpu
)
1735 if (env
->cpu_index
+ 1 == thread
)
1738 put_packet(s
, "E22");
1744 put_packet(s
, "OK");
1748 put_packet(s
, "OK");
1751 put_packet(s
, "E22");
1756 thread
= strtoull(p
, (char **)&p
, 16);
1757 #ifndef CONFIG_USER_ONLY
1758 if (thread
> 0 && thread
< smp_cpus
+ 1)
1762 put_packet(s
, "OK");
1764 put_packet(s
, "E22");
1768 /* parse any 'q' packets here */
1769 if (!strcmp(p
,"qemu.sstepbits")) {
1770 /* Query Breakpoint bit definitions */
1771 snprintf(buf
, sizeof(buf
), "ENABLE=%x,NOIRQ=%x,NOTIMER=%x",
1777 } else if (strncmp(p
,"qemu.sstep",10) == 0) {
1778 /* Display or change the sstep_flags */
1781 /* Display current setting */
1782 snprintf(buf
, sizeof(buf
), "0x%x", sstep_flags
);
1787 type
= strtoul(p
, (char **)&p
, 16);
1789 put_packet(s
, "OK");
1791 } else if (strcmp(p
,"C") == 0) {
1792 /* "Current thread" remains vague in the spec, so always return
1793 * the first CPU (gdb returns the first thread). */
1794 put_packet(s
, "QC1");
1796 } else if (strcmp(p
,"fThreadInfo") == 0) {
1797 s
->query_cpu
= first_cpu
;
1798 goto report_cpuinfo
;
1799 } else if (strcmp(p
,"sThreadInfo") == 0) {
1802 snprintf(buf
, sizeof(buf
), "m%x", s
->query_cpu
->cpu_index
+1);
1804 s
->query_cpu
= s
->query_cpu
->next_cpu
;
1808 } else if (strncmp(p
,"ThreadExtraInfo,", 16) == 0) {
1809 thread
= strtoull(p
+16, (char **)&p
, 16);
1810 for (env
= first_cpu
; env
!= NULL
; env
= env
->next_cpu
)
1811 if (env
->cpu_index
+ 1 == thread
) {
1812 cpu_synchronize_state(env
, 0);
1813 len
= snprintf((char *)mem_buf
, sizeof(mem_buf
),
1814 "CPU#%d [%s]", env
->cpu_index
,
1815 env
->halted
? "halted " : "running");
1816 memtohex(buf
, mem_buf
, len
);
1822 #ifdef CONFIG_USER_ONLY
1823 else if (strncmp(p
, "Offsets", 7) == 0) {
1824 TaskState
*ts
= s
->c_cpu
->opaque
;
1826 snprintf(buf
, sizeof(buf
),
1827 "Text=" TARGET_ABI_FMT_lx
";Data=" TARGET_ABI_FMT_lx
1828 ";Bss=" TARGET_ABI_FMT_lx
,
1829 ts
->info
->code_offset
,
1830 ts
->info
->data_offset
,
1831 ts
->info
->data_offset
);
1835 #else /* !CONFIG_USER_ONLY */
1836 else if (strncmp(p
, "Rcmd,", 5) == 0) {
1837 int len
= strlen(p
+ 5);
1839 if ((len
% 2) != 0) {
1840 put_packet(s
, "E01");
1843 hextomem(mem_buf
, p
+ 5, len
);
1846 qemu_chr_read(s
->mon_chr
, mem_buf
, len
);
1847 put_packet(s
, "OK");
1850 #endif /* !CONFIG_USER_ONLY */
1851 if (strncmp(p
, "Supported", 9) == 0) {
1852 snprintf(buf
, sizeof(buf
), "PacketSize=%x", MAX_PACKET_LENGTH
);
1854 strcat(buf
, ";qXfer:features:read+");
1860 if (strncmp(p
, "Xfer:features:read:", 19) == 0) {
1862 target_ulong total_len
;
1866 xml
= get_feature_xml(p
, &p
);
1868 snprintf(buf
, sizeof(buf
), "E00");
1875 addr
= strtoul(p
, (char **)&p
, 16);
1878 len
= strtoul(p
, (char **)&p
, 16);
1880 total_len
= strlen(xml
);
1881 if (addr
> total_len
) {
1882 snprintf(buf
, sizeof(buf
), "E00");
1886 if (len
> (MAX_PACKET_LENGTH
- 5) / 2)
1887 len
= (MAX_PACKET_LENGTH
- 5) / 2;
1888 if (len
< total_len
- addr
) {
1890 len
= memtox(buf
+ 1, xml
+ addr
, len
);
1893 len
= memtox(buf
+ 1, xml
+ addr
, total_len
- addr
);
1895 put_packet_binary(s
, buf
, len
+ 1);
1899 /* Unrecognised 'q' command. */
1900 goto unknown_command
;
1904 /* put empty packet */
1912 void gdb_set_stop_cpu(CPUState
*env
)
1914 gdbserver_state
->c_cpu
= env
;
1915 gdbserver_state
->g_cpu
= env
;
1918 #ifndef CONFIG_USER_ONLY
1919 static void gdb_vm_state_change(void *opaque
, int running
, int reason
)
1921 GDBState
*s
= gdbserver_state
;
1922 CPUState
*env
= s
->c_cpu
;
1927 if (running
|| (reason
!= EXCP_DEBUG
&& reason
!= EXCP_INTERRUPT
) ||
1928 s
->state
== RS_INACTIVE
|| s
->state
== RS_SYSCALL
)
1931 /* disable single step if it was enable */
1932 cpu_single_step(env
, 0);
1934 if (reason
== EXCP_DEBUG
) {
1935 if (env
->watchpoint_hit
) {
1936 switch (env
->watchpoint_hit
->flags
& BP_MEM_ACCESS
) {
1947 snprintf(buf
, sizeof(buf
),
1948 "T%02xthread:%02x;%swatch:" TARGET_FMT_lx
";",
1949 GDB_SIGNAL_TRAP
, env
->cpu_index
+1, type
,
1950 env
->watchpoint_hit
->vaddr
);
1952 env
->watchpoint_hit
= NULL
;
1956 ret
= GDB_SIGNAL_TRAP
;
1958 ret
= GDB_SIGNAL_INT
;
1960 snprintf(buf
, sizeof(buf
), "T%02xthread:%02x;", ret
, env
->cpu_index
+1);
1965 /* Send a gdb syscall request.
1966 This accepts limited printf-style format specifiers, specifically:
1967 %x - target_ulong argument printed in hex.
1968 %lx - 64-bit argument printed in hex.
1969 %s - string pointer (target_ulong) and length (int) pair. */
1970 void gdb_do_syscall(gdb_syscall_complete_cb cb
, const char *fmt
, ...)
1979 s
= gdbserver_state
;
1982 gdb_current_syscall_cb
= cb
;
1983 s
->state
= RS_SYSCALL
;
1984 #ifndef CONFIG_USER_ONLY
1985 vm_stop(EXCP_DEBUG
);
1996 addr
= va_arg(va
, target_ulong
);
1997 p
+= snprintf(p
, &buf
[sizeof(buf
)] - p
, TARGET_FMT_lx
, addr
);
2000 if (*(fmt
++) != 'x')
2002 i64
= va_arg(va
, uint64_t);
2003 p
+= snprintf(p
, &buf
[sizeof(buf
)] - p
, "%" PRIx64
, i64
);
2006 addr
= va_arg(va
, target_ulong
);
2007 p
+= snprintf(p
, &buf
[sizeof(buf
)] - p
, TARGET_FMT_lx
"/%x",
2008 addr
, va_arg(va
, int));
2012 fprintf(stderr
, "gdbstub: Bad syscall format string '%s'\n",
2023 #ifdef CONFIG_USER_ONLY
2024 gdb_handlesig(s
->c_cpu
, 0);
2030 static void gdb_read_byte(GDBState
*s
, int ch
)
2035 #ifndef CONFIG_USER_ONLY
2036 if (s
->last_packet_len
) {
2037 /* Waiting for a response to the last packet. If we see the start
2038 of a new command then abandon the previous response. */
2041 printf("Got NACK, retransmitting\n");
2043 put_buffer(s
, (uint8_t *)s
->last_packet
, s
->last_packet_len
);
2047 printf("Got ACK\n");
2049 printf("Got '%c' when expecting ACK/NACK\n", ch
);
2051 if (ch
== '+' || ch
== '$')
2052 s
->last_packet_len
= 0;
2057 /* when the CPU is running, we cannot do anything except stop
2058 it when receiving a char */
2059 vm_stop(EXCP_INTERRUPT
);
2066 s
->line_buf_index
= 0;
2067 s
->state
= RS_GETLINE
;
2072 s
->state
= RS_CHKSUM1
;
2073 } else if (s
->line_buf_index
>= sizeof(s
->line_buf
) - 1) {
2076 s
->line_buf
[s
->line_buf_index
++] = ch
;
2080 s
->line_buf
[s
->line_buf_index
] = '\0';
2081 s
->line_csum
= fromhex(ch
) << 4;
2082 s
->state
= RS_CHKSUM2
;
2085 s
->line_csum
|= fromhex(ch
);
2087 for(i
= 0; i
< s
->line_buf_index
; i
++) {
2088 csum
+= s
->line_buf
[i
];
2090 if (s
->line_csum
!= (csum
& 0xff)) {
2092 put_buffer(s
, &reply
, 1);
2096 put_buffer(s
, &reply
, 1);
2097 s
->state
= gdb_handle_packet(s
, s
->line_buf
);
2106 #ifdef CONFIG_USER_ONLY
2112 s
= gdbserver_state
;
2114 if (gdbserver_fd
< 0 || s
->fd
< 0)
2121 gdb_handlesig (CPUState
*env
, int sig
)
2127 s
= gdbserver_state
;
2128 if (gdbserver_fd
< 0 || s
->fd
< 0)
2131 /* disable single step if it was enabled */
2132 cpu_single_step(env
, 0);
2137 snprintf(buf
, sizeof(buf
), "S%02x", target_signal_to_gdb (sig
));
2140 /* put_packet() might have detected that the peer terminated the
2147 s
->running_state
= 0;
2148 while (s
->running_state
== 0) {
2149 n
= read (s
->fd
, buf
, 256);
2154 for (i
= 0; i
< n
; i
++)
2155 gdb_read_byte (s
, buf
[i
]);
2157 else if (n
== 0 || errno
!= EAGAIN
)
2159 /* XXX: Connection closed. Should probably wait for annother
2160 connection before continuing. */
2169 /* Tell the remote gdb that the process has exited. */
2170 void gdb_exit(CPUState
*env
, int code
)
2175 s
= gdbserver_state
;
2176 if (gdbserver_fd
< 0 || s
->fd
< 0)
2179 snprintf(buf
, sizeof(buf
), "W%02x", code
);
2183 /* Tell the remote gdb that the process has exited due to SIG. */
2184 void gdb_signalled(CPUState
*env
, int sig
)
2189 s
= gdbserver_state
;
2190 if (gdbserver_fd
< 0 || s
->fd
< 0)
2193 snprintf(buf
, sizeof(buf
), "X%02x", target_signal_to_gdb (sig
));
2197 static void gdb_accept(void)
2200 struct sockaddr_in sockaddr
;
2205 len
= sizeof(sockaddr
);
2206 fd
= accept(gdbserver_fd
, (struct sockaddr
*)&sockaddr
, &len
);
2207 if (fd
< 0 && errno
!= EINTR
) {
2210 } else if (fd
>= 0) {
2215 /* set short latency */
2217 setsockopt(fd
, IPPROTO_TCP
, TCP_NODELAY
, (char *)&val
, sizeof(val
));
2219 s
= qemu_mallocz(sizeof(GDBState
));
2220 s
->c_cpu
= first_cpu
;
2221 s
->g_cpu
= first_cpu
;
2225 gdbserver_state
= s
;
2227 fcntl(fd
, F_SETFL
, O_NONBLOCK
);
2230 static int gdbserver_open(int port
)
2232 struct sockaddr_in sockaddr
;
2235 fd
= socket(PF_INET
, SOCK_STREAM
, 0);
2241 /* allow fast reuse */
2243 setsockopt(fd
, SOL_SOCKET
, SO_REUSEADDR
, (char *)&val
, sizeof(val
));
2245 sockaddr
.sin_family
= AF_INET
;
2246 sockaddr
.sin_port
= htons(port
);
2247 sockaddr
.sin_addr
.s_addr
= 0;
2248 ret
= bind(fd
, (struct sockaddr
*)&sockaddr
, sizeof(sockaddr
));
2253 ret
= listen(fd
, 0);
2261 int gdbserver_start(int port
)
2263 gdbserver_fd
= gdbserver_open(port
);
2264 if (gdbserver_fd
< 0)
2266 /* accept connections */
2271 /* Disable gdb stub for child processes. */
2272 void gdbserver_fork(CPUState
*env
)
2274 GDBState
*s
= gdbserver_state
;
2275 if (gdbserver_fd
< 0 || s
->fd
< 0)
2279 cpu_breakpoint_remove_all(env
, BP_GDB
);
2280 cpu_watchpoint_remove_all(env
, BP_GDB
);
2283 static int gdb_chr_can_receive(void *opaque
)
2285 /* We can handle an arbitrarily large amount of data.
2286 Pick the maximum packet size, which is as good as anything. */
2287 return MAX_PACKET_LENGTH
;
2290 static void gdb_chr_receive(void *opaque
, const uint8_t *buf
, int size
)
2294 for (i
= 0; i
< size
; i
++) {
2295 gdb_read_byte(gdbserver_state
, buf
[i
]);
2299 static void gdb_chr_event(void *opaque
, int event
)
2302 case CHR_EVENT_RESET
:
2303 vm_stop(EXCP_INTERRUPT
);
2311 static void gdb_monitor_output(GDBState
*s
, const char *msg
, int len
)
2313 char buf
[MAX_PACKET_LENGTH
];
2316 if (len
> (MAX_PACKET_LENGTH
/2) - 1)
2317 len
= (MAX_PACKET_LENGTH
/2) - 1;
2318 memtohex(buf
+ 1, (uint8_t *)msg
, len
);
2322 static int gdb_monitor_write(CharDriverState
*chr
, const uint8_t *buf
, int len
)
2324 const char *p
= (const char *)buf
;
2327 max_sz
= (sizeof(gdbserver_state
->last_packet
) - 2) / 2;
2329 if (len
<= max_sz
) {
2330 gdb_monitor_output(gdbserver_state
, p
, len
);
2333 gdb_monitor_output(gdbserver_state
, p
, max_sz
);
2340 int gdbserver_start(const char *port
)
2343 char gdbstub_port_name
[128];
2346 CharDriverState
*chr
= NULL
;
2347 CharDriverState
*mon_chr
;
2349 if (!port
|| !*port
)
2351 if (strcmp(port
, "none") != 0) {
2352 port_num
= strtol(port
, &p
, 10);
2354 /* A numeric value is interpreted as a port number. */
2355 snprintf(gdbstub_port_name
, sizeof(gdbstub_port_name
),
2356 "tcp::%d,nowait,nodelay,server", port_num
);
2357 port
= gdbstub_port_name
;
2360 chr
= qemu_chr_open("gdb", port
, NULL
);
2364 qemu_chr_add_handlers(chr
, gdb_chr_can_receive
, gdb_chr_receive
,
2365 gdb_chr_event
, NULL
);
2368 s
= gdbserver_state
;
2370 s
= qemu_mallocz(sizeof(GDBState
));
2371 gdbserver_state
= s
;
2373 qemu_add_vm_change_state_handler(gdb_vm_state_change
, NULL
);
2375 /* Initialize a monitor terminal for gdb */
2376 mon_chr
= qemu_mallocz(sizeof(*mon_chr
));
2377 mon_chr
->chr_write
= gdb_monitor_write
;
2378 monitor_init(mon_chr
, 0);
2381 qemu_chr_close(s
->chr
);
2382 mon_chr
= s
->mon_chr
;
2383 memset(s
, 0, sizeof(GDBState
));
2385 s
->c_cpu
= first_cpu
;
2386 s
->g_cpu
= first_cpu
;
2388 s
->state
= chr
? RS_IDLE
: RS_INACTIVE
;
2389 s
->mon_chr
= mon_chr
;