3 /* PC-style peripherals (also used by other machines). */
7 SerialState
*serial_init(int base
, qemu_irq irq
, int baudbase
,
9 SerialState
*serial_mm_init (target_phys_addr_t base
, int it_shift
,
10 qemu_irq irq
, int baudbase
,
11 CharDriverState
*chr
, int ioregister
);
12 uint32_t serial_mm_readb (void *opaque
, target_phys_addr_t addr
);
13 void serial_mm_writeb (void *opaque
, target_phys_addr_t addr
, uint32_t value
);
14 uint32_t serial_mm_readw (void *opaque
, target_phys_addr_t addr
);
15 void serial_mm_writew (void *opaque
, target_phys_addr_t addr
, uint32_t value
);
16 uint32_t serial_mm_readl (void *opaque
, target_phys_addr_t addr
);
17 void serial_mm_writel (void *opaque
, target_phys_addr_t addr
, uint32_t value
);
21 typedef struct ParallelState ParallelState
;
22 ParallelState
*parallel_init(int base
, qemu_irq irq
, CharDriverState
*chr
);
23 ParallelState
*parallel_mm_init(target_phys_addr_t base
, int it_shift
, qemu_irq irq
, CharDriverState
*chr
);
27 typedef struct PicState2 PicState2
;
28 extern PicState2
*isa_pic
;
29 void pic_set_irq(int irq
, int level
);
30 void pic_set_irq_new(void *opaque
, int irq
, int level
);
31 qemu_irq
*i8259_init(qemu_irq parent_irq
);
32 void pic_set_alt_irq_func(PicState2
*s
, SetIRQFunc
*alt_irq_func
,
33 void *alt_irq_opaque
);
34 int pic_read_irq(PicState2
*s
);
35 void pic_update_irq(PicState2
*s
);
36 uint32_t pic_intack_read(PicState2
*s
);
41 typedef struct IOAPICState IOAPICState
;
45 int apic_init(CPUState
*env
);
46 int apic_accept_pic_intr(CPUState
*env
);
47 void apic_local_deliver(CPUState
*env
, int vector
);
48 int apic_get_interrupt(CPUState
*env
);
49 IOAPICState
*ioapic_init(void);
50 void ioapic_set_irq(void *opaque
, int vector
, int level
);
54 #define PIT_FREQ 1193182
56 typedef struct PITState PITState
;
58 PITState
*pit_init(int base
, qemu_irq irq
);
59 void pit_set_gate(PITState
*pit
, int channel
, int val
);
60 int pit_get_gate(PITState
*pit
, int channel
);
61 int pit_get_initial_count(PITState
*pit
, int channel
);
62 int pit_get_mode(PITState
*pit
, int channel
);
63 int pit_get_out(PITState
*pit
, int channel
, int64_t current_time
);
67 PITState
*kvm_pit_init(int base
, qemu_irq irq
);
70 void vmport_init(void);
71 void vmport_register(unsigned char command
, IOPortReadFunc
*func
, void *opaque
);
74 void *vmmouse_init(void *m
);
78 void i8042_init(qemu_irq kbd_irq
, qemu_irq mouse_irq
, uint32_t io_base
);
79 void i8042_mm_init(qemu_irq kbd_irq
, qemu_irq mouse_irq
,
80 target_phys_addr_t base
, int it_shift
);
84 typedef struct RTCState RTCState
;
86 RTCState
*rtc_init(int base
, qemu_irq irq
);
87 RTCState
*rtc_mm_init(target_phys_addr_t base
, int it_shift
, qemu_irq irq
);
88 void rtc_set_memory(RTCState
*s
, int addr
, int val
);
89 void rtc_set_date(RTCState
*s
, const struct tm
*tm
);
92 extern int fd_bootchk
;
94 void ioport_set_a20(int enable
);
95 int ioport_get_a20(void);
96 CPUState
*pc_new_cpu(int cpu
, const char *cpu_model
, int pci_enabled
);
99 extern int acpi_enabled
;
100 i2c_bus
*piix4_pm_init(PCIBus
*bus
, int devfn
, uint32_t smb_io_base
,
102 void piix4_smbus_register_device(SMBusDevice
*dev
, uint8_t addr
);
103 void acpi_bios_init(void);
106 void pcspk_init(PITState
*);
107 int pcspk_audio_init(AudioState
*, qemu_irq
*pic
);
110 PCIBus
*i440fx_init(PCIDevice
**pi440fx_state
, qemu_irq
*pic
);
111 void i440fx_set_smm(PCIDevice
*d
, int val
);
112 int piix3_init(PCIBus
*bus
, int devfn
);
113 void i440fx_init_memory_mappings(PCIDevice
*d
);
115 int piix4_init(PCIBus
*bus
, int devfn
);
120 #define VGA_RAM_SIZE (16 * 1024 * 1024)
122 #define VGA_RAM_SIZE (17 * 1024 * 1024)
125 int isa_vga_init(DisplayState
*ds
, uint8_t *vga_ram_base
,
126 unsigned long vga_ram_offset
, int vga_ram_size
);
127 int pci_vga_init(PCIBus
*bus
, DisplayState
*ds
, uint8_t *vga_ram_base
,
128 unsigned long vga_ram_offset
, int vga_ram_size
,
129 unsigned long vga_bios_offset
, int vga_bios_size
);
130 int isa_vga_mm_init(DisplayState
*ds
, uint8_t *vga_ram_base
,
131 unsigned long vga_ram_offset
, int vga_ram_size
,
132 target_phys_addr_t vram_base
, target_phys_addr_t ctrl_base
,
136 void pci_cirrus_vga_init(PCIBus
*bus
, DisplayState
*ds
, uint8_t *vga_ram_base
,
137 unsigned long vga_ram_offset
, int vga_ram_size
);
138 void isa_cirrus_vga_init(DisplayState
*ds
, uint8_t *vga_ram_base
,
139 unsigned long vga_ram_offset
, int vga_ram_size
);
142 void isa_ide_init(int iobase
, int iobase2
, qemu_irq irq
,
143 BlockDriverState
*hd0
, BlockDriverState
*hd1
);
144 void pci_cmd646_ide_init(PCIBus
*bus
, BlockDriverState
**hd_table
,
145 int secondary_ide_enabled
);
146 void pci_piix3_ide_init(PCIBus
*bus
, BlockDriverState
**hd_table
, int devfn
,
148 void pci_piix4_ide_init(PCIBus
*bus
, BlockDriverState
**hd_table
, int devfn
,
153 void isa_ne2000_init(int base
, qemu_irq irq
, NICInfo
*nd
);
157 PCIDevice
*virtio_net_init(PCIBus
*bus
, NICInfo
*nd
, int devfn
);
160 void *virtio_blk_init(PCIBus
*bus
, uint16_t vendor
, uint16_t device
,
161 BlockDriverState
*bs
);
165 void extboot_init(BlockDriverState
*bs
, int cmd
);