hw/virtio-pci.c

   1 /*
   2  * Virtio PCI Bindings
   3  *
   4  * Copyright IBM, Corp. 2007
   5  * Copyright (c) 2009 CodeSourcery
   6  *
   7  * Authors:
   8  *  Anthony Liguori   <aliguori@us.ibm.com>
   9  *  Paul Brook        <paul@codesourcery.com>
  10  *
  11  * This work is licensed under the terms of the GNU GPL, version 2.  See
  12  * the COPYING file in the top-level directory.
  13  *
  14  */
  15
  16 #include <inttypes.h>
  17
  18 #include "virtio.h"
  19 #include "pci.h"
  20 //#include "sysemu.h"
  21 #include "msix.h"
  22
  23 /* from Linux's linux/virtio_pci.h */
  24
  25 /* A 32-bit r/o bitmask of the features supported by the host */
  26 #define VIRTIO_PCI_HOST_FEATURES        0
  27
  28 /* A 32-bit r/w bitmask of features activated by the guest */
  29 #define VIRTIO_PCI_GUEST_FEATURES       4
  30
  31 /* A 32-bit r/w PFN for the currently selected queue */
  32 #define VIRTIO_PCI_QUEUE_PFN            8
  33
  34 /* A 16-bit r/o queue size for the currently selected queue */
  35 #define VIRTIO_PCI_QUEUE_NUM            12
  36
  37 /* A 16-bit r/w queue selector */
  38 #define VIRTIO_PCI_QUEUE_SEL            14
  39
  40 /* A 16-bit r/w queue notifier */
  41 #define VIRTIO_PCI_QUEUE_NOTIFY         16
  42
  43 /* An 8-bit device status register.  */
  44 #define VIRTIO_PCI_STATUS               18
  45
  46 /* An 8-bit r/o interrupt status register.  Reading the value will return the
  47  * current contents of the ISR and will also clear it.  This is effectively
  48  * a read-and-acknowledge. */
  49 #define VIRTIO_PCI_ISR                  19
  50
  51 /* MSI-X registers: only enabled if MSI-X is enabled. */
  52 /* A 16-bit vector for configuration changes. */
  53 #define VIRTIO_MSI_CONFIG_VECTOR        20
  54 /* A 16-bit vector for selected queue notifications. */
  55 #define VIRTIO_MSI_QUEUE_VECTOR         22
  56
  57 /* Config space size */
  58 #define VIRTIO_PCI_CONFIG_NOMSI         20
  59 #define VIRTIO_PCI_CONFIG_MSI           24
  60 #define VIRTIO_PCI_REGION_SIZE(dev)     (msix_present(dev) ? \
  61                                          VIRTIO_PCI_CONFIG_MSI : \
  62                                          VIRTIO_PCI_CONFIG_NOMSI)
  63
  64 /* The remaining space is defined by each driver as the per-driver
  65  * configuration space */
  66 #define VIRTIO_PCI_CONFIG(dev)          (msix_enabled(dev) ? \
  67                                          VIRTIO_PCI_CONFIG_MSI : \
  68                                          VIRTIO_PCI_CONFIG_NOMSI)
  69
  70 /* Virtio ABI version, if we increment this, we break the guest driver. */
  71 #define VIRTIO_PCI_ABI_VERSION          0
  72
  73 /* How many bits to shift physical queue address written to QUEUE_PFN.
  74  * 12 is historical, and due to x86 page size. */
  75 #define VIRTIO_PCI_QUEUE_ADDR_SHIFT    12
  76
  77 /* QEMU doesn't strictly need write barriers since everything runs in
  78  * lock-step.  We'll leave the calls to wmb() in though to make it obvious for
  79  * KVM or if kqemu gets SMP support.
  80  */
  81 #define wmb() do { } while (0)
  82
  83 /* PCI bindings.  */
  84
  85 typedef struct {
  86     PCIDevice pci_dev;
  87     VirtIODevice *vdev;
  88     uint32_t addr;
  89     uint32_t class_code;
  90 } VirtIOPCIProxy;
  91
  92 /* virtio device */
  93
  94 static void virtio_pci_notify(void *opaque, uint16_t vector)
  95 {
  96     VirtIOPCIProxy *proxy = opaque;
  97     if (msix_enabled(&proxy->pci_dev))
  98         msix_notify(&proxy->pci_dev, vector);
  99     else
 100         qemu_set_irq(proxy->pci_dev.irq[0], proxy->vdev->isr & 1);
 101 }
 102
 103 static void virtio_pci_save_config(void * opaque, QEMUFile *f)
 104 {
 105     VirtIOPCIProxy *proxy = opaque;
 106     pci_device_save(&proxy->pci_dev, f);
 107     msix_save(&proxy->pci_dev, f);
 108     if (msix_present(&proxy->pci_dev))
 109         qemu_put_be16(f, proxy->vdev->config_vector);
 110 }
 111
 112 static void virtio_pci_save_queue(void * opaque, int n, QEMUFile *f)
 113 {
 114     VirtIOPCIProxy *proxy = opaque;
 115     if (msix_present(&proxy->pci_dev))
 116         qemu_put_be16(f, virtio_queue_vector(proxy->vdev, n));
 117 }
 118
 119 static int virtio_pci_load_config(void * opaque, QEMUFile *f)
 120 {
 121     VirtIOPCIProxy *proxy = opaque;
 122     int ret;
 123     ret = pci_device_load(&proxy->pci_dev, f);
 124     if (ret) {
 125         return ret;
 126     }
 127     msix_load(&proxy->pci_dev, f);
 128     if (msix_present(&proxy->pci_dev)) {
 129         qemu_get_be16s(f, &proxy->vdev->config_vector);
 130     } else {
 131         proxy->vdev->config_vector = VIRTIO_NO_VECTOR;
 132     }
 133     if (proxy->vdev->config_vector != VIRTIO_NO_VECTOR) {
 134         return msix_vector_use(&proxy->pci_dev, proxy->vdev->config_vector);
 135     }
 136     return 0;
 137 }
 138
 139 static int virtio_pci_load_queue(void * opaque, int n, QEMUFile *f)
 140 {
 141     VirtIOPCIProxy *proxy = opaque;
 142     uint16_t vector;
 143     if (msix_present(&proxy->pci_dev)) {
 144         qemu_get_be16s(f, &vector);
 145     } else {
 146         vector = VIRTIO_NO_VECTOR;
 147     }
 148     virtio_queue_set_vector(proxy->vdev, n, vector);
 149     if (vector != VIRTIO_NO_VECTOR) {
 150         return msix_vector_use(&proxy->pci_dev, vector);
 151     }
 152     return 0;
 153 }
 154
 155 static void virtio_pci_reset(void *opaque)
 156 {
 157     VirtIOPCIProxy *proxy = opaque;
 158     virtio_reset(proxy->vdev);
 159     msix_reset(&proxy->pci_dev);
 160 }
 161
 162 static void virtio_ioport_write(void *opaque, uint32_t addr, uint32_t val)
 163 {
 164     VirtIOPCIProxy *proxy = opaque;
 165     VirtIODevice *vdev = proxy->vdev;
 166     target_phys_addr_t pa;
 167
 168     switch (addr) {
 169     case VIRTIO_PCI_GUEST_FEATURES:
 170         /* Guest does not negotiate properly?  We have to assume nothing. */
 171         if (val & (1 << VIRTIO_F_BAD_FEATURE)) {
 172             if (vdev->bad_features)
 173                 val = vdev->bad_features(vdev);
 174             else
 175                 val = 0;
 176         }
 177         if (vdev->set_features)
 178             vdev->set_features(vdev, val);
 179         vdev->features = val;
 180         break;
 181     case VIRTIO_PCI_QUEUE_PFN:
 182         pa = (target_phys_addr_t)val << VIRTIO_PCI_QUEUE_ADDR_SHIFT;
 183         if (pa == 0)
 184             virtio_pci_reset(proxy);
 185         else
 186             virtio_queue_set_addr(vdev, vdev->queue_sel, pa);
 187         break;
 188     case VIRTIO_PCI_QUEUE_SEL:
 189         if (val < VIRTIO_PCI_QUEUE_MAX)
 190             vdev->queue_sel = val;
 191         break;
 192     case VIRTIO_PCI_QUEUE_NOTIFY:
 193         virtio_queue_notify(vdev, val);
 194         break;
 195     case VIRTIO_PCI_STATUS:
 196         vdev->status = val & 0xFF;
 197         if (vdev->status == 0)
 198             virtio_pci_reset(proxy);
 199         break;
 200     case VIRTIO_MSI_CONFIG_VECTOR:
 201         msix_vector_unuse(&proxy->pci_dev, vdev->config_vector);
 202         /* Make it possible for guest to discover an error took place. */
 203         if (msix_vector_use(&proxy->pci_dev, val) < 0)
 204             val = VIRTIO_NO_VECTOR;
 205         vdev->config_vector = val;
 206         break;
 207     case VIRTIO_MSI_QUEUE_VECTOR:
 208         msix_vector_unuse(&proxy->pci_dev,
 209                           virtio_queue_vector(vdev, vdev->queue_sel));
 210         /* Make it possible for guest to discover an error took place. */
 211         if (msix_vector_use(&proxy->pci_dev, val) < 0)
 212             val = VIRTIO_NO_VECTOR;
 213         virtio_queue_set_vector(vdev, vdev->queue_sel, val);
 214         break;
 215     default:
 216         fprintf(stderr, "%s: unexpected address 0x%x value 0x%x\n",
 217                 __func__, addr, val);
 218         break;
 219     }
 220 }
 221
 222 static uint32_t virtio_ioport_read(VirtIOPCIProxy *proxy, uint32_t addr)
 223 {
 224     VirtIODevice *vdev = proxy->vdev;
 225     uint32_t ret = 0xFFFFFFFF;
 226
 227     switch (addr) {
 228     case VIRTIO_PCI_HOST_FEATURES:
 229         ret = vdev->get_features(vdev);
 230         ret |= (1 << VIRTIO_F_NOTIFY_ON_EMPTY);
 231         ret |= (1 << VIRTIO_RING_F_INDIRECT_DESC);
 232         ret |= (1 << VIRTIO_F_BAD_FEATURE);
 233         break;
 234     case VIRTIO_PCI_GUEST_FEATURES:
 235         ret = vdev->features;
 236         break;
 237     case VIRTIO_PCI_QUEUE_PFN:
 238         ret = virtio_queue_get_addr(vdev, vdev->queue_sel)
 239               >> VIRTIO_PCI_QUEUE_ADDR_SHIFT;
 240         break;
 241     case VIRTIO_PCI_QUEUE_NUM:
 242         ret = virtio_queue_get_num(vdev, vdev->queue_sel);
 243         break;
 244     case VIRTIO_PCI_QUEUE_SEL:
 245         ret = vdev->queue_sel;
 246         break;
 247     case VIRTIO_PCI_STATUS:
 248         ret = vdev->status;
 249         break;
 250     case VIRTIO_PCI_ISR:
 251         /* reading from the ISR also clears it. */
 252         ret = vdev->isr;
 253         vdev->isr = 0;
 254         qemu_set_irq(proxy->pci_dev.irq[0], 0);
 255         break;
 256     case VIRTIO_MSI_CONFIG_VECTOR:
 257         ret = vdev->config_vector;
 258         break;
 259     case VIRTIO_MSI_QUEUE_VECTOR:
 260         ret = virtio_queue_vector(vdev, vdev->queue_sel);
 261         break;
 262     default:
 263         break;
 264     }
 265
 266     return ret;
 267 }
 268
 269 static uint32_t virtio_pci_config_readb(void *opaque, uint32_t addr)
 270 {
 271     VirtIOPCIProxy *proxy = opaque;
 272     uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
 273     addr -= proxy->addr;
 274     if (addr < config)
 275         return virtio_ioport_read(proxy, addr);
 276     addr -= config;
 277     return virtio_config_readb(proxy->vdev, addr);
 278 }
 279
 280 static uint32_t virtio_pci_config_readw(void *opaque, uint32_t addr)
 281 {
 282     VirtIOPCIProxy *proxy = opaque;
 283     uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
 284     addr -= proxy->addr;
 285     if (addr < config)
 286         return virtio_ioport_read(proxy, addr);
 287     addr -= config;
 288     return virtio_config_readw(proxy->vdev, addr);
 289 }
 290
 291 static uint32_t virtio_pci_config_readl(void *opaque, uint32_t addr)
 292 {
 293     VirtIOPCIProxy *proxy = opaque;
 294     uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
 295     addr -= proxy->addr;
 296     if (addr < config)
 297         return virtio_ioport_read(proxy, addr);
 298     addr -= config;
 299     return virtio_config_readl(proxy->vdev, addr);
 300 }
 301
 302 static void virtio_pci_config_writeb(void *opaque, uint32_t addr, uint32_t val)
 303 {
 304     VirtIOPCIProxy *proxy = opaque;
 305     uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
 306     addr -= proxy->addr;
 307     if (addr < config) {
 308         virtio_ioport_write(proxy, addr, val);
 309         return;
 310     }
 311     addr -= config;
 312     virtio_config_writeb(proxy->vdev, addr, val);
 313 }
 314
 315 static void virtio_pci_config_writew(void *opaque, uint32_t addr, uint32_t val)
 316 {
 317     VirtIOPCIProxy *proxy = opaque;
 318     uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
 319     addr -= proxy->addr;
 320     if (addr < config) {
 321         virtio_ioport_write(proxy, addr, val);
 322         return;
 323     }
 324     addr -= config;
 325     virtio_config_writew(proxy->vdev, addr, val);
 326 }
 327
 328 static void virtio_pci_config_writel(void *opaque, uint32_t addr, uint32_t val)
 329 {
 330     VirtIOPCIProxy *proxy = opaque;
 331     uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
 332     addr -= proxy->addr;
 333     if (addr < config) {
 334         virtio_ioport_write(proxy, addr, val);
 335         return;
 336     }
 337     addr -= config;
 338     virtio_config_writel(proxy->vdev, addr, val);
 339 }
 340
 341 static void virtio_map(PCIDevice *pci_dev, int region_num,
 342                        uint32_t addr, uint32_t size, int type)
 343 {
 344     VirtIOPCIProxy *proxy = container_of(pci_dev, VirtIOPCIProxy, pci_dev);
 345     VirtIODevice *vdev = proxy->vdev;
 346     unsigned config_len = VIRTIO_PCI_REGION_SIZE(pci_dev) + vdev->config_len;
 347
 348     proxy->addr = addr;
 349
 350     register_ioport_write(addr, config_len, 1, virtio_pci_config_writeb, proxy);
 351     register_ioport_write(addr, config_len, 2, virtio_pci_config_writew, proxy);
 352     register_ioport_write(addr, config_len, 4, virtio_pci_config_writel, proxy);
 353     register_ioport_read(addr, config_len, 1, virtio_pci_config_readb, proxy);
 354     register_ioport_read(addr, config_len, 2, virtio_pci_config_readw, proxy);
 355     register_ioport_read(addr, config_len, 4, virtio_pci_config_readl, proxy);
 356
 357     if (vdev->config_len)
 358         vdev->get_config(vdev, vdev->config);
 359 }
 360
 361 static void virtio_write_config(PCIDevice *pci_dev, uint32_t address,
 362                                 uint32_t val, int len)
 363 {
 364     pci_default_write_config(pci_dev, address, val, len);
 365     msix_write_config(pci_dev, address, val, len);
 366 }
 367
 368 static const VirtIOBindings virtio_pci_bindings = {
 369     .notify = virtio_pci_notify,
 370     .save_config = virtio_pci_save_config,
 371     .load_config = virtio_pci_load_config,
 372     .save_queue = virtio_pci_save_queue,
 373     .load_queue = virtio_pci_load_queue,
 374 };
 375
 376 static void virtio_init_pci(VirtIOPCIProxy *proxy, VirtIODevice *vdev,
 377                             uint16_t vendor, uint16_t device,
 378                             uint16_t class_code, uint8_t pif)
 379 {
 380     uint8_t *config;
 381     uint32_t size;
 382
 383     proxy->vdev = vdev;
 384
 385     config = proxy->pci_dev.config;
 386     pci_config_set_vendor_id(config, vendor);
 387     pci_config_set_device_id(config, device);
 388
 389     config[0x08] = VIRTIO_PCI_ABI_VERSION;
 390
 391     config[0x09] = pif;
 392     pci_config_set_class(config, class_code);
 393     config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL;
 394
 395     config[0x2c] = vendor & 0xFF;
 396     config[0x2d] = (vendor >> 8) & 0xFF;
 397     config[0x2e] = vdev->device_id & 0xFF;
 398     config[0x2f] = (vdev->device_id >> 8) & 0xFF;
 399
 400     config[0x3d] = 1;
 401
 402     if (vdev->nvectors && !msix_init(&proxy->pci_dev, vdev->nvectors, 1, 0)) {
 403         pci_register_bar(&proxy->pci_dev, 1,
 404                          msix_bar_size(&proxy->pci_dev),
 405                          PCI_ADDRESS_SPACE_MEM,
 406                          msix_mmio_map);
 407         proxy->pci_dev.config_write = virtio_write_config;
 408         proxy->pci_dev.unregister = msix_uninit;
 409     } else
 410         vdev->nvectors = 0;
 411
 412     size = VIRTIO_PCI_REGION_SIZE(&proxy->pci_dev) + vdev->config_len;
 413     if (size & (size-1))
 414         size = 1 << qemu_fls(size);
 415
 416     pci_register_bar(&proxy->pci_dev, 0, size, PCI_ADDRESS_SPACE_IO,
 417                            virtio_map);
 418
 419     qemu_register_reset(virtio_pci_reset, proxy);
 420
 421     virtio_bind_device(vdev, &virtio_pci_bindings, proxy);
 422 }
 423
 424 static void virtio_blk_init_pci_with_class(PCIDevice *pci_dev,
 425                                            uint16_t class_code)
 426 {
 427     VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
 428     VirtIODevice *vdev;
 429
 430     vdev = virtio_blk_init(&pci_dev->qdev);
 431     virtio_init_pci(proxy, vdev,
 432                     PCI_VENDOR_ID_REDHAT_QUMRANET,
 433                     PCI_DEVICE_ID_VIRTIO_BLOCK,
 434                     class_code, 0x00);
 435 }
 436
 437 static void virtio_blk_init_pci(PCIDevice *pci_dev)
 438 {
 439     VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
 440
 441     if (proxy->class_code != PCI_CLASS_STORAGE_SCSI &&
 442         proxy->class_code != PCI_CLASS_STORAGE_OTHER)
 443         proxy->class_code = PCI_CLASS_STORAGE_SCSI;
 444
 445     virtio_blk_init_pci_with_class(pci_dev, proxy->class_code);
 446 }
 447
 448 static void virtio_blk_init_pci_0_10(PCIDevice *pci_dev)
 449 {
 450     virtio_blk_init_pci_with_class(pci_dev, PCI_CLASS_STORAGE_OTHER);
 451 }
 452
 453 static void virtio_console_init_pci_with_class(PCIDevice *pci_dev,
 454                                                uint16_t class_code)
 455 {
 456     VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
 457     VirtIODevice *vdev;
 458
 459     vdev = virtio_console_init(&pci_dev->qdev);
 460     virtio_init_pci(proxy, vdev,
 461                     PCI_VENDOR_ID_REDHAT_QUMRANET,
 462                     PCI_DEVICE_ID_VIRTIO_CONSOLE,
 463                     class_code, 0x00);
 464 }
 465
 466 static void virtio_console_init_pci(PCIDevice *pci_dev)
 467 {
 468     VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
 469
 470     if (proxy->class_code != PCI_CLASS_COMMUNICATION_OTHER &&
 471         proxy->class_code != PCI_CLASS_DISPLAY_OTHER && /* qemu 0.10 */
 472         proxy->class_code != PCI_CLASS_OTHERS)          /* qemu-kvm  */
 473         proxy->class_code = PCI_CLASS_COMMUNICATION_OTHER;
 474
 475     virtio_console_init_pci_with_class(pci_dev, proxy->class_code);
 476 }
 477
 478 static void virtio_console_init_pci_0_10(PCIDevice *pci_dev)
 479 {
 480     virtio_console_init_pci_with_class(pci_dev, PCI_CLASS_DISPLAY_OTHER);
 481 }
 482
 483 static void virtio_net_init_pci(PCIDevice *pci_dev)
 484 {
 485     VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
 486     VirtIODevice *vdev;
 487
 488     vdev = virtio_net_init(&pci_dev->qdev);
 489     virtio_init_pci(proxy, vdev,
 490                     PCI_VENDOR_ID_REDHAT_QUMRANET,
 491                     PCI_DEVICE_ID_VIRTIO_NET,
 492                     PCI_CLASS_NETWORK_ETHERNET,
 493                     0x00);
 494 }
 495
 496 static void virtio_balloon_init_pci(PCIDevice *pci_dev)
 497 {
 498     VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
 499     VirtIODevice *vdev;
 500
 501     vdev = virtio_balloon_init(&pci_dev->qdev);
 502     virtio_init_pci(proxy, vdev,
 503                     PCI_VENDOR_ID_REDHAT_QUMRANET,
 504                     PCI_DEVICE_ID_VIRTIO_BALLOON,
 505                     PCI_CLASS_MEMORY_RAM,
 506                     0x00);
 507 }
 508
 509 static PCIDeviceInfo virtio_info[] = {
 510     {
 511         .qdev.name = "virtio-blk-pci",
 512         .qdev.size = sizeof(VirtIOPCIProxy),
 513         .init      = virtio_blk_init_pci,
 514         .qdev.props = (Property[]) {
 515             {
 516                 .name   = "class",
 517                 .info   = &qdev_prop_hex32,
 518                 .offset = offsetof(VirtIOPCIProxy, class_code),
 519             },
 520             {/* end of list */}
 521         },
 522     },{
 523         .qdev.name = "virtio-net-pci",
 524         .qdev.size = sizeof(VirtIOPCIProxy),
 525         .init      = virtio_net_init_pci,
 526     },{
 527         .qdev.name = "virtio-console-pci",
 528         .qdev.size = sizeof(VirtIOPCIProxy),
 529         .init      = virtio_console_init_pci,
 530         .qdev.props = (Property[]) {
 531             {
 532                 .name   = "class",
 533                 .info   = &qdev_prop_hex32,
 534                 .offset = offsetof(VirtIOPCIProxy, class_code),
 535             },
 536             {/* end of list */}
 537         },
 538     },{
 539         .qdev.name = "virtio-balloon-pci",
 540         .qdev.size = sizeof(VirtIOPCIProxy),
 541         .init      = virtio_balloon_init_pci,
 542     },{
 543         /* For compatibility with 0.10 */
 544         .qdev.name = "virtio-blk-pci-0-10",
 545         .qdev.size = sizeof(VirtIOPCIProxy),
 546         .init      = virtio_blk_init_pci_0_10,
 547     },{
 548         .qdev.name = "virtio-console-pci-0-10",
 549         .qdev.size = sizeof(VirtIOPCIProxy),
 550         .init      = virtio_console_init_pci_0_10,
 551     },{
 552         /* end of list */
 553     }
 554 };
 555
 556 static void virtio_pci_register_devices(void)
 557 {
 558     pci_qdev_register_many(virtio_info);
 559 }
 560
 561 device_init(virtio_pci_register_devices)