target-i386/machine.c

   1 #include "hw/hw.h"
   2 #include "hw/boards.h"
   3 #include "hw/pc.h"
   4 #include "hw/isa.h"
   5
   6 #include "exec-all.h"
   7 #include "qemu-kvm.h"
   8
   9 void register_machines(void)
  10 {
  11     qemu_register_machine(&pc_machine);
  12     qemu_register_machine(&isapc_machine);
  13 }
  14
  15 static void cpu_put_seg(QEMUFile *f, SegmentCache *dt)
  16 {
  17     qemu_put_be32(f, dt->selector);
  18     qemu_put_betl(f, dt->base);
  19     qemu_put_be32(f, dt->limit);
  20     qemu_put_be32(f, dt->flags);
  21 }
  22
  23 static void cpu_get_seg(QEMUFile *f, SegmentCache *dt)
  24 {
  25     dt->selector = qemu_get_be32(f);
  26     dt->base = qemu_get_betl(f);
  27     dt->limit = qemu_get_be32(f);
  28     dt->flags = qemu_get_be32(f);
  29 }
  30
  31 void cpu_save(QEMUFile *f, void *opaque)
  32 {
  33     CPUState *env = opaque;
  34     uint16_t fptag, fpus, fpuc, fpregs_format;
  35     uint32_t hflags;
  36     int32_t a20_mask;
  37     int i;
  38
  39     if (kvm_enabled()) {
  40         kvm_save_registers(env);
  41         kvm_save_mpstate(env);
  42     }
  43
  44     for(i = 0; i < CPU_NB_REGS; i++)
  45         qemu_put_betls(f, &env->regs[i]);
  46     qemu_put_betls(f, &env->eip);
  47     qemu_put_betls(f, &env->eflags);
  48     hflags = env->hflags; /* XXX: suppress most of the redundant hflags */
  49     qemu_put_be32s(f, &hflags);
  50
  51     /* FPU */
  52     fpuc = env->fpuc;
  53     fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
  54     fptag = 0;
  55     for(i = 0; i < 8; i++) {
  56         fptag |= ((!env->fptags[i]) << i);
  57     }
  58
  59     qemu_put_be16s(f, &fpuc);
  60     qemu_put_be16s(f, &fpus);
  61     qemu_put_be16s(f, &fptag);
  62
  63 #ifdef USE_X86LDOUBLE
  64     fpregs_format = 0;
  65 #else
  66     fpregs_format = 1;
  67 #endif
  68     qemu_put_be16s(f, &fpregs_format);
  69
  70     for(i = 0; i < 8; i++) {
  71 #ifdef USE_X86LDOUBLE
  72         {
  73             uint64_t mant;
  74             uint16_t exp;
  75             /* we save the real CPU data (in case of MMX usage only 'mant'
  76                contains the MMX register */
  77             cpu_get_fp80(&mant, &exp, env->fpregs[i].d);
  78             qemu_put_be64(f, mant);
  79             qemu_put_be16(f, exp);
  80         }
  81 #else
  82         /* if we use doubles for float emulation, we save the doubles to
  83            avoid losing information in case of MMX usage. It can give
  84            problems if the image is restored on a CPU where long
  85            doubles are used instead. */
  86         qemu_put_be64(f, env->fpregs[i].mmx.MMX_Q(0));
  87 #endif
  88     }
  89
  90     for(i = 0; i < 6; i++)
  91         cpu_put_seg(f, &env->segs[i]);
  92     cpu_put_seg(f, &env->ldt);
  93     cpu_put_seg(f, &env->tr);
  94     cpu_put_seg(f, &env->gdt);
  95     cpu_put_seg(f, &env->idt);
  96
  97     qemu_put_be32s(f, &env->sysenter_cs);
  98     qemu_put_be32s(f, &env->sysenter_esp);
  99     qemu_put_be32s(f, &env->sysenter_eip);
 100
 101     qemu_put_betls(f, &env->cr[0]);
 102     qemu_put_betls(f, &env->cr[2]);
 103     qemu_put_betls(f, &env->cr[3]);
 104     qemu_put_betls(f, &env->cr[4]);
 105
 106     for(i = 0; i < 8; i++)
 107         qemu_put_betls(f, &env->dr[i]);
 108
 109     /* MMU */
 110     a20_mask = (int32_t) env->a20_mask;
 111     qemu_put_be32s(f, &a20_mask);
 112
 113     /* XMM */
 114     qemu_put_be32s(f, &env->mxcsr);
 115     for(i = 0; i < CPU_NB_REGS; i++) {
 116         qemu_put_be64s(f, &env->xmm_regs[i].XMM_Q(0));
 117         qemu_put_be64s(f, &env->xmm_regs[i].XMM_Q(1));
 118     }
 119
 120 #ifdef TARGET_X86_64
 121     qemu_put_be64s(f, &env->efer);
 122     qemu_put_be64s(f, &env->star);
 123     qemu_put_be64s(f, &env->lstar);
 124     qemu_put_be64s(f, &env->cstar);
 125     qemu_put_be64s(f, &env->fmask);
 126     qemu_put_be64s(f, &env->kernelgsbase);
 127 #endif
 128     qemu_put_be32s(f, &env->smbase);
 129
 130     if (kvm_enabled()) {
 131         for (i = 0; i < NR_IRQ_WORDS ; i++) {
 132             qemu_put_be32s(f, &env->kvm_interrupt_bitmap[i]);
 133         }
 134         qemu_put_be64s(f, &env->tsc);
 135         qemu_put_be32s(f, &env->mp_state);
 136     }
 137 }
 138
 139 #ifdef USE_X86LDOUBLE
 140 /* XXX: add that in a FPU generic layer */
 141 union x86_longdouble {
 142     uint64_t mant;
 143     uint16_t exp;
 144 };
 145
 146 #define MANTD1(fp)      (fp & ((1LL << 52) - 1))
 147 #define EXPBIAS1 1023
 148 #define EXPD1(fp)       ((fp >> 52) & 0x7FF)
 149 #define SIGND1(fp)      ((fp >> 32) & 0x80000000)
 150
 151 static void fp64_to_fp80(union x86_longdouble *p, uint64_t temp)
 152 {
 153     int e;
 154     /* mantissa */
 155     p->mant = (MANTD1(temp) << 11) | (1LL << 63);
 156     /* exponent + sign */
 157     e = EXPD1(temp) - EXPBIAS1 + 16383;
 158     e |= SIGND1(temp) >> 16;
 159     p->exp = e;
 160 }
 161 #endif
 162
 163 int cpu_load(QEMUFile *f, void *opaque, int version_id)
 164 {
 165     CPUState *env = opaque;
 166     int i, guess_mmx;
 167     uint32_t hflags;
 168     uint16_t fpus, fpuc, fptag, fpregs_format;
 169     int32_t a20_mask;
 170
 171     if (version_id < 3 || version_id > 5)
 172         return -EINVAL;
 173     for(i = 0; i < CPU_NB_REGS; i++)
 174         qemu_get_betls(f, &env->regs[i]);
 175     qemu_get_betls(f, &env->eip);
 176     qemu_get_betls(f, &env->eflags);
 177     qemu_get_be32s(f, &hflags);
 178
 179     qemu_get_be16s(f, &fpuc);
 180     qemu_get_be16s(f, &fpus);
 181     qemu_get_be16s(f, &fptag);
 182     qemu_get_be16s(f, &fpregs_format);
 183
 184     /* NOTE: we cannot always restore the FPU state if the image come
 185        from a host with a different 'USE_X86LDOUBLE' define. We guess
 186        if we are in an MMX state to restore correctly in that case. */
 187     guess_mmx = ((fptag == 0xff) && (fpus & 0x3800) == 0);
 188     for(i = 0; i < 8; i++) {
 189         uint64_t mant;
 190         uint16_t exp;
 191
 192         switch(fpregs_format) {
 193         case 0:
 194             mant = qemu_get_be64(f);
 195             exp = qemu_get_be16(f);
 196 #ifdef USE_X86LDOUBLE
 197             env->fpregs[i].d = cpu_set_fp80(mant, exp);
 198 #else
 199             /* difficult case */
 200             if (guess_mmx)
 201                 env->fpregs[i].mmx.MMX_Q(0) = mant;
 202             else
 203                 env->fpregs[i].d = cpu_set_fp80(mant, exp);
 204 #endif
 205             break;
 206         case 1:
 207             mant = qemu_get_be64(f);
 208 #ifdef USE_X86LDOUBLE
 209             {
 210                 union x86_longdouble *p;
 211                 /* difficult case */
 212                 p = (void *)&env->fpregs[i];
 213                 if (guess_mmx) {
 214                     p->mant = mant;
 215                     p->exp = 0xffff;
 216                 } else {
 217                     fp64_to_fp80(p, mant);
 218                 }
 219             }
 220 #else
 221             env->fpregs[i].mmx.MMX_Q(0) = mant;
 222 #endif
 223             break;
 224         default:
 225             return -EINVAL;
 226         }
 227     }
 228
 229     env->fpuc = fpuc;
 230     /* XXX: restore FPU round state */
 231     env->fpstt = (fpus >> 11) & 7;
 232     env->fpus = fpus & ~0x3800;
 233     fptag ^= 0xff;
 234     for(i = 0; i < 8; i++) {
 235         env->fptags[i] = (fptag >> i) & 1;
 236     }
 237
 238     for(i = 0; i < 6; i++)
 239         cpu_get_seg(f, &env->segs[i]);
 240     cpu_get_seg(f, &env->ldt);
 241     cpu_get_seg(f, &env->tr);
 242     cpu_get_seg(f, &env->gdt);
 243     cpu_get_seg(f, &env->idt);
 244
 245     qemu_get_be32s(f, &env->sysenter_cs);
 246     qemu_get_be32s(f, &env->sysenter_esp);
 247     qemu_get_be32s(f, &env->sysenter_eip);
 248
 249     qemu_get_betls(f, &env->cr[0]);
 250     qemu_get_betls(f, &env->cr[2]);
 251     qemu_get_betls(f, &env->cr[3]);
 252     qemu_get_betls(f, &env->cr[4]);
 253
 254     for(i = 0; i < 8; i++)
 255         qemu_get_betls(f, &env->dr[i]);
 256
 257     /* MMU */
 258     qemu_get_be32s(f, &a20_mask);
 259     env->a20_mask = a20_mask;
 260
 261     qemu_get_be32s(f, &env->mxcsr);
 262     for(i = 0; i < CPU_NB_REGS; i++) {
 263         qemu_get_be64s(f, &env->xmm_regs[i].XMM_Q(0));
 264         qemu_get_be64s(f, &env->xmm_regs[i].XMM_Q(1));
 265     }
 266
 267 #ifdef TARGET_X86_64
 268     qemu_get_be64s(f, &env->efer);
 269     qemu_get_be64s(f, &env->star);
 270     qemu_get_be64s(f, &env->lstar);
 271     qemu_get_be64s(f, &env->cstar);
 272     qemu_get_be64s(f, &env->fmask);
 273     qemu_get_be64s(f, &env->kernelgsbase);
 274 #endif
 275     if (version_id >= 4)
 276         qemu_get_be32s(f, &env->smbase);
 277
 278     /* XXX: compute hflags from scratch, except for CPL and IIF */
 279     env->hflags = hflags;
 280     tlb_flush(env, 1);
 281     if (kvm_enabled()) {
 282         /* when in-kernel irqchip is used, HF_HALTED_MASK causes deadlock
 283            because no userspace IRQs will ever clear this flag */
 284         env->hflags &= ~HF_HALTED_MASK;
 285         for (i = 0; i < NR_IRQ_WORDS ; i++) {
 286             qemu_get_be32s(f, &env->kvm_interrupt_bitmap[i]);
 287         }
 288         qemu_get_be64s(f, &env->tsc);
 289         kvm_load_registers(env);
 290         if (version_id >= 5) {
 291             qemu_get_be32s(f, &env->mp_state);
 292             kvm_load_mpstate(env);
 293         }
 294     }
 295     return 0;
 296 }