hw/device-assignment.h

   1 /*
   2  * Copyright (c) 2007, Neocleus Corporation.
   3  * Copyright (c) 2007, Intel Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
  16  * Place - Suite 330, Boston, MA 02111-1307 USA.
  17  *
  18  *  Data structures for storing PCI state
  19  *
  20  *  Adapted to kvm by Qumranet
  21  *
  22  *  Copyright (c) 2007, Neocleus, Alex Novik (alex@neocleus.com)
  23  *  Copyright (c) 2007, Neocleus, Guy Zana (guy@neocleus.com)
  24  *  Copyright (C) 2008, Qumranet, Amit Shah (amit.shah@qumranet.com)
  25  *  Copyright (C) 2008, Red Hat, Amit Shah (amit.shah@redhat.com)
  26  */
  27
  28 #ifndef __DEVICE_ASSIGNMENT_H__
  29 #define __DEVICE_ASSIGNMENT_H__
  30
  31 #include <sys/mman.h>
  32 #include "qemu-common.h"
  33 #include "sys-queue.h"
  34 #include "pci.h"
  35
  36 /* From include/linux/pci.h in the kernel sources */
  37 #define PCI_DEVFN(slot, func)   ((((slot) & 0x1f) << 3) | ((func) & 0x07))
  38
  39 /* The number of BARs in the config space header */
  40 #define MAX_IO_REGIONS (6)
  41
  42 typedef struct {
  43     int type;           /* Memory or port I/O */
  44     int valid;
  45     uint32_t base_addr;
  46     uint32_t size;    /* size of the region */
  47     int resource_fd;
  48 } PCIRegion;
  49
  50 typedef struct {
  51     uint8_t bus, dev, func; /* Bus inside domain, device and function */
  52     int irq;                /* IRQ number */
  53     uint16_t region_number; /* number of active regions */
  54
  55     /* Port I/O or MMIO Regions */
  56     PCIRegion regions[MAX_IO_REGIONS];
  57     int config_fd;
  58 } PCIDevRegions;
  59
  60 typedef struct {
  61     target_phys_addr_t e_physbase;
  62     uint32_t memory_index;
  63     union {
  64         void *r_virtbase;    /* mmapped access address for memory regions */
  65         uint32_t r_baseport; /* the base guest port for I/O regions */
  66     } u;
  67     int num;            /* our index within v_addrs[] */
  68     uint32_t e_size;    /* emulated size of region in bytes */
  69     uint32_t r_size;    /* real size of region in bytes */
  70 } AssignedDevRegion;
  71
  72 typedef struct {
  73     PCIDevice dev;
  74     int intpin;
  75     uint8_t debug_flags;
  76     AssignedDevRegion v_addrs[PCI_NUM_REGIONS];
  77     PCIDevRegions real_device;
  78     int run;
  79     int girq;
  80     unsigned char h_busnr;
  81     unsigned int h_devfn;
  82     int bound;
  83 } AssignedDevice;
  84
  85 typedef struct AssignedDevInfo AssignedDevInfo;
  86
  87 struct AssignedDevInfo {
  88     char name[15];
  89     int bus;
  90     int dev;
  91     int func;
  92     AssignedDevice *assigned_dev;
  93     LIST_ENTRY(AssignedDevInfo) next;
  94     int disable_iommu;
  95 };
  96
  97 PCIDevice *init_assigned_device(AssignedDevInfo *adev, PCIBus *bus);
  98 AssignedDevInfo *add_assigned_device(const char *arg);
  99 void add_assigned_devices(PCIBus *bus, const char **devices, int n_devices);
 100 ram_addr_t assigned_dev_load_option_roms(ram_addr_t rom_base_offset);
 101 void assigned_dev_update_irqs(void);
 102
 103 #define MAX_DEV_ASSIGN_CMDLINE 8
 104
 105 extern const char *assigned_devices[MAX_DEV_ASSIGN_CMDLINE];
 106 extern int assigned_devices_index;
 107
 108 #endif              /* __DEVICE_ASSIGNMENT_H__ */