4 * Copyright (c) 2003-2008 Fabrice Bellard
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
28 #include <sys/syscall.h>
31 #include "qemu-common.h"
32 #include "cache-utils.h"
39 #define DEBUG_LOGFILE "/tmp/qemu.log"
45 static const char *interp_prefix
= CONFIG_QEMU_PREFIX
;
46 const char *qemu_uname_release
= CONFIG_UNAME_RELEASE
;
48 #if defined(__i386__) && !defined(CONFIG_STATIC)
49 /* Force usage of an ELF interpreter even if it is an ELF shared
51 const char interp
[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2";
54 /* for recent libc, we add these dummy symbols which are not declared
55 when generating a linked object (bug in ld ?) */
56 #if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(CONFIG_STATIC)
57 asm(".globl __preinit_array_start\n"
58 ".globl __preinit_array_end\n"
59 ".globl __init_array_start\n"
60 ".globl __init_array_end\n"
61 ".globl __fini_array_start\n"
62 ".globl __fini_array_end\n"
63 ".section \".rodata\"\n"
64 "__preinit_array_start:\n"
65 "__preinit_array_end:\n"
66 "__init_array_start:\n"
68 "__fini_array_start:\n"
74 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
75 we allocate a bigger stack. Need a better solution, for example
76 by remapping the process stack directly at the right place */
77 unsigned long x86_stack_size
= 512 * 1024;
79 void gemu_log(const char *fmt
, ...)
84 vfprintf(stderr
, fmt
, ap
);
88 #if defined(TARGET_I386)
89 int cpu_get_pic_interrupt(CPUState
*env
)
95 /* timers for rdtsc */
99 static uint64_t emu_time
;
101 int64_t cpu_get_real_ticks(void)
108 #if defined(USE_NPTL)
109 /***********************************************************/
110 /* Helper routines for implementing atomic operations. */
112 /* To implement exclusive operations we force all cpus to syncronise.
113 We don't require a full sync, only that no cpus are executing guest code.
114 The alternative is to map target atomic ops onto host equivalents,
115 which requires quite a lot of per host/target work. */
116 static pthread_mutex_t cpu_list_mutex
= PTHREAD_MUTEX_INITIALIZER
;
117 static pthread_mutex_t exclusive_lock
= PTHREAD_MUTEX_INITIALIZER
;
118 static pthread_cond_t exclusive_cond
= PTHREAD_COND_INITIALIZER
;
119 static pthread_cond_t exclusive_resume
= PTHREAD_COND_INITIALIZER
;
120 static int pending_cpus
;
122 /* Make sure everything is in a consistent state for calling fork(). */
123 void fork_start(void)
126 pthread_mutex_lock(&tb_lock
);
127 pthread_mutex_lock(&exclusive_lock
);
130 void fork_end(int child
)
133 /* Child processes created by fork() only have a single thread.
134 Discard information about the parent threads. */
135 first_cpu
= thread_env
;
136 thread_env
->next_cpu
= NULL
;
138 pthread_mutex_init(&exclusive_lock
, NULL
);
139 pthread_mutex_init(&cpu_list_mutex
, NULL
);
140 pthread_cond_init(&exclusive_cond
, NULL
);
141 pthread_cond_init(&exclusive_resume
, NULL
);
142 pthread_mutex_init(&tb_lock
, NULL
);
143 gdbserver_fork(thread_env
);
145 pthread_mutex_unlock(&exclusive_lock
);
146 pthread_mutex_unlock(&tb_lock
);
148 mmap_fork_end(child
);
151 /* Wait for pending exclusive operations to complete. The exclusive lock
153 static inline void exclusive_idle(void)
155 while (pending_cpus
) {
156 pthread_cond_wait(&exclusive_resume
, &exclusive_lock
);
160 /* Start an exclusive operation.
161 Must only be called from outside cpu_arm_exec. */
162 static inline void start_exclusive(void)
165 pthread_mutex_lock(&exclusive_lock
);
169 /* Make all other cpus stop executing. */
170 for (other
= first_cpu
; other
; other
= other
->next_cpu
) {
171 if (other
->running
) {
176 if (pending_cpus
> 1) {
177 pthread_cond_wait(&exclusive_cond
, &exclusive_lock
);
181 /* Finish an exclusive operation. */
182 static inline void end_exclusive(void)
185 pthread_cond_broadcast(&exclusive_resume
);
186 pthread_mutex_unlock(&exclusive_lock
);
189 /* Wait for exclusive ops to finish, and begin cpu execution. */
190 static inline void cpu_exec_start(CPUState
*env
)
192 pthread_mutex_lock(&exclusive_lock
);
195 pthread_mutex_unlock(&exclusive_lock
);
198 /* Mark cpu as not executing, and release pending exclusive ops. */
199 static inline void cpu_exec_end(CPUState
*env
)
201 pthread_mutex_lock(&exclusive_lock
);
203 if (pending_cpus
> 1) {
205 if (pending_cpus
== 1) {
206 pthread_cond_signal(&exclusive_cond
);
210 pthread_mutex_unlock(&exclusive_lock
);
213 void cpu_list_lock(void)
215 pthread_mutex_lock(&cpu_list_mutex
);
218 void cpu_list_unlock(void)
220 pthread_mutex_unlock(&cpu_list_mutex
);
222 #else /* if !USE_NPTL */
223 /* These are no-ops because we are not threadsafe. */
224 static inline void cpu_exec_start(CPUState
*env
)
228 static inline void cpu_exec_end(CPUState
*env
)
232 static inline void start_exclusive(void)
236 static inline void end_exclusive(void)
240 void fork_start(void)
244 void fork_end(int child
)
247 gdbserver_fork(thread_env
);
251 void cpu_list_lock(void)
255 void cpu_list_unlock(void)
262 /***********************************************************/
263 /* CPUX86 core interface */
265 void cpu_smm_update(CPUState
*env
)
269 uint64_t cpu_get_tsc(CPUX86State
*env
)
271 return cpu_get_real_ticks();
274 static void write_dt(void *ptr
, unsigned long addr
, unsigned long limit
,
279 e1
= (addr
<< 16) | (limit
& 0xffff);
280 e2
= ((addr
>> 16) & 0xff) | (addr
& 0xff000000) | (limit
& 0x000f0000);
287 static uint64_t *idt_table
;
289 static void set_gate64(void *ptr
, unsigned int type
, unsigned int dpl
,
290 uint64_t addr
, unsigned int sel
)
293 e1
= (addr
& 0xffff) | (sel
<< 16);
294 e2
= (addr
& 0xffff0000) | 0x8000 | (dpl
<< 13) | (type
<< 8);
298 p
[2] = tswap32(addr
>> 32);
301 /* only dpl matters as we do only user space emulation */
302 static void set_idt(int n
, unsigned int dpl
)
304 set_gate64(idt_table
+ n
* 2, 0, dpl
, 0, 0);
307 static void set_gate(void *ptr
, unsigned int type
, unsigned int dpl
,
308 uint32_t addr
, unsigned int sel
)
311 e1
= (addr
& 0xffff) | (sel
<< 16);
312 e2
= (addr
& 0xffff0000) | 0x8000 | (dpl
<< 13) | (type
<< 8);
318 /* only dpl matters as we do only user space emulation */
319 static void set_idt(int n
, unsigned int dpl
)
321 set_gate(idt_table
+ n
, 0, dpl
, 0, 0);
325 void cpu_loop(CPUX86State
*env
)
329 target_siginfo_t info
;
332 trapnr
= cpu_x86_exec(env
);
335 /* linux syscall from int $0x80 */
336 env
->regs
[R_EAX
] = do_syscall(env
,
347 /* linux syscall from syscall intruction */
348 env
->regs
[R_EAX
] = do_syscall(env
,
356 env
->eip
= env
->exception_next_eip
;
361 info
.si_signo
= SIGBUS
;
363 info
.si_code
= TARGET_SI_KERNEL
;
364 info
._sifields
._sigfault
._addr
= 0;
365 queue_signal(env
, info
.si_signo
, &info
);
368 /* XXX: potential problem if ABI32 */
369 #ifndef TARGET_X86_64
370 if (env
->eflags
& VM_MASK
) {
371 handle_vm86_fault(env
);
375 info
.si_signo
= SIGSEGV
;
377 info
.si_code
= TARGET_SI_KERNEL
;
378 info
._sifields
._sigfault
._addr
= 0;
379 queue_signal(env
, info
.si_signo
, &info
);
383 info
.si_signo
= SIGSEGV
;
385 if (!(env
->error_code
& 1))
386 info
.si_code
= TARGET_SEGV_MAPERR
;
388 info
.si_code
= TARGET_SEGV_ACCERR
;
389 info
._sifields
._sigfault
._addr
= env
->cr
[2];
390 queue_signal(env
, info
.si_signo
, &info
);
393 #ifndef TARGET_X86_64
394 if (env
->eflags
& VM_MASK
) {
395 handle_vm86_trap(env
, trapnr
);
399 /* division by zero */
400 info
.si_signo
= SIGFPE
;
402 info
.si_code
= TARGET_FPE_INTDIV
;
403 info
._sifields
._sigfault
._addr
= env
->eip
;
404 queue_signal(env
, info
.si_signo
, &info
);
409 #ifndef TARGET_X86_64
410 if (env
->eflags
& VM_MASK
) {
411 handle_vm86_trap(env
, trapnr
);
415 info
.si_signo
= SIGTRAP
;
417 if (trapnr
== EXCP01_DB
) {
418 info
.si_code
= TARGET_TRAP_BRKPT
;
419 info
._sifields
._sigfault
._addr
= env
->eip
;
421 info
.si_code
= TARGET_SI_KERNEL
;
422 info
._sifields
._sigfault
._addr
= 0;
424 queue_signal(env
, info
.si_signo
, &info
);
429 #ifndef TARGET_X86_64
430 if (env
->eflags
& VM_MASK
) {
431 handle_vm86_trap(env
, trapnr
);
435 info
.si_signo
= SIGSEGV
;
437 info
.si_code
= TARGET_SI_KERNEL
;
438 info
._sifields
._sigfault
._addr
= 0;
439 queue_signal(env
, info
.si_signo
, &info
);
443 info
.si_signo
= SIGILL
;
445 info
.si_code
= TARGET_ILL_ILLOPN
;
446 info
._sifields
._sigfault
._addr
= env
->eip
;
447 queue_signal(env
, info
.si_signo
, &info
);
450 /* just indicate that signals should be handled asap */
456 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
461 info
.si_code
= TARGET_TRAP_BRKPT
;
462 queue_signal(env
, info
.si_signo
, &info
);
467 pc
= env
->segs
[R_CS
].base
+ env
->eip
;
468 fprintf(stderr
, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
472 process_pending_signals(env
);
479 static void arm_cache_flush(abi_ulong start
, abi_ulong last
)
481 abi_ulong addr
, last1
;
487 last1
= ((addr
+ TARGET_PAGE_SIZE
) & TARGET_PAGE_MASK
) - 1;
490 tb_invalidate_page_range(addr
, last1
+ 1);
497 /* Handle a jump to the kernel code page. */
499 do_kernel_trap(CPUARMState
*env
)
505 switch (env
->regs
[15]) {
506 case 0xffff0fa0: /* __kernel_memory_barrier */
507 /* ??? No-op. Will need to do better for SMP. */
509 case 0xffff0fc0: /* __kernel_cmpxchg */
510 /* XXX: This only works between threads, not between processes.
511 It's probably possible to implement this with native host
512 operations. However things like ldrex/strex are much harder so
513 there's not much point trying. */
515 cpsr
= cpsr_read(env
);
517 /* FIXME: This should SEGV if the access fails. */
518 if (get_user_u32(val
, addr
))
520 if (val
== env
->regs
[0]) {
522 /* FIXME: Check for segfaults. */
523 put_user_u32(val
, addr
);
530 cpsr_write(env
, cpsr
, CPSR_C
);
533 case 0xffff0fe0: /* __kernel_get_tls */
534 env
->regs
[0] = env
->cp15
.c13_tls2
;
539 /* Jump back to the caller. */
540 addr
= env
->regs
[14];
545 env
->regs
[15] = addr
;
550 void cpu_loop(CPUARMState
*env
)
553 unsigned int n
, insn
;
554 target_siginfo_t info
;
559 trapnr
= cpu_arm_exec(env
);
564 TaskState
*ts
= env
->opaque
;
568 /* we handle the FPU emulation here, as Linux */
569 /* we get the opcode */
570 /* FIXME - what to do if get_user() fails? */
571 get_user_u32(opcode
, env
->regs
[15]);
573 rc
= EmulateAll(opcode
, &ts
->fpa
, env
);
574 if (rc
== 0) { /* illegal instruction */
575 info
.si_signo
= SIGILL
;
577 info
.si_code
= TARGET_ILL_ILLOPN
;
578 info
._sifields
._sigfault
._addr
= env
->regs
[15];
579 queue_signal(env
, info
.si_signo
, &info
);
580 } else if (rc
< 0) { /* FP exception */
583 /* translate softfloat flags to FPSR flags */
584 if (-rc
& float_flag_invalid
)
586 if (-rc
& float_flag_divbyzero
)
588 if (-rc
& float_flag_overflow
)
590 if (-rc
& float_flag_underflow
)
592 if (-rc
& float_flag_inexact
)
595 FPSR fpsr
= ts
->fpa
.fpsr
;
596 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
598 if (fpsr
& (arm_fpe
<< 16)) { /* exception enabled? */
599 info
.si_signo
= SIGFPE
;
602 /* ordered by priority, least first */
603 if (arm_fpe
& BIT_IXC
) info
.si_code
= TARGET_FPE_FLTRES
;
604 if (arm_fpe
& BIT_UFC
) info
.si_code
= TARGET_FPE_FLTUND
;
605 if (arm_fpe
& BIT_OFC
) info
.si_code
= TARGET_FPE_FLTOVF
;
606 if (arm_fpe
& BIT_DZC
) info
.si_code
= TARGET_FPE_FLTDIV
;
607 if (arm_fpe
& BIT_IOC
) info
.si_code
= TARGET_FPE_FLTINV
;
609 info
._sifields
._sigfault
._addr
= env
->regs
[15];
610 queue_signal(env
, info
.si_signo
, &info
);
615 /* accumulate unenabled exceptions */
616 if ((!(fpsr
& BIT_IXE
)) && (arm_fpe
& BIT_IXC
))
618 if ((!(fpsr
& BIT_UFE
)) && (arm_fpe
& BIT_UFC
))
620 if ((!(fpsr
& BIT_OFE
)) && (arm_fpe
& BIT_OFC
))
622 if ((!(fpsr
& BIT_DZE
)) && (arm_fpe
& BIT_DZC
))
624 if ((!(fpsr
& BIT_IOE
)) && (arm_fpe
& BIT_IOC
))
627 } else { /* everything OK */
638 if (trapnr
== EXCP_BKPT
) {
640 /* FIXME - what to do if get_user() fails? */
641 get_user_u16(insn
, env
->regs
[15]);
645 /* FIXME - what to do if get_user() fails? */
646 get_user_u32(insn
, env
->regs
[15]);
647 n
= (insn
& 0xf) | ((insn
>> 4) & 0xff0);
652 /* FIXME - what to do if get_user() fails? */
653 get_user_u16(insn
, env
->regs
[15] - 2);
656 /* FIXME - what to do if get_user() fails? */
657 get_user_u32(insn
, env
->regs
[15] - 4);
662 if (n
== ARM_NR_cacheflush
) {
663 arm_cache_flush(env
->regs
[0], env
->regs
[1]);
664 } else if (n
== ARM_NR_semihosting
665 || n
== ARM_NR_thumb_semihosting
) {
666 env
->regs
[0] = do_arm_semihosting (env
);
667 } else if (n
== 0 || n
>= ARM_SYSCALL_BASE
668 || (env
->thumb
&& n
== ARM_THUMB_SYSCALL
)) {
670 if (env
->thumb
|| n
== 0) {
673 n
-= ARM_SYSCALL_BASE
;
676 if ( n
> ARM_NR_BASE
) {
678 case ARM_NR_cacheflush
:
679 arm_cache_flush(env
->regs
[0], env
->regs
[1]);
682 cpu_set_tls(env
, env
->regs
[0]);
686 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
688 env
->regs
[0] = -TARGET_ENOSYS
;
692 env
->regs
[0] = do_syscall(env
,
707 /* just indicate that signals should be handled asap */
709 case EXCP_PREFETCH_ABORT
:
710 addr
= env
->cp15
.c6_insn
;
712 case EXCP_DATA_ABORT
:
713 addr
= env
->cp15
.c6_data
;
717 info
.si_signo
= SIGSEGV
;
719 /* XXX: check env->error_code */
720 info
.si_code
= TARGET_SEGV_MAPERR
;
721 info
._sifields
._sigfault
._addr
= addr
;
722 queue_signal(env
, info
.si_signo
, &info
);
729 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
734 info
.si_code
= TARGET_TRAP_BRKPT
;
735 queue_signal(env
, info
.si_signo
, &info
);
739 case EXCP_KERNEL_TRAP
:
740 if (do_kernel_trap(env
))
745 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
747 cpu_dump_state(env
, stderr
, fprintf
, 0);
750 process_pending_signals(env
);
757 #define SPARC64_STACK_BIAS 2047
761 /* WARNING: dealing with register windows _is_ complicated. More info
762 can be found at http://www.sics.se/~psm/sparcstack.html */
763 static inline int get_reg_index(CPUSPARCState
*env
, int cwp
, int index
)
765 index
= (index
+ cwp
* 16) % (16 * env
->nwindows
);
766 /* wrap handling : if cwp is on the last window, then we use the
767 registers 'after' the end */
768 if (index
< 8 && env
->cwp
== env
->nwindows
- 1)
769 index
+= 16 * env
->nwindows
;
773 /* save the register window 'cwp1' */
774 static inline void save_window_offset(CPUSPARCState
*env
, int cwp1
)
779 sp_ptr
= env
->regbase
[get_reg_index(env
, cwp1
, 6)];
780 #ifdef TARGET_SPARC64
782 sp_ptr
+= SPARC64_STACK_BIAS
;
784 #if defined(DEBUG_WIN)
785 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx
" save_cwp=%d\n",
788 for(i
= 0; i
< 16; i
++) {
789 /* FIXME - what to do if put_user() fails? */
790 put_user_ual(env
->regbase
[get_reg_index(env
, cwp1
, 8 + i
)], sp_ptr
);
791 sp_ptr
+= sizeof(abi_ulong
);
795 static void save_window(CPUSPARCState
*env
)
797 #ifndef TARGET_SPARC64
798 unsigned int new_wim
;
799 new_wim
= ((env
->wim
>> 1) | (env
->wim
<< (env
->nwindows
- 1))) &
800 ((1LL << env
->nwindows
) - 1);
801 save_window_offset(env
, cpu_cwp_dec(env
, env
->cwp
- 2));
804 save_window_offset(env
, cpu_cwp_dec(env
, env
->cwp
- 2));
810 static void restore_window(CPUSPARCState
*env
)
812 #ifndef TARGET_SPARC64
813 unsigned int new_wim
;
815 unsigned int i
, cwp1
;
818 #ifndef TARGET_SPARC64
819 new_wim
= ((env
->wim
<< 1) | (env
->wim
>> (env
->nwindows
- 1))) &
820 ((1LL << env
->nwindows
) - 1);
823 /* restore the invalid window */
824 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ 1);
825 sp_ptr
= env
->regbase
[get_reg_index(env
, cwp1
, 6)];
826 #ifdef TARGET_SPARC64
828 sp_ptr
+= SPARC64_STACK_BIAS
;
830 #if defined(DEBUG_WIN)
831 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx
" load_cwp=%d\n",
834 for(i
= 0; i
< 16; i
++) {
835 /* FIXME - what to do if get_user() fails? */
836 get_user_ual(env
->regbase
[get_reg_index(env
, cwp1
, 8 + i
)], sp_ptr
);
837 sp_ptr
+= sizeof(abi_ulong
);
839 #ifdef TARGET_SPARC64
841 if (env
->cleanwin
< env
->nwindows
- 1)
849 static void flush_windows(CPUSPARCState
*env
)
855 /* if restore would invoke restore_window(), then we can stop */
856 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ offset
);
857 #ifndef TARGET_SPARC64
858 if (env
->wim
& (1 << cwp1
))
861 if (env
->canrestore
== 0)
866 save_window_offset(env
, cwp1
);
869 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ 1);
870 #ifndef TARGET_SPARC64
871 /* set wim so that restore will reload the registers */
872 env
->wim
= 1 << cwp1
;
874 #if defined(DEBUG_WIN)
875 printf("flush_windows: nb=%d\n", offset
- 1);
879 void cpu_loop (CPUSPARCState
*env
)
882 target_siginfo_t info
;
885 trapnr
= cpu_sparc_exec (env
);
888 #ifndef TARGET_SPARC64
895 ret
= do_syscall (env
, env
->gregs
[1],
896 env
->regwptr
[0], env
->regwptr
[1],
897 env
->regwptr
[2], env
->regwptr
[3],
898 env
->regwptr
[4], env
->regwptr
[5]);
899 if ((unsigned int)ret
>= (unsigned int)(-515)) {
900 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
901 env
->xcc
|= PSR_CARRY
;
903 env
->psr
|= PSR_CARRY
;
907 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
908 env
->xcc
&= ~PSR_CARRY
;
910 env
->psr
&= ~PSR_CARRY
;
913 env
->regwptr
[0] = ret
;
914 /* next instruction */
916 env
->npc
= env
->npc
+ 4;
918 case 0x83: /* flush windows */
923 /* next instruction */
925 env
->npc
= env
->npc
+ 4;
927 #ifndef TARGET_SPARC64
928 case TT_WIN_OVF
: /* window overflow */
931 case TT_WIN_UNF
: /* window underflow */
937 info
.si_signo
= SIGSEGV
;
939 /* XXX: check env->error_code */
940 info
.si_code
= TARGET_SEGV_MAPERR
;
941 info
._sifields
._sigfault
._addr
= env
->mmuregs
[4];
942 queue_signal(env
, info
.si_signo
, &info
);
946 case TT_SPILL
: /* window overflow */
949 case TT_FILL
: /* window underflow */
955 info
.si_signo
= SIGSEGV
;
957 /* XXX: check env->error_code */
958 info
.si_code
= TARGET_SEGV_MAPERR
;
959 if (trapnr
== TT_DFAULT
)
960 info
._sifields
._sigfault
._addr
= env
->dmmuregs
[4];
962 info
._sifields
._sigfault
._addr
= env
->tsptr
->tpc
;
963 queue_signal(env
, info
.si_signo
, &info
);
969 sparc64_get_context(env
);
973 sparc64_set_context(env
);
978 /* just indicate that signals should be handled asap */
984 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
989 info
.si_code
= TARGET_TRAP_BRKPT
;
990 queue_signal(env
, info
.si_signo
, &info
);
995 printf ("Unhandled trap: 0x%x\n", trapnr
);
996 cpu_dump_state(env
, stderr
, fprintf
, 0);
999 process_pending_signals (env
);
1006 static inline uint64_t cpu_ppc_get_tb (CPUState
*env
)
1012 uint32_t cpu_ppc_load_tbl (CPUState
*env
)
1014 return cpu_ppc_get_tb(env
) & 0xFFFFFFFF;
1017 uint32_t cpu_ppc_load_tbu (CPUState
*env
)
1019 return cpu_ppc_get_tb(env
) >> 32;
1022 uint32_t cpu_ppc_load_atbl (CPUState
*env
)
1024 return cpu_ppc_get_tb(env
) & 0xFFFFFFFF;
1027 uint32_t cpu_ppc_load_atbu (CPUState
*env
)
1029 return cpu_ppc_get_tb(env
) >> 32;
1032 uint32_t cpu_ppc601_load_rtcu (CPUState
*env
)
1033 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
1035 uint32_t cpu_ppc601_load_rtcl (CPUState
*env
)
1037 return cpu_ppc_load_tbl(env
) & 0x3FFFFF80;
1040 /* XXX: to be fixed */
1041 int ppc_dcr_read (ppc_dcr_t
*dcr_env
, int dcrn
, target_ulong
*valp
)
1046 int ppc_dcr_write (ppc_dcr_t
*dcr_env
, int dcrn
, target_ulong val
)
1051 #define EXCP_DUMP(env, fmt, ...) \
1053 fprintf(stderr, fmt , ## __VA_ARGS__); \
1054 cpu_dump_state(env, stderr, fprintf, 0); \
1055 qemu_log(fmt, ## __VA_ARGS__); \
1056 log_cpu_state(env, 0); \
1059 void cpu_loop(CPUPPCState
*env
)
1061 target_siginfo_t info
;
1066 trapnr
= cpu_ppc_exec(env
);
1068 case POWERPC_EXCP_NONE
:
1071 case POWERPC_EXCP_CRITICAL
: /* Critical input */
1072 cpu_abort(env
, "Critical interrupt while in user mode. "
1075 case POWERPC_EXCP_MCHECK
: /* Machine check exception */
1076 cpu_abort(env
, "Machine check exception while in user mode. "
1079 case POWERPC_EXCP_DSI
: /* Data storage exception */
1080 EXCP_DUMP(env
, "Invalid data memory access: 0x" ADDRX
"\n",
1082 /* XXX: check this. Seems bugged */
1083 switch (env
->error_code
& 0xFF000000) {
1085 info
.si_signo
= TARGET_SIGSEGV
;
1087 info
.si_code
= TARGET_SEGV_MAPERR
;
1090 info
.si_signo
= TARGET_SIGILL
;
1092 info
.si_code
= TARGET_ILL_ILLADR
;
1095 info
.si_signo
= TARGET_SIGSEGV
;
1097 info
.si_code
= TARGET_SEGV_ACCERR
;
1100 /* Let's send a regular segfault... */
1101 EXCP_DUMP(env
, "Invalid segfault errno (%02x)\n",
1103 info
.si_signo
= TARGET_SIGSEGV
;
1105 info
.si_code
= TARGET_SEGV_MAPERR
;
1108 info
._sifields
._sigfault
._addr
= env
->nip
;
1109 queue_signal(env
, info
.si_signo
, &info
);
1111 case POWERPC_EXCP_ISI
: /* Instruction storage exception */
1112 EXCP_DUMP(env
, "Invalid instruction fetch: 0x\n" ADDRX
"\n",
1113 env
->spr
[SPR_SRR0
]);
1114 /* XXX: check this */
1115 switch (env
->error_code
& 0xFF000000) {
1117 info
.si_signo
= TARGET_SIGSEGV
;
1119 info
.si_code
= TARGET_SEGV_MAPERR
;
1123 info
.si_signo
= TARGET_SIGSEGV
;
1125 info
.si_code
= TARGET_SEGV_ACCERR
;
1128 /* Let's send a regular segfault... */
1129 EXCP_DUMP(env
, "Invalid segfault errno (%02x)\n",
1131 info
.si_signo
= TARGET_SIGSEGV
;
1133 info
.si_code
= TARGET_SEGV_MAPERR
;
1136 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1137 queue_signal(env
, info
.si_signo
, &info
);
1139 case POWERPC_EXCP_EXTERNAL
: /* External input */
1140 cpu_abort(env
, "External interrupt while in user mode. "
1143 case POWERPC_EXCP_ALIGN
: /* Alignment exception */
1144 EXCP_DUMP(env
, "Unaligned memory access\n");
1145 /* XXX: check this */
1146 info
.si_signo
= TARGET_SIGBUS
;
1148 info
.si_code
= TARGET_BUS_ADRALN
;
1149 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1150 queue_signal(env
, info
.si_signo
, &info
);
1152 case POWERPC_EXCP_PROGRAM
: /* Program exception */
1153 /* XXX: check this */
1154 switch (env
->error_code
& ~0xF) {
1155 case POWERPC_EXCP_FP
:
1156 EXCP_DUMP(env
, "Floating point program exception\n");
1157 info
.si_signo
= TARGET_SIGFPE
;
1159 switch (env
->error_code
& 0xF) {
1160 case POWERPC_EXCP_FP_OX
:
1161 info
.si_code
= TARGET_FPE_FLTOVF
;
1163 case POWERPC_EXCP_FP_UX
:
1164 info
.si_code
= TARGET_FPE_FLTUND
;
1166 case POWERPC_EXCP_FP_ZX
:
1167 case POWERPC_EXCP_FP_VXZDZ
:
1168 info
.si_code
= TARGET_FPE_FLTDIV
;
1170 case POWERPC_EXCP_FP_XX
:
1171 info
.si_code
= TARGET_FPE_FLTRES
;
1173 case POWERPC_EXCP_FP_VXSOFT
:
1174 info
.si_code
= TARGET_FPE_FLTINV
;
1176 case POWERPC_EXCP_FP_VXSNAN
:
1177 case POWERPC_EXCP_FP_VXISI
:
1178 case POWERPC_EXCP_FP_VXIDI
:
1179 case POWERPC_EXCP_FP_VXIMZ
:
1180 case POWERPC_EXCP_FP_VXVC
:
1181 case POWERPC_EXCP_FP_VXSQRT
:
1182 case POWERPC_EXCP_FP_VXCVI
:
1183 info
.si_code
= TARGET_FPE_FLTSUB
;
1186 EXCP_DUMP(env
, "Unknown floating point exception (%02x)\n",
1191 case POWERPC_EXCP_INVAL
:
1192 EXCP_DUMP(env
, "Invalid instruction\n");
1193 info
.si_signo
= TARGET_SIGILL
;
1195 switch (env
->error_code
& 0xF) {
1196 case POWERPC_EXCP_INVAL_INVAL
:
1197 info
.si_code
= TARGET_ILL_ILLOPC
;
1199 case POWERPC_EXCP_INVAL_LSWX
:
1200 info
.si_code
= TARGET_ILL_ILLOPN
;
1202 case POWERPC_EXCP_INVAL_SPR
:
1203 info
.si_code
= TARGET_ILL_PRVREG
;
1205 case POWERPC_EXCP_INVAL_FP
:
1206 info
.si_code
= TARGET_ILL_COPROC
;
1209 EXCP_DUMP(env
, "Unknown invalid operation (%02x)\n",
1210 env
->error_code
& 0xF);
1211 info
.si_code
= TARGET_ILL_ILLADR
;
1215 case POWERPC_EXCP_PRIV
:
1216 EXCP_DUMP(env
, "Privilege violation\n");
1217 info
.si_signo
= TARGET_SIGILL
;
1219 switch (env
->error_code
& 0xF) {
1220 case POWERPC_EXCP_PRIV_OPC
:
1221 info
.si_code
= TARGET_ILL_PRVOPC
;
1223 case POWERPC_EXCP_PRIV_REG
:
1224 info
.si_code
= TARGET_ILL_PRVREG
;
1227 EXCP_DUMP(env
, "Unknown privilege violation (%02x)\n",
1228 env
->error_code
& 0xF);
1229 info
.si_code
= TARGET_ILL_PRVOPC
;
1233 case POWERPC_EXCP_TRAP
:
1234 cpu_abort(env
, "Tried to call a TRAP\n");
1237 /* Should not happen ! */
1238 cpu_abort(env
, "Unknown program exception (%02x)\n",
1242 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1243 queue_signal(env
, info
.si_signo
, &info
);
1245 case POWERPC_EXCP_FPU
: /* Floating-point unavailable exception */
1246 EXCP_DUMP(env
, "No floating point allowed\n");
1247 info
.si_signo
= TARGET_SIGILL
;
1249 info
.si_code
= TARGET_ILL_COPROC
;
1250 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1251 queue_signal(env
, info
.si_signo
, &info
);
1253 case POWERPC_EXCP_SYSCALL
: /* System call exception */
1254 cpu_abort(env
, "Syscall exception while in user mode. "
1257 case POWERPC_EXCP_APU
: /* Auxiliary processor unavailable */
1258 EXCP_DUMP(env
, "No APU instruction allowed\n");
1259 info
.si_signo
= TARGET_SIGILL
;
1261 info
.si_code
= TARGET_ILL_COPROC
;
1262 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1263 queue_signal(env
, info
.si_signo
, &info
);
1265 case POWERPC_EXCP_DECR
: /* Decrementer exception */
1266 cpu_abort(env
, "Decrementer interrupt while in user mode. "
1269 case POWERPC_EXCP_FIT
: /* Fixed-interval timer interrupt */
1270 cpu_abort(env
, "Fix interval timer interrupt while in user mode. "
1273 case POWERPC_EXCP_WDT
: /* Watchdog timer interrupt */
1274 cpu_abort(env
, "Watchdog timer interrupt while in user mode. "
1277 case POWERPC_EXCP_DTLB
: /* Data TLB error */
1278 cpu_abort(env
, "Data TLB exception while in user mode. "
1281 case POWERPC_EXCP_ITLB
: /* Instruction TLB error */
1282 cpu_abort(env
, "Instruction TLB exception while in user mode. "
1285 case POWERPC_EXCP_SPEU
: /* SPE/embedded floating-point unavail. */
1286 EXCP_DUMP(env
, "No SPE/floating-point instruction allowed\n");
1287 info
.si_signo
= TARGET_SIGILL
;
1289 info
.si_code
= TARGET_ILL_COPROC
;
1290 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1291 queue_signal(env
, info
.si_signo
, &info
);
1293 case POWERPC_EXCP_EFPDI
: /* Embedded floating-point data IRQ */
1294 cpu_abort(env
, "Embedded floating-point data IRQ not handled\n");
1296 case POWERPC_EXCP_EFPRI
: /* Embedded floating-point round IRQ */
1297 cpu_abort(env
, "Embedded floating-point round IRQ not handled\n");
1299 case POWERPC_EXCP_EPERFM
: /* Embedded performance monitor IRQ */
1300 cpu_abort(env
, "Performance monitor exception not handled\n");
1302 case POWERPC_EXCP_DOORI
: /* Embedded doorbell interrupt */
1303 cpu_abort(env
, "Doorbell interrupt while in user mode. "
1306 case POWERPC_EXCP_DOORCI
: /* Embedded doorbell critical interrupt */
1307 cpu_abort(env
, "Doorbell critical interrupt while in user mode. "
1310 case POWERPC_EXCP_RESET
: /* System reset exception */
1311 cpu_abort(env
, "Reset interrupt while in user mode. "
1314 case POWERPC_EXCP_DSEG
: /* Data segment exception */
1315 cpu_abort(env
, "Data segment exception while in user mode. "
1318 case POWERPC_EXCP_ISEG
: /* Instruction segment exception */
1319 cpu_abort(env
, "Instruction segment exception "
1320 "while in user mode. Aborting\n");
1322 /* PowerPC 64 with hypervisor mode support */
1323 case POWERPC_EXCP_HDECR
: /* Hypervisor decrementer exception */
1324 cpu_abort(env
, "Hypervisor decrementer interrupt "
1325 "while in user mode. Aborting\n");
1327 case POWERPC_EXCP_TRACE
: /* Trace exception */
1329 * we use this exception to emulate step-by-step execution mode.
1332 /* PowerPC 64 with hypervisor mode support */
1333 case POWERPC_EXCP_HDSI
: /* Hypervisor data storage exception */
1334 cpu_abort(env
, "Hypervisor data storage exception "
1335 "while in user mode. Aborting\n");
1337 case POWERPC_EXCP_HISI
: /* Hypervisor instruction storage excp */
1338 cpu_abort(env
, "Hypervisor instruction storage exception "
1339 "while in user mode. Aborting\n");
1341 case POWERPC_EXCP_HDSEG
: /* Hypervisor data segment exception */
1342 cpu_abort(env
, "Hypervisor data segment exception "
1343 "while in user mode. Aborting\n");
1345 case POWERPC_EXCP_HISEG
: /* Hypervisor instruction segment excp */
1346 cpu_abort(env
, "Hypervisor instruction segment exception "
1347 "while in user mode. Aborting\n");
1349 case POWERPC_EXCP_VPU
: /* Vector unavailable exception */
1350 EXCP_DUMP(env
, "No Altivec instructions allowed\n");
1351 info
.si_signo
= TARGET_SIGILL
;
1353 info
.si_code
= TARGET_ILL_COPROC
;
1354 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1355 queue_signal(env
, info
.si_signo
, &info
);
1357 case POWERPC_EXCP_PIT
: /* Programmable interval timer IRQ */
1358 cpu_abort(env
, "Programable interval timer interrupt "
1359 "while in user mode. Aborting\n");
1361 case POWERPC_EXCP_IO
: /* IO error exception */
1362 cpu_abort(env
, "IO error exception while in user mode. "
1365 case POWERPC_EXCP_RUNM
: /* Run mode exception */
1366 cpu_abort(env
, "Run mode exception while in user mode. "
1369 case POWERPC_EXCP_EMUL
: /* Emulation trap exception */
1370 cpu_abort(env
, "Emulation trap exception not handled\n");
1372 case POWERPC_EXCP_IFTLB
: /* Instruction fetch TLB error */
1373 cpu_abort(env
, "Instruction fetch TLB exception "
1374 "while in user-mode. Aborting");
1376 case POWERPC_EXCP_DLTLB
: /* Data load TLB miss */
1377 cpu_abort(env
, "Data load TLB exception while in user-mode. "
1380 case POWERPC_EXCP_DSTLB
: /* Data store TLB miss */
1381 cpu_abort(env
, "Data store TLB exception while in user-mode. "
1384 case POWERPC_EXCP_FPA
: /* Floating-point assist exception */
1385 cpu_abort(env
, "Floating-point assist exception not handled\n");
1387 case POWERPC_EXCP_IABR
: /* Instruction address breakpoint */
1388 cpu_abort(env
, "Instruction address breakpoint exception "
1391 case POWERPC_EXCP_SMI
: /* System management interrupt */
1392 cpu_abort(env
, "System management interrupt while in user mode. "
1395 case POWERPC_EXCP_THERM
: /* Thermal interrupt */
1396 cpu_abort(env
, "Thermal interrupt interrupt while in user mode. "
1399 case POWERPC_EXCP_PERFM
: /* Embedded performance monitor IRQ */
1400 cpu_abort(env
, "Performance monitor exception not handled\n");
1402 case POWERPC_EXCP_VPUA
: /* Vector assist exception */
1403 cpu_abort(env
, "Vector assist exception not handled\n");
1405 case POWERPC_EXCP_SOFTP
: /* Soft patch exception */
1406 cpu_abort(env
, "Soft patch exception not handled\n");
1408 case POWERPC_EXCP_MAINT
: /* Maintenance exception */
1409 cpu_abort(env
, "Maintenance exception while in user mode. "
1412 case POWERPC_EXCP_STOP
: /* stop translation */
1413 /* We did invalidate the instruction cache. Go on */
1415 case POWERPC_EXCP_BRANCH
: /* branch instruction: */
1416 /* We just stopped because of a branch. Go on */
1418 case POWERPC_EXCP_SYSCALL_USER
:
1419 /* system call in user-mode emulation */
1421 * PPC ABI uses overflow flag in cr0 to signal an error
1425 printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env
->gpr
[0],
1426 env
->gpr
[3], env
->gpr
[4], env
->gpr
[5], env
->gpr
[6]);
1428 env
->crf
[0] &= ~0x1;
1429 ret
= do_syscall(env
, env
->gpr
[0], env
->gpr
[3], env
->gpr
[4],
1430 env
->gpr
[5], env
->gpr
[6], env
->gpr
[7],
1432 if (ret
== (uint32_t)(-TARGET_QEMU_ESIGRETURN
)) {
1433 /* Returning from a successful sigreturn syscall.
1434 Avoid corrupting register state. */
1437 if (ret
> (uint32_t)(-515)) {
1443 printf("syscall returned 0x%08x (%d)\n", ret
, ret
);
1450 sig
= gdb_handlesig(env
, TARGET_SIGTRAP
);
1452 info
.si_signo
= sig
;
1454 info
.si_code
= TARGET_TRAP_BRKPT
;
1455 queue_signal(env
, info
.si_signo
, &info
);
1459 case EXCP_INTERRUPT
:
1460 /* just indicate that signals should be handled asap */
1463 cpu_abort(env
, "Unknown exception 0x%d. Aborting\n", trapnr
);
1466 process_pending_signals(env
);
1473 #define MIPS_SYS(name, args) args,
1475 static const uint8_t mips_syscall_args
[] = {
1476 MIPS_SYS(sys_syscall
, 0) /* 4000 */
1477 MIPS_SYS(sys_exit
, 1)
1478 MIPS_SYS(sys_fork
, 0)
1479 MIPS_SYS(sys_read
, 3)
1480 MIPS_SYS(sys_write
, 3)
1481 MIPS_SYS(sys_open
, 3) /* 4005 */
1482 MIPS_SYS(sys_close
, 1)
1483 MIPS_SYS(sys_waitpid
, 3)
1484 MIPS_SYS(sys_creat
, 2)
1485 MIPS_SYS(sys_link
, 2)
1486 MIPS_SYS(sys_unlink
, 1) /* 4010 */
1487 MIPS_SYS(sys_execve
, 0)
1488 MIPS_SYS(sys_chdir
, 1)
1489 MIPS_SYS(sys_time
, 1)
1490 MIPS_SYS(sys_mknod
, 3)
1491 MIPS_SYS(sys_chmod
, 2) /* 4015 */
1492 MIPS_SYS(sys_lchown
, 3)
1493 MIPS_SYS(sys_ni_syscall
, 0)
1494 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_stat */
1495 MIPS_SYS(sys_lseek
, 3)
1496 MIPS_SYS(sys_getpid
, 0) /* 4020 */
1497 MIPS_SYS(sys_mount
, 5)
1498 MIPS_SYS(sys_oldumount
, 1)
1499 MIPS_SYS(sys_setuid
, 1)
1500 MIPS_SYS(sys_getuid
, 0)
1501 MIPS_SYS(sys_stime
, 1) /* 4025 */
1502 MIPS_SYS(sys_ptrace
, 4)
1503 MIPS_SYS(sys_alarm
, 1)
1504 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_fstat */
1505 MIPS_SYS(sys_pause
, 0)
1506 MIPS_SYS(sys_utime
, 2) /* 4030 */
1507 MIPS_SYS(sys_ni_syscall
, 0)
1508 MIPS_SYS(sys_ni_syscall
, 0)
1509 MIPS_SYS(sys_access
, 2)
1510 MIPS_SYS(sys_nice
, 1)
1511 MIPS_SYS(sys_ni_syscall
, 0) /* 4035 */
1512 MIPS_SYS(sys_sync
, 0)
1513 MIPS_SYS(sys_kill
, 2)
1514 MIPS_SYS(sys_rename
, 2)
1515 MIPS_SYS(sys_mkdir
, 2)
1516 MIPS_SYS(sys_rmdir
, 1) /* 4040 */
1517 MIPS_SYS(sys_dup
, 1)
1518 MIPS_SYS(sys_pipe
, 0)
1519 MIPS_SYS(sys_times
, 1)
1520 MIPS_SYS(sys_ni_syscall
, 0)
1521 MIPS_SYS(sys_brk
, 1) /* 4045 */
1522 MIPS_SYS(sys_setgid
, 1)
1523 MIPS_SYS(sys_getgid
, 0)
1524 MIPS_SYS(sys_ni_syscall
, 0) /* was signal(2) */
1525 MIPS_SYS(sys_geteuid
, 0)
1526 MIPS_SYS(sys_getegid
, 0) /* 4050 */
1527 MIPS_SYS(sys_acct
, 0)
1528 MIPS_SYS(sys_umount
, 2)
1529 MIPS_SYS(sys_ni_syscall
, 0)
1530 MIPS_SYS(sys_ioctl
, 3)
1531 MIPS_SYS(sys_fcntl
, 3) /* 4055 */
1532 MIPS_SYS(sys_ni_syscall
, 2)
1533 MIPS_SYS(sys_setpgid
, 2)
1534 MIPS_SYS(sys_ni_syscall
, 0)
1535 MIPS_SYS(sys_olduname
, 1)
1536 MIPS_SYS(sys_umask
, 1) /* 4060 */
1537 MIPS_SYS(sys_chroot
, 1)
1538 MIPS_SYS(sys_ustat
, 2)
1539 MIPS_SYS(sys_dup2
, 2)
1540 MIPS_SYS(sys_getppid
, 0)
1541 MIPS_SYS(sys_getpgrp
, 0) /* 4065 */
1542 MIPS_SYS(sys_setsid
, 0)
1543 MIPS_SYS(sys_sigaction
, 3)
1544 MIPS_SYS(sys_sgetmask
, 0)
1545 MIPS_SYS(sys_ssetmask
, 1)
1546 MIPS_SYS(sys_setreuid
, 2) /* 4070 */
1547 MIPS_SYS(sys_setregid
, 2)
1548 MIPS_SYS(sys_sigsuspend
, 0)
1549 MIPS_SYS(sys_sigpending
, 1)
1550 MIPS_SYS(sys_sethostname
, 2)
1551 MIPS_SYS(sys_setrlimit
, 2) /* 4075 */
1552 MIPS_SYS(sys_getrlimit
, 2)
1553 MIPS_SYS(sys_getrusage
, 2)
1554 MIPS_SYS(sys_gettimeofday
, 2)
1555 MIPS_SYS(sys_settimeofday
, 2)
1556 MIPS_SYS(sys_getgroups
, 2) /* 4080 */
1557 MIPS_SYS(sys_setgroups
, 2)
1558 MIPS_SYS(sys_ni_syscall
, 0) /* old_select */
1559 MIPS_SYS(sys_symlink
, 2)
1560 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_lstat */
1561 MIPS_SYS(sys_readlink
, 3) /* 4085 */
1562 MIPS_SYS(sys_uselib
, 1)
1563 MIPS_SYS(sys_swapon
, 2)
1564 MIPS_SYS(sys_reboot
, 3)
1565 MIPS_SYS(old_readdir
, 3)
1566 MIPS_SYS(old_mmap
, 6) /* 4090 */
1567 MIPS_SYS(sys_munmap
, 2)
1568 MIPS_SYS(sys_truncate
, 2)
1569 MIPS_SYS(sys_ftruncate
, 2)
1570 MIPS_SYS(sys_fchmod
, 2)
1571 MIPS_SYS(sys_fchown
, 3) /* 4095 */
1572 MIPS_SYS(sys_getpriority
, 2)
1573 MIPS_SYS(sys_setpriority
, 3)
1574 MIPS_SYS(sys_ni_syscall
, 0)
1575 MIPS_SYS(sys_statfs
, 2)
1576 MIPS_SYS(sys_fstatfs
, 2) /* 4100 */
1577 MIPS_SYS(sys_ni_syscall
, 0) /* was ioperm(2) */
1578 MIPS_SYS(sys_socketcall
, 2)
1579 MIPS_SYS(sys_syslog
, 3)
1580 MIPS_SYS(sys_setitimer
, 3)
1581 MIPS_SYS(sys_getitimer
, 2) /* 4105 */
1582 MIPS_SYS(sys_newstat
, 2)
1583 MIPS_SYS(sys_newlstat
, 2)
1584 MIPS_SYS(sys_newfstat
, 2)
1585 MIPS_SYS(sys_uname
, 1)
1586 MIPS_SYS(sys_ni_syscall
, 0) /* 4110 was iopl(2) */
1587 MIPS_SYS(sys_vhangup
, 0)
1588 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_idle() */
1589 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_vm86 */
1590 MIPS_SYS(sys_wait4
, 4)
1591 MIPS_SYS(sys_swapoff
, 1) /* 4115 */
1592 MIPS_SYS(sys_sysinfo
, 1)
1593 MIPS_SYS(sys_ipc
, 6)
1594 MIPS_SYS(sys_fsync
, 1)
1595 MIPS_SYS(sys_sigreturn
, 0)
1596 MIPS_SYS(sys_clone
, 6) /* 4120 */
1597 MIPS_SYS(sys_setdomainname
, 2)
1598 MIPS_SYS(sys_newuname
, 1)
1599 MIPS_SYS(sys_ni_syscall
, 0) /* sys_modify_ldt */
1600 MIPS_SYS(sys_adjtimex
, 1)
1601 MIPS_SYS(sys_mprotect
, 3) /* 4125 */
1602 MIPS_SYS(sys_sigprocmask
, 3)
1603 MIPS_SYS(sys_ni_syscall
, 0) /* was create_module */
1604 MIPS_SYS(sys_init_module
, 5)
1605 MIPS_SYS(sys_delete_module
, 1)
1606 MIPS_SYS(sys_ni_syscall
, 0) /* 4130 was get_kernel_syms */
1607 MIPS_SYS(sys_quotactl
, 0)
1608 MIPS_SYS(sys_getpgid
, 1)
1609 MIPS_SYS(sys_fchdir
, 1)
1610 MIPS_SYS(sys_bdflush
, 2)
1611 MIPS_SYS(sys_sysfs
, 3) /* 4135 */
1612 MIPS_SYS(sys_personality
, 1)
1613 MIPS_SYS(sys_ni_syscall
, 0) /* for afs_syscall */
1614 MIPS_SYS(sys_setfsuid
, 1)
1615 MIPS_SYS(sys_setfsgid
, 1)
1616 MIPS_SYS(sys_llseek
, 5) /* 4140 */
1617 MIPS_SYS(sys_getdents
, 3)
1618 MIPS_SYS(sys_select
, 5)
1619 MIPS_SYS(sys_flock
, 2)
1620 MIPS_SYS(sys_msync
, 3)
1621 MIPS_SYS(sys_readv
, 3) /* 4145 */
1622 MIPS_SYS(sys_writev
, 3)
1623 MIPS_SYS(sys_cacheflush
, 3)
1624 MIPS_SYS(sys_cachectl
, 3)
1625 MIPS_SYS(sys_sysmips
, 4)
1626 MIPS_SYS(sys_ni_syscall
, 0) /* 4150 */
1627 MIPS_SYS(sys_getsid
, 1)
1628 MIPS_SYS(sys_fdatasync
, 0)
1629 MIPS_SYS(sys_sysctl
, 1)
1630 MIPS_SYS(sys_mlock
, 2)
1631 MIPS_SYS(sys_munlock
, 2) /* 4155 */
1632 MIPS_SYS(sys_mlockall
, 1)
1633 MIPS_SYS(sys_munlockall
, 0)
1634 MIPS_SYS(sys_sched_setparam
, 2)
1635 MIPS_SYS(sys_sched_getparam
, 2)
1636 MIPS_SYS(sys_sched_setscheduler
, 3) /* 4160 */
1637 MIPS_SYS(sys_sched_getscheduler
, 1)
1638 MIPS_SYS(sys_sched_yield
, 0)
1639 MIPS_SYS(sys_sched_get_priority_max
, 1)
1640 MIPS_SYS(sys_sched_get_priority_min
, 1)
1641 MIPS_SYS(sys_sched_rr_get_interval
, 2) /* 4165 */
1642 MIPS_SYS(sys_nanosleep
, 2)
1643 MIPS_SYS(sys_mremap
, 4)
1644 MIPS_SYS(sys_accept
, 3)
1645 MIPS_SYS(sys_bind
, 3)
1646 MIPS_SYS(sys_connect
, 3) /* 4170 */
1647 MIPS_SYS(sys_getpeername
, 3)
1648 MIPS_SYS(sys_getsockname
, 3)
1649 MIPS_SYS(sys_getsockopt
, 5)
1650 MIPS_SYS(sys_listen
, 2)
1651 MIPS_SYS(sys_recv
, 4) /* 4175 */
1652 MIPS_SYS(sys_recvfrom
, 6)
1653 MIPS_SYS(sys_recvmsg
, 3)
1654 MIPS_SYS(sys_send
, 4)
1655 MIPS_SYS(sys_sendmsg
, 3)
1656 MIPS_SYS(sys_sendto
, 6) /* 4180 */
1657 MIPS_SYS(sys_setsockopt
, 5)
1658 MIPS_SYS(sys_shutdown
, 2)
1659 MIPS_SYS(sys_socket
, 3)
1660 MIPS_SYS(sys_socketpair
, 4)
1661 MIPS_SYS(sys_setresuid
, 3) /* 4185 */
1662 MIPS_SYS(sys_getresuid
, 3)
1663 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_query_module */
1664 MIPS_SYS(sys_poll
, 3)
1665 MIPS_SYS(sys_nfsservctl
, 3)
1666 MIPS_SYS(sys_setresgid
, 3) /* 4190 */
1667 MIPS_SYS(sys_getresgid
, 3)
1668 MIPS_SYS(sys_prctl
, 5)
1669 MIPS_SYS(sys_rt_sigreturn
, 0)
1670 MIPS_SYS(sys_rt_sigaction
, 4)
1671 MIPS_SYS(sys_rt_sigprocmask
, 4) /* 4195 */
1672 MIPS_SYS(sys_rt_sigpending
, 2)
1673 MIPS_SYS(sys_rt_sigtimedwait
, 4)
1674 MIPS_SYS(sys_rt_sigqueueinfo
, 3)
1675 MIPS_SYS(sys_rt_sigsuspend
, 0)
1676 MIPS_SYS(sys_pread64
, 6) /* 4200 */
1677 MIPS_SYS(sys_pwrite64
, 6)
1678 MIPS_SYS(sys_chown
, 3)
1679 MIPS_SYS(sys_getcwd
, 2)
1680 MIPS_SYS(sys_capget
, 2)
1681 MIPS_SYS(sys_capset
, 2) /* 4205 */
1682 MIPS_SYS(sys_sigaltstack
, 0)
1683 MIPS_SYS(sys_sendfile
, 4)
1684 MIPS_SYS(sys_ni_syscall
, 0)
1685 MIPS_SYS(sys_ni_syscall
, 0)
1686 MIPS_SYS(sys_mmap2
, 6) /* 4210 */
1687 MIPS_SYS(sys_truncate64
, 4)
1688 MIPS_SYS(sys_ftruncate64
, 4)
1689 MIPS_SYS(sys_stat64
, 2)
1690 MIPS_SYS(sys_lstat64
, 2)
1691 MIPS_SYS(sys_fstat64
, 2) /* 4215 */
1692 MIPS_SYS(sys_pivot_root
, 2)
1693 MIPS_SYS(sys_mincore
, 3)
1694 MIPS_SYS(sys_madvise
, 3)
1695 MIPS_SYS(sys_getdents64
, 3)
1696 MIPS_SYS(sys_fcntl64
, 3) /* 4220 */
1697 MIPS_SYS(sys_ni_syscall
, 0)
1698 MIPS_SYS(sys_gettid
, 0)
1699 MIPS_SYS(sys_readahead
, 5)
1700 MIPS_SYS(sys_setxattr
, 5)
1701 MIPS_SYS(sys_lsetxattr
, 5) /* 4225 */
1702 MIPS_SYS(sys_fsetxattr
, 5)
1703 MIPS_SYS(sys_getxattr
, 4)
1704 MIPS_SYS(sys_lgetxattr
, 4)
1705 MIPS_SYS(sys_fgetxattr
, 4)
1706 MIPS_SYS(sys_listxattr
, 3) /* 4230 */
1707 MIPS_SYS(sys_llistxattr
, 3)
1708 MIPS_SYS(sys_flistxattr
, 3)
1709 MIPS_SYS(sys_removexattr
, 2)
1710 MIPS_SYS(sys_lremovexattr
, 2)
1711 MIPS_SYS(sys_fremovexattr
, 2) /* 4235 */
1712 MIPS_SYS(sys_tkill
, 2)
1713 MIPS_SYS(sys_sendfile64
, 5)
1714 MIPS_SYS(sys_futex
, 2)
1715 MIPS_SYS(sys_sched_setaffinity
, 3)
1716 MIPS_SYS(sys_sched_getaffinity
, 3) /* 4240 */
1717 MIPS_SYS(sys_io_setup
, 2)
1718 MIPS_SYS(sys_io_destroy
, 1)
1719 MIPS_SYS(sys_io_getevents
, 5)
1720 MIPS_SYS(sys_io_submit
, 3)
1721 MIPS_SYS(sys_io_cancel
, 3) /* 4245 */
1722 MIPS_SYS(sys_exit_group
, 1)
1723 MIPS_SYS(sys_lookup_dcookie
, 3)
1724 MIPS_SYS(sys_epoll_create
, 1)
1725 MIPS_SYS(sys_epoll_ctl
, 4)
1726 MIPS_SYS(sys_epoll_wait
, 3) /* 4250 */
1727 MIPS_SYS(sys_remap_file_pages
, 5)
1728 MIPS_SYS(sys_set_tid_address
, 1)
1729 MIPS_SYS(sys_restart_syscall
, 0)
1730 MIPS_SYS(sys_fadvise64_64
, 7)
1731 MIPS_SYS(sys_statfs64
, 3) /* 4255 */
1732 MIPS_SYS(sys_fstatfs64
, 2)
1733 MIPS_SYS(sys_timer_create
, 3)
1734 MIPS_SYS(sys_timer_settime
, 4)
1735 MIPS_SYS(sys_timer_gettime
, 2)
1736 MIPS_SYS(sys_timer_getoverrun
, 1) /* 4260 */
1737 MIPS_SYS(sys_timer_delete
, 1)
1738 MIPS_SYS(sys_clock_settime
, 2)
1739 MIPS_SYS(sys_clock_gettime
, 2)
1740 MIPS_SYS(sys_clock_getres
, 2)
1741 MIPS_SYS(sys_clock_nanosleep
, 4) /* 4265 */
1742 MIPS_SYS(sys_tgkill
, 3)
1743 MIPS_SYS(sys_utimes
, 2)
1744 MIPS_SYS(sys_mbind
, 4)
1745 MIPS_SYS(sys_ni_syscall
, 0) /* sys_get_mempolicy */
1746 MIPS_SYS(sys_ni_syscall
, 0) /* 4270 sys_set_mempolicy */
1747 MIPS_SYS(sys_mq_open
, 4)
1748 MIPS_SYS(sys_mq_unlink
, 1)
1749 MIPS_SYS(sys_mq_timedsend
, 5)
1750 MIPS_SYS(sys_mq_timedreceive
, 5)
1751 MIPS_SYS(sys_mq_notify
, 2) /* 4275 */
1752 MIPS_SYS(sys_mq_getsetattr
, 3)
1753 MIPS_SYS(sys_ni_syscall
, 0) /* sys_vserver */
1754 MIPS_SYS(sys_waitid
, 4)
1755 MIPS_SYS(sys_ni_syscall
, 0) /* available, was setaltroot */
1756 MIPS_SYS(sys_add_key
, 5)
1757 MIPS_SYS(sys_request_key
, 4)
1758 MIPS_SYS(sys_keyctl
, 5)
1759 MIPS_SYS(sys_set_thread_area
, 1)
1760 MIPS_SYS(sys_inotify_init
, 0)
1761 MIPS_SYS(sys_inotify_add_watch
, 3) /* 4285 */
1762 MIPS_SYS(sys_inotify_rm_watch
, 2)
1763 MIPS_SYS(sys_migrate_pages
, 4)
1764 MIPS_SYS(sys_openat
, 4)
1765 MIPS_SYS(sys_mkdirat
, 3)
1766 MIPS_SYS(sys_mknodat
, 4) /* 4290 */
1767 MIPS_SYS(sys_fchownat
, 5)
1768 MIPS_SYS(sys_futimesat
, 3)
1769 MIPS_SYS(sys_fstatat64
, 4)
1770 MIPS_SYS(sys_unlinkat
, 3)
1771 MIPS_SYS(sys_renameat
, 4) /* 4295 */
1772 MIPS_SYS(sys_linkat
, 5)
1773 MIPS_SYS(sys_symlinkat
, 3)
1774 MIPS_SYS(sys_readlinkat
, 4)
1775 MIPS_SYS(sys_fchmodat
, 3)
1776 MIPS_SYS(sys_faccessat
, 3) /* 4300 */
1777 MIPS_SYS(sys_pselect6
, 6)
1778 MIPS_SYS(sys_ppoll
, 5)
1779 MIPS_SYS(sys_unshare
, 1)
1780 MIPS_SYS(sys_splice
, 4)
1781 MIPS_SYS(sys_sync_file_range
, 7) /* 4305 */
1782 MIPS_SYS(sys_tee
, 4)
1783 MIPS_SYS(sys_vmsplice
, 4)
1784 MIPS_SYS(sys_move_pages
, 6)
1785 MIPS_SYS(sys_set_robust_list
, 2)
1786 MIPS_SYS(sys_get_robust_list
, 3) /* 4310 */
1787 MIPS_SYS(sys_kexec_load
, 4)
1788 MIPS_SYS(sys_getcpu
, 3)
1789 MIPS_SYS(sys_epoll_pwait
, 6)
1790 MIPS_SYS(sys_ioprio_set
, 3)
1791 MIPS_SYS(sys_ioprio_get
, 2)
1796 static int do_store_exclusive(CPUMIPSState
*env
)
1799 target_ulong page_addr
;
1806 addr
= env
->CP0_LLAddr
;
1807 page_addr
= addr
& TARGET_PAGE_MASK
;
1810 flags
= page_get_flags(page_addr
);
1811 if ((flags
& PAGE_READ
) == 0) {
1814 reg
= env
->llreg
& 0x1f;
1815 d
= (env
->llreg
& 0x20) != 0;
1817 segv
= get_user_s64(val
, addr
);
1819 segv
= get_user_s32(val
, addr
);
1822 if (val
!= env
->llval
) {
1823 env
->active_tc
.gpr
[reg
] = 0;
1826 segv
= put_user_u64(env
->llnewval
, addr
);
1828 segv
= put_user_u32(env
->llnewval
, addr
);
1831 env
->active_tc
.gpr
[reg
] = 1;
1836 env
->CP0_LLAddr
= -1;
1838 env
->active_tc
.PC
+= 4;
1845 void cpu_loop(CPUMIPSState
*env
)
1847 target_siginfo_t info
;
1849 unsigned int syscall_num
;
1852 cpu_exec_start(env
);
1853 trapnr
= cpu_mips_exec(env
);
1857 syscall_num
= env
->active_tc
.gpr
[2] - 4000;
1858 env
->active_tc
.PC
+= 4;
1859 if (syscall_num
>= sizeof(mips_syscall_args
)) {
1864 abi_ulong arg5
= 0, arg6
= 0, arg7
= 0, arg8
= 0;
1866 nb_args
= mips_syscall_args
[syscall_num
];
1867 sp_reg
= env
->active_tc
.gpr
[29];
1869 /* these arguments are taken from the stack */
1870 /* FIXME - what to do if get_user() fails? */
1871 case 8: get_user_ual(arg8
, sp_reg
+ 28);
1872 case 7: get_user_ual(arg7
, sp_reg
+ 24);
1873 case 6: get_user_ual(arg6
, sp_reg
+ 20);
1874 case 5: get_user_ual(arg5
, sp_reg
+ 16);
1878 ret
= do_syscall(env
, env
->active_tc
.gpr
[2],
1879 env
->active_tc
.gpr
[4],
1880 env
->active_tc
.gpr
[5],
1881 env
->active_tc
.gpr
[6],
1882 env
->active_tc
.gpr
[7],
1883 arg5
, arg6
/*, arg7, arg8*/);
1885 if (ret
== -TARGET_QEMU_ESIGRETURN
) {
1886 /* Returning from a successful sigreturn syscall.
1887 Avoid clobbering register state. */
1890 if ((unsigned int)ret
>= (unsigned int)(-1133)) {
1891 env
->active_tc
.gpr
[7] = 1; /* error flag */
1894 env
->active_tc
.gpr
[7] = 0; /* error flag */
1896 env
->active_tc
.gpr
[2] = ret
;
1900 info
.si_signo
= TARGET_SIGSEGV
;
1902 /* XXX: check env->error_code */
1903 info
.si_code
= TARGET_SEGV_MAPERR
;
1904 info
._sifields
._sigfault
._addr
= env
->CP0_BadVAddr
;
1905 queue_signal(env
, info
.si_signo
, &info
);
1909 info
.si_signo
= TARGET_SIGILL
;
1912 queue_signal(env
, info
.si_signo
, &info
);
1914 case EXCP_INTERRUPT
:
1915 /* just indicate that signals should be handled asap */
1921 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
1924 info
.si_signo
= sig
;
1926 info
.si_code
= TARGET_TRAP_BRKPT
;
1927 queue_signal(env
, info
.si_signo
, &info
);
1932 if (do_store_exclusive(env
)) {
1933 info
.si_signo
= TARGET_SIGSEGV
;
1935 info
.si_code
= TARGET_SEGV_MAPERR
;
1936 info
._sifields
._sigfault
._addr
= env
->active_tc
.PC
;
1937 queue_signal(env
, info
.si_signo
, &info
);
1942 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
1944 cpu_dump_state(env
, stderr
, fprintf
, 0);
1947 process_pending_signals(env
);
1953 void cpu_loop (CPUState
*env
)
1956 target_siginfo_t info
;
1959 trapnr
= cpu_sh4_exec (env
);
1964 ret
= do_syscall(env
,
1972 env
->gregs
[0] = ret
;
1974 case EXCP_INTERRUPT
:
1975 /* just indicate that signals should be handled asap */
1981 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
1984 info
.si_signo
= sig
;
1986 info
.si_code
= TARGET_TRAP_BRKPT
;
1987 queue_signal(env
, info
.si_signo
, &info
);
1993 info
.si_signo
= SIGSEGV
;
1995 info
.si_code
= TARGET_SEGV_MAPERR
;
1996 info
._sifields
._sigfault
._addr
= env
->tea
;
1997 queue_signal(env
, info
.si_signo
, &info
);
2001 printf ("Unhandled trap: 0x%x\n", trapnr
);
2002 cpu_dump_state(env
, stderr
, fprintf
, 0);
2005 process_pending_signals (env
);
2011 void cpu_loop (CPUState
*env
)
2014 target_siginfo_t info
;
2017 trapnr
= cpu_cris_exec (env
);
2021 info
.si_signo
= SIGSEGV
;
2023 /* XXX: check env->error_code */
2024 info
.si_code
= TARGET_SEGV_MAPERR
;
2025 info
._sifields
._sigfault
._addr
= env
->pregs
[PR_EDA
];
2026 queue_signal(env
, info
.si_signo
, &info
);
2029 case EXCP_INTERRUPT
:
2030 /* just indicate that signals should be handled asap */
2033 ret
= do_syscall(env
,
2041 env
->regs
[10] = ret
;
2047 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2050 info
.si_signo
= sig
;
2052 info
.si_code
= TARGET_TRAP_BRKPT
;
2053 queue_signal(env
, info
.si_signo
, &info
);
2058 printf ("Unhandled trap: 0x%x\n", trapnr
);
2059 cpu_dump_state(env
, stderr
, fprintf
, 0);
2062 process_pending_signals (env
);
2067 #ifdef TARGET_MICROBLAZE
2068 void cpu_loop (CPUState
*env
)
2071 target_siginfo_t info
;
2074 trapnr
= cpu_mb_exec (env
);
2078 info
.si_signo
= SIGSEGV
;
2080 /* XXX: check env->error_code */
2081 info
.si_code
= TARGET_SEGV_MAPERR
;
2082 info
._sifields
._sigfault
._addr
= 0;
2083 queue_signal(env
, info
.si_signo
, &info
);
2086 case EXCP_INTERRUPT
:
2087 /* just indicate that signals should be handled asap */
2090 /* Return address is 4 bytes after the call. */
2092 ret
= do_syscall(env
,
2101 env
->sregs
[SR_PC
] = env
->regs
[14];
2107 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2110 info
.si_signo
= sig
;
2112 info
.si_code
= TARGET_TRAP_BRKPT
;
2113 queue_signal(env
, info
.si_signo
, &info
);
2118 printf ("Unhandled trap: 0x%x\n", trapnr
);
2119 cpu_dump_state(env
, stderr
, fprintf
, 0);
2122 process_pending_signals (env
);
2129 void cpu_loop(CPUM68KState
*env
)
2133 target_siginfo_t info
;
2134 TaskState
*ts
= env
->opaque
;
2137 trapnr
= cpu_m68k_exec(env
);
2141 if (ts
->sim_syscalls
) {
2143 nr
= lduw(env
->pc
+ 2);
2145 do_m68k_simcall(env
, nr
);
2151 case EXCP_HALT_INSN
:
2152 /* Semihosing syscall. */
2154 do_m68k_semihosting(env
, env
->dregs
[0]);
2158 case EXCP_UNSUPPORTED
:
2160 info
.si_signo
= SIGILL
;
2162 info
.si_code
= TARGET_ILL_ILLOPN
;
2163 info
._sifields
._sigfault
._addr
= env
->pc
;
2164 queue_signal(env
, info
.si_signo
, &info
);
2168 ts
->sim_syscalls
= 0;
2171 env
->dregs
[0] = do_syscall(env
,
2181 case EXCP_INTERRUPT
:
2182 /* just indicate that signals should be handled asap */
2186 info
.si_signo
= SIGSEGV
;
2188 /* XXX: check env->error_code */
2189 info
.si_code
= TARGET_SEGV_MAPERR
;
2190 info
._sifields
._sigfault
._addr
= env
->mmu
.ar
;
2191 queue_signal(env
, info
.si_signo
, &info
);
2198 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2201 info
.si_signo
= sig
;
2203 info
.si_code
= TARGET_TRAP_BRKPT
;
2204 queue_signal(env
, info
.si_signo
, &info
);
2209 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
2211 cpu_dump_state(env
, stderr
, fprintf
, 0);
2214 process_pending_signals(env
);
2217 #endif /* TARGET_M68K */
2220 void cpu_loop (CPUState
*env
)
2223 target_siginfo_t info
;
2226 trapnr
= cpu_alpha_exec (env
);
2230 fprintf(stderr
, "Reset requested. Exit\n");
2234 fprintf(stderr
, "Machine check exception. Exit\n");
2238 fprintf(stderr
, "Arithmetic trap.\n");
2241 case EXCP_HW_INTERRUPT
:
2242 fprintf(stderr
, "External interrupt. Exit\n");
2246 fprintf(stderr
, "MMU data fault\n");
2249 case EXCP_DTB_MISS_PAL
:
2250 fprintf(stderr
, "MMU data TLB miss in PALcode\n");
2254 fprintf(stderr
, "MMU instruction TLB miss\n");
2258 fprintf(stderr
, "MMU instruction access violation\n");
2261 case EXCP_DTB_MISS_NATIVE
:
2262 fprintf(stderr
, "MMU data TLB miss\n");
2266 fprintf(stderr
, "Unaligned access\n");
2270 fprintf(stderr
, "Invalid instruction\n");
2274 fprintf(stderr
, "Floating-point not allowed\n");
2277 case EXCP_CALL_PAL
... (EXCP_CALL_PALP
- 1):
2278 call_pal(env
, (trapnr
>> 6) | 0x80);
2280 case EXCP_CALL_PALP
... (EXCP_CALL_PALE
- 1):
2281 fprintf(stderr
, "Privileged call to PALcode\n");
2288 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2291 info
.si_signo
= sig
;
2293 info
.si_code
= TARGET_TRAP_BRKPT
;
2294 queue_signal(env
, info
.si_signo
, &info
);
2299 printf ("Unhandled trap: 0x%x\n", trapnr
);
2300 cpu_dump_state(env
, stderr
, fprintf
, 0);
2303 process_pending_signals (env
);
2306 #endif /* TARGET_ALPHA */
2308 static void usage(void)
2310 printf("qemu-" TARGET_ARCH
" version " QEMU_VERSION QEMU_PKGVERSION
", Copyright (c) 2003-2008 Fabrice Bellard\n"
2311 "usage: qemu-" TARGET_ARCH
" [options] program [arguments...]\n"
2312 "Linux CPU emulator (compiled for %s emulation)\n"
2314 "Standard options:\n"
2315 "-h print this help\n"
2316 "-g port wait gdb connection to port\n"
2317 "-L path set the elf interpreter prefix (default=%s)\n"
2318 "-s size set the stack size in bytes (default=%ld)\n"
2319 "-cpu model select CPU (-cpu ? for list)\n"
2320 "-drop-ld-preload drop LD_PRELOAD for target process\n"
2321 "-E var=value sets/modifies targets environment variable(s)\n"
2322 "-U var unsets targets environment variable(s)\n"
2323 "-0 argv0 forces target process argv[0] to be argv0\n"
2326 "-d options activate log (logfile=%s)\n"
2327 "-p pagesize set the host page size to 'pagesize'\n"
2328 "-singlestep always run in singlestep mode\n"
2329 "-strace log system calls\n"
2331 "Environment variables:\n"
2332 "QEMU_STRACE Print system calls and arguments similar to the\n"
2333 " 'strace' program. Enable by setting to any value.\n"
2334 "You can use -E and -U options to set/unset environment variables\n"
2335 "for target process. It is possible to provide several variables\n"
2336 "by repeating the option. For example:\n"
2337 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
2338 "Note that if you provide several changes to single variable\n"
2339 "last change will stay in effect.\n"
2348 THREAD CPUState
*thread_env
;
2350 void task_settid(TaskState
*ts
)
2352 if (ts
->ts_tid
== 0) {
2354 ts
->ts_tid
= (pid_t
)syscall(SYS_gettid
);
2356 /* when no threads are used, tid becomes pid */
2357 ts
->ts_tid
= getpid();
2362 void stop_all_tasks(void)
2365 * We trust that when using NPTL, start_exclusive()
2366 * handles thread stopping correctly.
2371 /* Assumes contents are already zeroed. */
2372 void init_task_state(TaskState
*ts
)
2377 ts
->first_free
= ts
->sigqueue_table
;
2378 for (i
= 0; i
< MAX_SIGQUEUE_SIZE
- 1; i
++) {
2379 ts
->sigqueue_table
[i
].next
= &ts
->sigqueue_table
[i
+ 1];
2381 ts
->sigqueue_table
[i
].next
= NULL
;
2384 int main(int argc
, char **argv
, char **envp
)
2386 const char *filename
;
2387 const char *cpu_model
;
2388 struct target_pt_regs regs1
, *regs
= ®s1
;
2389 struct image_info info1
, *info
= &info1
;
2390 struct linux_binprm bprm
;
2391 TaskState ts1
, *ts
= &ts1
;
2395 int gdbstub_port
= 0;
2396 char **target_environ
, **wrk
;
2399 envlist_t
*envlist
= NULL
;
2400 const char *argv0
= NULL
;
2407 qemu_cache_utils_init(envp
);
2410 cpu_set_log_filename(DEBUG_LOGFILE
);
2412 if ((envlist
= envlist_create()) == NULL
) {
2413 (void) fprintf(stderr
, "Unable to allocate envlist\n");
2417 /* add current environment into the list */
2418 for (wrk
= environ
; *wrk
!= NULL
; wrk
++) {
2419 (void) envlist_setenv(envlist
, *wrk
);
2432 if (!strcmp(r
, "-")) {
2434 } else if (!strcmp(r
, "d")) {
2436 const CPULogItem
*item
;
2442 mask
= cpu_str_to_log_mask(r
);
2444 printf("Log items (comma separated):\n");
2445 for(item
= cpu_log_items
; item
->mask
!= 0; item
++) {
2446 printf("%-10s %s\n", item
->name
, item
->help
);
2451 } else if (!strcmp(r
, "E")) {
2453 if (envlist_setenv(envlist
, r
) != 0)
2455 } else if (!strcmp(r
, "U")) {
2457 if (envlist_unsetenv(envlist
, r
) != 0)
2459 } else if (!strcmp(r
, "0")) {
2462 } else if (!strcmp(r
, "s")) {
2466 x86_stack_size
= strtol(r
, (char **)&r
, 0);
2467 if (x86_stack_size
<= 0)
2470 x86_stack_size
*= 1024 * 1024;
2471 else if (*r
== 'k' || *r
== 'K')
2472 x86_stack_size
*= 1024;
2473 } else if (!strcmp(r
, "L")) {
2474 interp_prefix
= argv
[optind
++];
2475 } else if (!strcmp(r
, "p")) {
2478 qemu_host_page_size
= atoi(argv
[optind
++]);
2479 if (qemu_host_page_size
== 0 ||
2480 (qemu_host_page_size
& (qemu_host_page_size
- 1)) != 0) {
2481 fprintf(stderr
, "page size must be a power of two\n");
2484 } else if (!strcmp(r
, "g")) {
2487 gdbstub_port
= atoi(argv
[optind
++]);
2488 } else if (!strcmp(r
, "r")) {
2489 qemu_uname_release
= argv
[optind
++];
2490 } else if (!strcmp(r
, "cpu")) {
2491 cpu_model
= argv
[optind
++];
2492 if (cpu_model
== NULL
|| strcmp(cpu_model
, "?") == 0) {
2493 /* XXX: implement xxx_cpu_list for targets that still miss it */
2494 #if defined(cpu_list)
2495 cpu_list(stdout
, &fprintf
);
2499 } else if (!strcmp(r
, "drop-ld-preload")) {
2500 (void) envlist_unsetenv(envlist
, "LD_PRELOAD");
2501 } else if (!strcmp(r
, "singlestep")) {
2503 } else if (!strcmp(r
, "strace")) {
2512 filename
= argv
[optind
];
2513 exec_path
= argv
[optind
];
2516 memset(regs
, 0, sizeof(struct target_pt_regs
));
2518 /* Zero out image_info */
2519 memset(info
, 0, sizeof(struct image_info
));
2521 memset(&bprm
, 0, sizeof (bprm
));
2523 /* Scan interp_prefix dir for replacement files. */
2524 init_paths(interp_prefix
);
2526 if (cpu_model
== NULL
) {
2527 #if defined(TARGET_I386)
2528 #ifdef TARGET_X86_64
2529 cpu_model
= "qemu64";
2531 cpu_model
= "qemu32";
2533 #elif defined(TARGET_ARM)
2535 #elif defined(TARGET_M68K)
2537 #elif defined(TARGET_SPARC)
2538 #ifdef TARGET_SPARC64
2539 cpu_model
= "TI UltraSparc II";
2541 cpu_model
= "Fujitsu MB86904";
2543 #elif defined(TARGET_MIPS)
2544 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
2549 #elif defined(TARGET_PPC)
2559 cpu_exec_init_all(0);
2560 /* NOTE: we need to init the CPU at this stage to get
2561 qemu_host_page_size */
2562 env
= cpu_init(cpu_model
);
2564 fprintf(stderr
, "Unable to find CPU definition\n");
2569 if (getenv("QEMU_STRACE")) {
2573 target_environ
= envlist_to_environ(envlist
, NULL
);
2574 envlist_free(envlist
);
2577 * Prepare copy of argv vector for target.
2579 target_argc
= argc
- optind
;
2580 target_argv
= calloc(target_argc
+ 1, sizeof (char *));
2581 if (target_argv
== NULL
) {
2582 (void) fprintf(stderr
, "Unable to allocate memory for target_argv\n");
2587 * If argv0 is specified (using '-0' switch) we replace
2588 * argv[0] pointer with the given one.
2591 if (argv0
!= NULL
) {
2592 target_argv
[i
++] = strdup(argv0
);
2594 for (; i
< target_argc
; i
++) {
2595 target_argv
[i
] = strdup(argv
[optind
+ i
]);
2597 target_argv
[target_argc
] = NULL
;
2599 memset(ts
, 0, sizeof(TaskState
));
2600 init_task_state(ts
);
2601 /* build Task State */
2607 ret
= loader_exec(filename
, target_argv
, target_environ
, regs
,
2610 printf("Error %d while loading %s\n", ret
, filename
);
2614 for (i
= 0; i
< target_argc
; i
++) {
2615 free(target_argv
[i
]);
2619 for (wrk
= target_environ
; *wrk
; wrk
++) {
2623 free(target_environ
);
2625 if (qemu_log_enabled()) {
2628 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx
"\n", info
->start_brk
);
2629 qemu_log("end_code 0x" TARGET_ABI_FMT_lx
"\n", info
->end_code
);
2630 qemu_log("start_code 0x" TARGET_ABI_FMT_lx
"\n",
2632 qemu_log("start_data 0x" TARGET_ABI_FMT_lx
"\n",
2634 qemu_log("end_data 0x" TARGET_ABI_FMT_lx
"\n", info
->end_data
);
2635 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx
"\n",
2637 qemu_log("brk 0x" TARGET_ABI_FMT_lx
"\n", info
->brk
);
2638 qemu_log("entry 0x" TARGET_ABI_FMT_lx
"\n", info
->entry
);
2641 target_set_brk(info
->brk
);
2645 #if defined(TARGET_I386)
2646 cpu_x86_set_cpl(env
, 3);
2648 env
->cr
[0] = CR0_PG_MASK
| CR0_WP_MASK
| CR0_PE_MASK
;
2649 env
->hflags
|= HF_PE_MASK
;
2650 if (env
->cpuid_features
& CPUID_SSE
) {
2651 env
->cr
[4] |= CR4_OSFXSR_MASK
;
2652 env
->hflags
|= HF_OSFXSR_MASK
;
2654 #ifndef TARGET_ABI32
2655 /* enable 64 bit mode if possible */
2656 if (!(env
->cpuid_ext2_features
& CPUID_EXT2_LM
)) {
2657 fprintf(stderr
, "The selected x86 CPU does not support 64 bit mode\n");
2660 env
->cr
[4] |= CR4_PAE_MASK
;
2661 env
->efer
|= MSR_EFER_LMA
| MSR_EFER_LME
;
2662 env
->hflags
|= HF_LMA_MASK
;
2665 /* flags setup : we activate the IRQs by default as in user mode */
2666 env
->eflags
|= IF_MASK
;
2668 /* linux register setup */
2669 #ifndef TARGET_ABI32
2670 env
->regs
[R_EAX
] = regs
->rax
;
2671 env
->regs
[R_EBX
] = regs
->rbx
;
2672 env
->regs
[R_ECX
] = regs
->rcx
;
2673 env
->regs
[R_EDX
] = regs
->rdx
;
2674 env
->regs
[R_ESI
] = regs
->rsi
;
2675 env
->regs
[R_EDI
] = regs
->rdi
;
2676 env
->regs
[R_EBP
] = regs
->rbp
;
2677 env
->regs
[R_ESP
] = regs
->rsp
;
2678 env
->eip
= regs
->rip
;
2680 env
->regs
[R_EAX
] = regs
->eax
;
2681 env
->regs
[R_EBX
] = regs
->ebx
;
2682 env
->regs
[R_ECX
] = regs
->ecx
;
2683 env
->regs
[R_EDX
] = regs
->edx
;
2684 env
->regs
[R_ESI
] = regs
->esi
;
2685 env
->regs
[R_EDI
] = regs
->edi
;
2686 env
->regs
[R_EBP
] = regs
->ebp
;
2687 env
->regs
[R_ESP
] = regs
->esp
;
2688 env
->eip
= regs
->eip
;
2691 /* linux interrupt setup */
2692 #ifndef TARGET_ABI32
2693 env
->idt
.limit
= 511;
2695 env
->idt
.limit
= 255;
2697 env
->idt
.base
= target_mmap(0, sizeof(uint64_t) * (env
->idt
.limit
+ 1),
2698 PROT_READ
|PROT_WRITE
,
2699 MAP_ANONYMOUS
|MAP_PRIVATE
, -1, 0);
2700 idt_table
= g2h(env
->idt
.base
);
2723 /* linux segment setup */
2725 uint64_t *gdt_table
;
2726 env
->gdt
.base
= target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES
,
2727 PROT_READ
|PROT_WRITE
,
2728 MAP_ANONYMOUS
|MAP_PRIVATE
, -1, 0);
2729 env
->gdt
.limit
= sizeof(uint64_t) * TARGET_GDT_ENTRIES
- 1;
2730 gdt_table
= g2h(env
->gdt
.base
);
2732 write_dt(&gdt_table
[__USER_CS
>> 3], 0, 0xfffff,
2733 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
2734 (3 << DESC_DPL_SHIFT
) | (0xa << DESC_TYPE_SHIFT
));
2736 /* 64 bit code segment */
2737 write_dt(&gdt_table
[__USER_CS
>> 3], 0, 0xfffff,
2738 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
2740 (3 << DESC_DPL_SHIFT
) | (0xa << DESC_TYPE_SHIFT
));
2742 write_dt(&gdt_table
[__USER_DS
>> 3], 0, 0xfffff,
2743 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
2744 (3 << DESC_DPL_SHIFT
) | (0x2 << DESC_TYPE_SHIFT
));
2746 cpu_x86_load_seg(env
, R_CS
, __USER_CS
);
2747 cpu_x86_load_seg(env
, R_SS
, __USER_DS
);
2749 cpu_x86_load_seg(env
, R_DS
, __USER_DS
);
2750 cpu_x86_load_seg(env
, R_ES
, __USER_DS
);
2751 cpu_x86_load_seg(env
, R_FS
, __USER_DS
);
2752 cpu_x86_load_seg(env
, R_GS
, __USER_DS
);
2753 /* This hack makes Wine work... */
2754 env
->segs
[R_FS
].selector
= 0;
2756 cpu_x86_load_seg(env
, R_DS
, 0);
2757 cpu_x86_load_seg(env
, R_ES
, 0);
2758 cpu_x86_load_seg(env
, R_FS
, 0);
2759 cpu_x86_load_seg(env
, R_GS
, 0);
2761 #elif defined(TARGET_ARM)
2764 cpsr_write(env
, regs
->uregs
[16], 0xffffffff);
2765 for(i
= 0; i
< 16; i
++) {
2766 env
->regs
[i
] = regs
->uregs
[i
];
2769 #elif defined(TARGET_SPARC)
2773 env
->npc
= regs
->npc
;
2775 for(i
= 0; i
< 8; i
++)
2776 env
->gregs
[i
] = regs
->u_regs
[i
];
2777 for(i
= 0; i
< 8; i
++)
2778 env
->regwptr
[i
] = regs
->u_regs
[i
+ 8];
2780 #elif defined(TARGET_PPC)
2784 #if defined(TARGET_PPC64)
2785 #if defined(TARGET_ABI32)
2786 env
->msr
&= ~((target_ulong
)1 << MSR_SF
);
2788 env
->msr
|= (target_ulong
)1 << MSR_SF
;
2791 env
->nip
= regs
->nip
;
2792 for(i
= 0; i
< 32; i
++) {
2793 env
->gpr
[i
] = regs
->gpr
[i
];
2796 #elif defined(TARGET_M68K)
2799 env
->dregs
[0] = regs
->d0
;
2800 env
->dregs
[1] = regs
->d1
;
2801 env
->dregs
[2] = regs
->d2
;
2802 env
->dregs
[3] = regs
->d3
;
2803 env
->dregs
[4] = regs
->d4
;
2804 env
->dregs
[5] = regs
->d5
;
2805 env
->dregs
[6] = regs
->d6
;
2806 env
->dregs
[7] = regs
->d7
;
2807 env
->aregs
[0] = regs
->a0
;
2808 env
->aregs
[1] = regs
->a1
;
2809 env
->aregs
[2] = regs
->a2
;
2810 env
->aregs
[3] = regs
->a3
;
2811 env
->aregs
[4] = regs
->a4
;
2812 env
->aregs
[5] = regs
->a5
;
2813 env
->aregs
[6] = regs
->a6
;
2814 env
->aregs
[7] = regs
->usp
;
2816 ts
->sim_syscalls
= 1;
2818 #elif defined(TARGET_MICROBLAZE)
2820 env
->regs
[0] = regs
->r0
;
2821 env
->regs
[1] = regs
->r1
;
2822 env
->regs
[2] = regs
->r2
;
2823 env
->regs
[3] = regs
->r3
;
2824 env
->regs
[4] = regs
->r4
;
2825 env
->regs
[5] = regs
->r5
;
2826 env
->regs
[6] = regs
->r6
;
2827 env
->regs
[7] = regs
->r7
;
2828 env
->regs
[8] = regs
->r8
;
2829 env
->regs
[9] = regs
->r9
;
2830 env
->regs
[10] = regs
->r10
;
2831 env
->regs
[11] = regs
->r11
;
2832 env
->regs
[12] = regs
->r12
;
2833 env
->regs
[13] = regs
->r13
;
2834 env
->regs
[14] = regs
->r14
;
2835 env
->regs
[15] = regs
->r15
;
2836 env
->regs
[16] = regs
->r16
;
2837 env
->regs
[17] = regs
->r17
;
2838 env
->regs
[18] = regs
->r18
;
2839 env
->regs
[19] = regs
->r19
;
2840 env
->regs
[20] = regs
->r20
;
2841 env
->regs
[21] = regs
->r21
;
2842 env
->regs
[22] = regs
->r22
;
2843 env
->regs
[23] = regs
->r23
;
2844 env
->regs
[24] = regs
->r24
;
2845 env
->regs
[25] = regs
->r25
;
2846 env
->regs
[26] = regs
->r26
;
2847 env
->regs
[27] = regs
->r27
;
2848 env
->regs
[28] = regs
->r28
;
2849 env
->regs
[29] = regs
->r29
;
2850 env
->regs
[30] = regs
->r30
;
2851 env
->regs
[31] = regs
->r31
;
2852 env
->sregs
[SR_PC
] = regs
->pc
;
2854 #elif defined(TARGET_MIPS)
2858 for(i
= 0; i
< 32; i
++) {
2859 env
->active_tc
.gpr
[i
] = regs
->regs
[i
];
2861 env
->active_tc
.PC
= regs
->cp0_epc
;
2863 #elif defined(TARGET_SH4)
2867 for(i
= 0; i
< 16; i
++) {
2868 env
->gregs
[i
] = regs
->regs
[i
];
2872 #elif defined(TARGET_ALPHA)
2876 for(i
= 0; i
< 28; i
++) {
2877 env
->ir
[i
] = ((abi_ulong
*)regs
)[i
];
2879 env
->ipr
[IPR_USP
] = regs
->usp
;
2880 env
->ir
[30] = regs
->usp
;
2882 env
->unique
= regs
->unique
;
2884 #elif defined(TARGET_CRIS)
2886 env
->regs
[0] = regs
->r0
;
2887 env
->regs
[1] = regs
->r1
;
2888 env
->regs
[2] = regs
->r2
;
2889 env
->regs
[3] = regs
->r3
;
2890 env
->regs
[4] = regs
->r4
;
2891 env
->regs
[5] = regs
->r5
;
2892 env
->regs
[6] = regs
->r6
;
2893 env
->regs
[7] = regs
->r7
;
2894 env
->regs
[8] = regs
->r8
;
2895 env
->regs
[9] = regs
->r9
;
2896 env
->regs
[10] = regs
->r10
;
2897 env
->regs
[11] = regs
->r11
;
2898 env
->regs
[12] = regs
->r12
;
2899 env
->regs
[13] = regs
->r13
;
2900 env
->regs
[14] = info
->start_stack
;
2901 env
->regs
[15] = regs
->acr
;
2902 env
->pc
= regs
->erp
;
2905 #error unsupported target CPU
2908 #if defined(TARGET_ARM) || defined(TARGET_M68K)
2909 ts
->stack_base
= info
->start_stack
;
2910 ts
->heap_base
= info
->brk
;
2911 /* This will be filled in on the first SYS_HEAPINFO call. */
2916 gdbserver_start (gdbstub_port
);
2917 gdb_handlesig(env
, 0);