Adjust to the new kernel's balloon parameter passing.
[qemu-kvm/fedora.git] / gdbstub.c
blobc33a66ef3d1995e4e6e0584aa6e9c91ae2a41b1f
1 /*
2 * gdb server stub
3 *
4 * Copyright (c) 2003-2005 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include "config.h"
21 #ifdef CONFIG_USER_ONLY
22 #include <stdlib.h>
23 #include <stdio.h>
24 #include <stdarg.h>
25 #include <string.h>
26 #include <errno.h>
27 #include <unistd.h>
28 #include <fcntl.h>
30 #include "qemu.h"
31 #else
32 #include "vl.h"
33 #endif
35 #include "qemu_socket.h"
36 #ifdef _WIN32
37 /* XXX: these constants may be independent of the host ones even for Unix */
38 #ifndef SIGTRAP
39 #define SIGTRAP 5
40 #endif
41 #ifndef SIGINT
42 #define SIGINT 2
43 #endif
44 #else
45 #include <signal.h>
46 #endif
48 //#define DEBUG_GDB
50 enum RSState {
51 RS_IDLE,
52 RS_GETLINE,
53 RS_CHKSUM1,
54 RS_CHKSUM2,
55 RS_SYSCALL,
57 typedef struct GDBState {
58 CPUState *env; /* current CPU */
59 enum RSState state; /* parsing state */
60 char line_buf[4096];
61 int line_buf_index;
62 int line_csum;
63 char last_packet[4100];
64 int last_packet_len;
65 #ifdef CONFIG_USER_ONLY
66 int fd;
67 int running_state;
68 #else
69 CharDriverState *chr;
70 #endif
71 } GDBState;
73 #ifdef CONFIG_USER_ONLY
74 /* XXX: This is not thread safe. Do we care? */
75 static int gdbserver_fd = -1;
77 /* XXX: remove this hack. */
78 static GDBState gdbserver_state;
80 static int get_char(GDBState *s)
82 uint8_t ch;
83 int ret;
85 for(;;) {
86 ret = recv(s->fd, &ch, 1, 0);
87 if (ret < 0) {
88 if (errno != EINTR && errno != EAGAIN)
89 return -1;
90 } else if (ret == 0) {
91 return -1;
92 } else {
93 break;
96 return ch;
98 #endif
100 /* GDB stub state for use by semihosting syscalls. */
101 static GDBState *gdb_syscall_state;
102 static gdb_syscall_complete_cb gdb_current_syscall_cb;
104 enum {
105 GDB_SYS_UNKNOWN,
106 GDB_SYS_ENABLED,
107 GDB_SYS_DISABLED,
108 } gdb_syscall_mode;
110 /* If gdb is connected when the first semihosting syscall occurs then use
111 remote gdb syscalls. Otherwise use native file IO. */
112 int use_gdb_syscalls(void)
114 if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
115 gdb_syscall_mode = (gdb_syscall_state ? GDB_SYS_ENABLED
116 : GDB_SYS_DISABLED);
118 return gdb_syscall_mode == GDB_SYS_ENABLED;
121 static void put_buffer(GDBState *s, const uint8_t *buf, int len)
123 #ifdef CONFIG_USER_ONLY
124 int ret;
126 while (len > 0) {
127 ret = send(s->fd, buf, len, 0);
128 if (ret < 0) {
129 if (errno != EINTR && errno != EAGAIN)
130 return;
131 } else {
132 buf += ret;
133 len -= ret;
136 #else
137 qemu_chr_write(s->chr, buf, len);
138 #endif
141 static inline int fromhex(int v)
143 if (v >= '0' && v <= '9')
144 return v - '0';
145 else if (v >= 'A' && v <= 'F')
146 return v - 'A' + 10;
147 else if (v >= 'a' && v <= 'f')
148 return v - 'a' + 10;
149 else
150 return 0;
153 static inline int tohex(int v)
155 if (v < 10)
156 return v + '0';
157 else
158 return v - 10 + 'a';
161 static void memtohex(char *buf, const uint8_t *mem, int len)
163 int i, c;
164 char *q;
165 q = buf;
166 for(i = 0; i < len; i++) {
167 c = mem[i];
168 *q++ = tohex(c >> 4);
169 *q++ = tohex(c & 0xf);
171 *q = '\0';
174 static void hextomem(uint8_t *mem, const char *buf, int len)
176 int i;
178 for(i = 0; i < len; i++) {
179 mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
180 buf += 2;
184 /* return -1 if error, 0 if OK */
185 static int put_packet(GDBState *s, char *buf)
187 int len, csum, i;
188 char *p;
190 #ifdef DEBUG_GDB
191 printf("reply='%s'\n", buf);
192 #endif
194 for(;;) {
195 p = s->last_packet;
196 *(p++) = '$';
197 len = strlen(buf);
198 memcpy(p, buf, len);
199 p += len;
200 csum = 0;
201 for(i = 0; i < len; i++) {
202 csum += buf[i];
204 *(p++) = '#';
205 *(p++) = tohex((csum >> 4) & 0xf);
206 *(p++) = tohex((csum) & 0xf);
208 s->last_packet_len = p - s->last_packet;
209 put_buffer(s, s->last_packet, s->last_packet_len);
211 #ifdef CONFIG_USER_ONLY
212 i = get_char(s);
213 if (i < 0)
214 return -1;
215 if (i == '+')
216 break;
217 #else
218 break;
219 #endif
221 return 0;
224 #if defined(TARGET_X86_64)
226 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
228 uint8_t *p = mem_buf;
229 int i, fpus;
231 #define PUTREG(x) do { \
232 target_ulong reg = tswapl(x); \
233 memcpy(p, &reg, sizeof reg); \
234 p += sizeof reg; \
235 } while (0)
236 #define PUTREG32(x) do { \
237 uint32_t reg = tswap32(x); \
238 memcpy(p, &reg, sizeof reg); \
239 p += sizeof reg; \
240 } while (0)
241 #define PUTREGF(x) do { \
242 memcpy(p, &(x), 10); \
243 p += sizeof (x); \
244 } while (0)
246 PUTREG(env->regs[R_EAX]);
247 PUTREG(env->regs[R_EBX]);
248 PUTREG(env->regs[R_ECX]);
249 PUTREG(env->regs[R_EDX]);
250 PUTREG(env->regs[R_ESI]);
251 PUTREG(env->regs[R_EDI]);
252 PUTREG(env->regs[R_EBP]);
253 PUTREG(env->regs[R_ESP]);
254 PUTREG(env->regs[8]);
255 PUTREG(env->regs[9]);
256 PUTREG(env->regs[10]);
257 PUTREG(env->regs[11]);
258 PUTREG(env->regs[12]);
259 PUTREG(env->regs[13]);
260 PUTREG(env->regs[14]);
261 PUTREG(env->regs[15]);
263 PUTREG(env->eip);
264 PUTREG32(env->eflags);
265 PUTREG32(env->segs[R_CS].selector);
266 PUTREG32(env->segs[R_SS].selector);
267 PUTREG32(env->segs[R_DS].selector);
268 PUTREG32(env->segs[R_ES].selector);
269 PUTREG32(env->segs[R_FS].selector);
270 PUTREG32(env->segs[R_GS].selector);
271 /* XXX: convert floats */
272 for(i = 0; i < 8; i++) {
273 PUTREGF(env->fpregs[i]);
275 PUTREG32(env->fpuc);
276 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
277 PUTREG32(fpus);
278 PUTREG32(0); /* XXX: convert tags */
279 PUTREG32(0); /* fiseg */
280 PUTREG32(0); /* fioff */
281 PUTREG32(0); /* foseg */
282 PUTREG32(0); /* fooff */
283 PUTREG32(0); /* fop */
285 #undef PUTREG
286 #undef PUTREG32
287 #undef PUTREGF
289 return p - mem_buf;
292 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
294 uint8_t *p = mem_buf;
295 uint32_t junk;
296 int i, fpus;
298 #define GETREG(x) do { \
299 target_ulong reg; \
300 memcpy(&reg, p, sizeof reg); \
301 x = tswapl(reg); \
302 p += sizeof reg; \
303 } while (0)
304 #define GETREG32(x) do { \
305 uint32_t reg; \
306 memcpy(&reg, p, sizeof reg); \
307 x = tswap32(reg); \
308 p += sizeof reg; \
309 } while (0)
310 #define GETREGF(x) do { \
311 memcpy(&(x), p, 10); \
312 p += 10; \
313 } while (0)
315 GETREG(env->regs[R_EAX]);
316 GETREG(env->regs[R_EBX]);
317 GETREG(env->regs[R_ECX]);
318 GETREG(env->regs[R_EDX]);
319 GETREG(env->regs[R_ESI]);
320 GETREG(env->regs[R_EDI]);
321 GETREG(env->regs[R_EBP]);
322 GETREG(env->regs[R_ESP]);
323 GETREG(env->regs[8]);
324 GETREG(env->regs[9]);
325 GETREG(env->regs[10]);
326 GETREG(env->regs[11]);
327 GETREG(env->regs[12]);
328 GETREG(env->regs[13]);
329 GETREG(env->regs[14]);
330 GETREG(env->regs[15]);
332 GETREG(env->eip);
333 GETREG32(env->eflags);
334 GETREG32(env->segs[R_CS].selector);
335 GETREG32(env->segs[R_SS].selector);
336 GETREG32(env->segs[R_DS].selector);
337 GETREG32(env->segs[R_ES].selector);
338 GETREG32(env->segs[R_FS].selector);
339 GETREG32(env->segs[R_GS].selector);
340 /* XXX: convert floats */
341 for(i = 0; i < 8; i++) {
342 GETREGF(env->fpregs[i]);
344 GETREG32(env->fpuc);
345 GETREG32(fpus); /* XXX: convert fpus */
346 GETREG32(junk); /* XXX: convert tags */
347 GETREG32(junk); /* fiseg */
348 GETREG32(junk); /* fioff */
349 GETREG32(junk); /* foseg */
350 GETREG32(junk); /* fooff */
351 GETREG32(junk); /* fop */
353 #undef GETREG
354 #undef GETREG32
355 #undef GETREGF
358 #elif defined(TARGET_I386)
360 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
362 uint32_t *registers = (uint32_t *)mem_buf;
363 int i, fpus;
365 for(i = 0; i < 8; i++) {
366 registers[i] = env->regs[i];
368 registers[8] = env->eip;
369 registers[9] = env->eflags;
370 registers[10] = env->segs[R_CS].selector;
371 registers[11] = env->segs[R_SS].selector;
372 registers[12] = env->segs[R_DS].selector;
373 registers[13] = env->segs[R_ES].selector;
374 registers[14] = env->segs[R_FS].selector;
375 registers[15] = env->segs[R_GS].selector;
376 /* XXX: convert floats */
377 for(i = 0; i < 8; i++) {
378 memcpy(mem_buf + 16 * 4 + i * 10, &env->fpregs[i], 10);
380 registers[36] = env->fpuc;
381 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
382 registers[37] = fpus;
383 registers[38] = 0; /* XXX: convert tags */
384 registers[39] = 0; /* fiseg */
385 registers[40] = 0; /* fioff */
386 registers[41] = 0; /* foseg */
387 registers[42] = 0; /* fooff */
388 registers[43] = 0; /* fop */
390 for(i = 0; i < 16; i++)
391 tswapls(&registers[i]);
392 for(i = 36; i < 44; i++)
393 tswapls(&registers[i]);
394 return 44 * 4;
397 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
399 uint32_t *registers = (uint32_t *)mem_buf;
400 int i;
402 for(i = 0; i < 8; i++) {
403 env->regs[i] = tswapl(registers[i]);
405 env->eip = tswapl(registers[8]);
406 env->eflags = tswapl(registers[9]);
407 #if defined(CONFIG_USER_ONLY)
408 #define LOAD_SEG(index, sreg)\
409 if (tswapl(registers[index]) != env->segs[sreg].selector)\
410 cpu_x86_load_seg(env, sreg, tswapl(registers[index]));
411 LOAD_SEG(10, R_CS);
412 LOAD_SEG(11, R_SS);
413 LOAD_SEG(12, R_DS);
414 LOAD_SEG(13, R_ES);
415 LOAD_SEG(14, R_FS);
416 LOAD_SEG(15, R_GS);
417 #endif
420 #elif defined (TARGET_PPC)
421 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
423 uint32_t *registers = (uint32_t *)mem_buf, tmp;
424 int i;
426 /* fill in gprs */
427 for(i = 0; i < 32; i++) {
428 registers[i] = tswapl(env->gpr[i]);
430 /* fill in fprs */
431 for (i = 0; i < 32; i++) {
432 registers[(i * 2) + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
433 registers[(i * 2) + 33] = tswapl(*((uint32_t *)&env->fpr[i] + 1));
435 /* nip, msr, ccr, lnk, ctr, xer, mq */
436 registers[96] = tswapl(env->nip);
437 registers[97] = tswapl(do_load_msr(env));
438 tmp = 0;
439 for (i = 0; i < 8; i++)
440 tmp |= env->crf[i] << (32 - ((i + 1) * 4));
441 registers[98] = tswapl(tmp);
442 registers[99] = tswapl(env->lr);
443 registers[100] = tswapl(env->ctr);
444 registers[101] = tswapl(do_load_xer(env));
445 registers[102] = 0;
447 return 103 * 4;
450 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
452 uint32_t *registers = (uint32_t *)mem_buf;
453 int i;
455 /* fill in gprs */
456 for (i = 0; i < 32; i++) {
457 env->gpr[i] = tswapl(registers[i]);
459 /* fill in fprs */
460 for (i = 0; i < 32; i++) {
461 *((uint32_t *)&env->fpr[i]) = tswapl(registers[(i * 2) + 32]);
462 *((uint32_t *)&env->fpr[i] + 1) = tswapl(registers[(i * 2) + 33]);
464 /* nip, msr, ccr, lnk, ctr, xer, mq */
465 env->nip = tswapl(registers[96]);
466 do_store_msr(env, tswapl(registers[97]));
467 registers[98] = tswapl(registers[98]);
468 for (i = 0; i < 8; i++)
469 env->crf[i] = (registers[98] >> (32 - ((i + 1) * 4))) & 0xF;
470 env->lr = tswapl(registers[99]);
471 env->ctr = tswapl(registers[100]);
472 do_store_xer(env, tswapl(registers[101]));
474 #elif defined (TARGET_SPARC)
475 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
477 target_ulong *registers = (target_ulong *)mem_buf;
478 int i;
480 /* fill in g0..g7 */
481 for(i = 0; i < 8; i++) {
482 registers[i] = tswapl(env->gregs[i]);
484 /* fill in register window */
485 for(i = 0; i < 24; i++) {
486 registers[i + 8] = tswapl(env->regwptr[i]);
488 #ifndef TARGET_SPARC64
489 /* fill in fprs */
490 for (i = 0; i < 32; i++) {
491 registers[i + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
493 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
494 registers[64] = tswapl(env->y);
496 target_ulong tmp;
498 tmp = GET_PSR(env);
499 registers[65] = tswapl(tmp);
501 registers[66] = tswapl(env->wim);
502 registers[67] = tswapl(env->tbr);
503 registers[68] = tswapl(env->pc);
504 registers[69] = tswapl(env->npc);
505 registers[70] = tswapl(env->fsr);
506 registers[71] = 0; /* csr */
507 registers[72] = 0;
508 return 73 * sizeof(target_ulong);
509 #else
510 /* fill in fprs */
511 for (i = 0; i < 64; i += 2) {
512 uint64_t tmp;
514 tmp = (uint64_t)tswap32(*((uint32_t *)&env->fpr[i])) << 32;
515 tmp |= tswap32(*((uint32_t *)&env->fpr[i + 1]));
516 registers[i/2 + 32] = tmp;
518 registers[64] = tswapl(env->pc);
519 registers[65] = tswapl(env->npc);
520 registers[66] = tswapl(env->tstate[env->tl]);
521 registers[67] = tswapl(env->fsr);
522 registers[68] = tswapl(env->fprs);
523 registers[69] = tswapl(env->y);
524 return 70 * sizeof(target_ulong);
525 #endif
528 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
530 target_ulong *registers = (target_ulong *)mem_buf;
531 int i;
533 /* fill in g0..g7 */
534 for(i = 0; i < 7; i++) {
535 env->gregs[i] = tswapl(registers[i]);
537 /* fill in register window */
538 for(i = 0; i < 24; i++) {
539 env->regwptr[i] = tswapl(registers[i + 8]);
541 #ifndef TARGET_SPARC64
542 /* fill in fprs */
543 for (i = 0; i < 32; i++) {
544 *((uint32_t *)&env->fpr[i]) = tswapl(registers[i + 32]);
546 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
547 env->y = tswapl(registers[64]);
548 PUT_PSR(env, tswapl(registers[65]));
549 env->wim = tswapl(registers[66]);
550 env->tbr = tswapl(registers[67]);
551 env->pc = tswapl(registers[68]);
552 env->npc = tswapl(registers[69]);
553 env->fsr = tswapl(registers[70]);
554 #else
555 for (i = 0; i < 64; i += 2) {
556 *((uint32_t *)&env->fpr[i]) = tswap32(registers[i/2 + 32] >> 32);
557 *((uint32_t *)&env->fpr[i + 1]) = tswap32(registers[i/2 + 32] & 0xffffffff);
559 env->pc = tswapl(registers[64]);
560 env->npc = tswapl(registers[65]);
561 env->tstate[env->tl] = tswapl(registers[66]);
562 env->fsr = tswapl(registers[67]);
563 env->fprs = tswapl(registers[68]);
564 env->y = tswapl(registers[69]);
565 #endif
567 #elif defined (TARGET_ARM)
568 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
570 int i;
571 uint8_t *ptr;
573 ptr = mem_buf;
574 /* 16 core integer registers (4 bytes each). */
575 for (i = 0; i < 16; i++)
577 *(uint32_t *)ptr = tswapl(env->regs[i]);
578 ptr += 4;
580 /* 8 FPA registers (12 bytes each), FPS (4 bytes).
581 Not yet implemented. */
582 memset (ptr, 0, 8 * 12 + 4);
583 ptr += 8 * 12 + 4;
584 /* CPSR (4 bytes). */
585 *(uint32_t *)ptr = tswapl (cpsr_read(env));
586 ptr += 4;
588 return ptr - mem_buf;
591 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
593 int i;
594 uint8_t *ptr;
596 ptr = mem_buf;
597 /* Core integer registers. */
598 for (i = 0; i < 16; i++)
600 env->regs[i] = tswapl(*(uint32_t *)ptr);
601 ptr += 4;
603 /* Ignore FPA regs and scr. */
604 ptr += 8 * 12 + 4;
605 cpsr_write (env, tswapl(*(uint32_t *)ptr), 0xffffffff);
607 #elif defined (TARGET_M68K)
608 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
610 int i;
611 uint8_t *ptr;
612 CPU_DoubleU u;
614 ptr = mem_buf;
615 /* D0-D7 */
616 for (i = 0; i < 8; i++) {
617 *(uint32_t *)ptr = tswapl(env->dregs[i]);
618 ptr += 4;
620 /* A0-A7 */
621 for (i = 0; i < 8; i++) {
622 *(uint32_t *)ptr = tswapl(env->aregs[i]);
623 ptr += 4;
625 *(uint32_t *)ptr = tswapl(env->sr);
626 ptr += 4;
627 *(uint32_t *)ptr = tswapl(env->pc);
628 ptr += 4;
629 /* F0-F7. The 68881/68040 have 12-bit extended precision registers.
630 ColdFire has 8-bit double precision registers. */
631 for (i = 0; i < 8; i++) {
632 u.d = env->fregs[i];
633 *(uint32_t *)ptr = tswap32(u.l.upper);
634 *(uint32_t *)ptr = tswap32(u.l.lower);
636 /* FP control regs (not implemented). */
637 memset (ptr, 0, 3 * 4);
638 ptr += 3 * 4;
640 return ptr - mem_buf;
643 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
645 int i;
646 uint8_t *ptr;
647 CPU_DoubleU u;
649 ptr = mem_buf;
650 /* D0-D7 */
651 for (i = 0; i < 8; i++) {
652 env->dregs[i] = tswapl(*(uint32_t *)ptr);
653 ptr += 4;
655 /* A0-A7 */
656 for (i = 0; i < 8; i++) {
657 env->aregs[i] = tswapl(*(uint32_t *)ptr);
658 ptr += 4;
660 env->sr = tswapl(*(uint32_t *)ptr);
661 ptr += 4;
662 env->pc = tswapl(*(uint32_t *)ptr);
663 ptr += 4;
664 /* F0-F7. The 68881/68040 have 12-bit extended precision registers.
665 ColdFire has 8-bit double precision registers. */
666 for (i = 0; i < 8; i++) {
667 u.l.upper = tswap32(*(uint32_t *)ptr);
668 u.l.lower = tswap32(*(uint32_t *)ptr);
669 env->fregs[i] = u.d;
671 /* FP control regs (not implemented). */
672 ptr += 3 * 4;
674 #elif defined (TARGET_MIPS)
675 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
677 int i;
678 uint8_t *ptr;
680 ptr = mem_buf;
681 for (i = 0; i < 32; i++)
683 *(uint32_t *)ptr = tswapl(env->gpr[i]);
684 ptr += 4;
687 *(uint32_t *)ptr = tswapl(env->CP0_Status);
688 ptr += 4;
690 *(uint32_t *)ptr = tswapl(env->LO);
691 ptr += 4;
693 *(uint32_t *)ptr = tswapl(env->HI);
694 ptr += 4;
696 *(uint32_t *)ptr = tswapl(env->CP0_BadVAddr);
697 ptr += 4;
699 *(uint32_t *)ptr = tswapl(env->CP0_Cause);
700 ptr += 4;
702 *(uint32_t *)ptr = tswapl(env->PC);
703 ptr += 4;
705 #ifdef MIPS_USES_FPU
706 for (i = 0; i < 32; i++)
708 *(uint32_t *)ptr = tswapl(FPR_W (env, i));
709 ptr += 4;
712 *(uint32_t *)ptr = tswapl(env->fcr31);
713 ptr += 4;
715 *(uint32_t *)ptr = tswapl(env->fcr0);
716 ptr += 4;
717 #endif
719 /* 32 FP registers, fsr, fir, fp. Not yet implemented. */
720 /* what's 'fp' mean here? */
722 return ptr - mem_buf;
725 /* convert MIPS rounding mode in FCR31 to IEEE library */
726 static unsigned int ieee_rm[] =
728 float_round_nearest_even,
729 float_round_to_zero,
730 float_round_up,
731 float_round_down
733 #define RESTORE_ROUNDING_MODE \
734 set_float_rounding_mode(ieee_rm[env->fcr31 & 3], &env->fp_status)
736 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
738 int i;
739 uint8_t *ptr;
741 ptr = mem_buf;
742 for (i = 0; i < 32; i++)
744 env->gpr[i] = tswapl(*(uint32_t *)ptr);
745 ptr += 4;
748 env->CP0_Status = tswapl(*(uint32_t *)ptr);
749 ptr += 4;
751 env->LO = tswapl(*(uint32_t *)ptr);
752 ptr += 4;
754 env->HI = tswapl(*(uint32_t *)ptr);
755 ptr += 4;
757 env->CP0_BadVAddr = tswapl(*(uint32_t *)ptr);
758 ptr += 4;
760 env->CP0_Cause = tswapl(*(uint32_t *)ptr);
761 ptr += 4;
763 env->PC = tswapl(*(uint32_t *)ptr);
764 ptr += 4;
766 #ifdef MIPS_USES_FPU
767 for (i = 0; i < 32; i++)
769 FPR_W (env, i) = tswapl(*(uint32_t *)ptr);
770 ptr += 4;
773 env->fcr31 = tswapl(*(uint32_t *)ptr) & 0x0183FFFF;
774 ptr += 4;
776 env->fcr0 = tswapl(*(uint32_t *)ptr);
777 ptr += 4;
779 /* set rounding mode */
780 RESTORE_ROUNDING_MODE;
782 #ifndef CONFIG_SOFTFLOAT
783 /* no floating point exception for native float */
784 SET_FP_ENABLE(env->fcr31, 0);
785 #endif
786 #endif
788 #elif defined (TARGET_SH4)
789 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
791 uint32_t *ptr = (uint32_t *)mem_buf;
792 int i;
794 #define SAVE(x) *ptr++=tswapl(x)
795 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
796 for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
797 } else {
798 for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
800 for (i = 8; i < 16; i++) SAVE(env->gregs[i]);
801 SAVE (env->pc);
802 SAVE (env->pr);
803 SAVE (env->gbr);
804 SAVE (env->vbr);
805 SAVE (env->mach);
806 SAVE (env->macl);
807 SAVE (env->sr);
808 SAVE (0); /* TICKS */
809 SAVE (0); /* STALLS */
810 SAVE (0); /* CYCLES */
811 SAVE (0); /* INSTS */
812 SAVE (0); /* PLR */
814 return ((uint8_t *)ptr - mem_buf);
817 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
819 uint32_t *ptr = (uint32_t *)mem_buf;
820 int i;
822 #define LOAD(x) (x)=*ptr++;
823 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
824 for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
825 } else {
826 for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
828 for (i = 8; i < 16; i++) LOAD(env->gregs[i]);
829 LOAD (env->pc);
830 LOAD (env->pr);
831 LOAD (env->gbr);
832 LOAD (env->vbr);
833 LOAD (env->mach);
834 LOAD (env->macl);
835 LOAD (env->sr);
837 #else
838 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
840 return 0;
843 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
847 #endif
849 static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf)
851 const char *p;
852 int ch, reg_size, type;
853 char buf[4096];
854 uint8_t mem_buf[2000];
855 uint32_t *registers;
856 target_ulong addr, len;
858 #ifdef DEBUG_GDB
859 printf("command='%s'\n", line_buf);
860 #endif
861 p = line_buf;
862 ch = *p++;
863 switch(ch) {
864 case '?':
865 /* TODO: Make this return the correct value for user-mode. */
866 snprintf(buf, sizeof(buf), "S%02x", SIGTRAP);
867 put_packet(s, buf);
868 break;
869 case 'c':
870 if (*p != '\0') {
871 addr = strtoull(p, (char **)&p, 16);
872 #if defined(TARGET_I386)
873 env->eip = addr;
874 #elif defined (TARGET_PPC)
875 env->nip = addr;
876 #elif defined (TARGET_SPARC)
877 env->pc = addr;
878 env->npc = addr + 4;
879 #elif defined (TARGET_ARM)
880 env->regs[15] = addr;
881 #elif defined (TARGET_SH4)
882 env->pc = addr;
883 #endif
885 #ifdef CONFIG_USER_ONLY
886 s->running_state = 1;
887 #else
888 vm_start();
889 #endif
890 return RS_IDLE;
891 case 's':
892 if (*p != '\0') {
893 addr = strtoul(p, (char **)&p, 16);
894 #if defined(TARGET_I386)
895 env->eip = addr;
896 #elif defined (TARGET_PPC)
897 env->nip = addr;
898 #elif defined (TARGET_SPARC)
899 env->pc = addr;
900 env->npc = addr + 4;
901 #elif defined (TARGET_ARM)
902 env->regs[15] = addr;
903 #elif defined (TARGET_SH4)
904 env->pc = addr;
905 #endif
907 cpu_single_step(env, 1);
908 #ifdef CONFIG_USER_ONLY
909 s->running_state = 1;
910 #else
911 vm_start();
912 #endif
913 return RS_IDLE;
914 case 'F':
916 target_ulong ret;
917 target_ulong err;
919 ret = strtoull(p, (char **)&p, 16);
920 if (*p == ',') {
921 p++;
922 err = strtoull(p, (char **)&p, 16);
923 } else {
924 err = 0;
926 if (*p == ',')
927 p++;
928 type = *p;
929 if (gdb_current_syscall_cb)
930 gdb_current_syscall_cb(s->env, ret, err);
931 if (type == 'C') {
932 put_packet(s, "T02");
933 } else {
934 #ifdef CONFIG_USER_ONLY
935 s->running_state = 1;
936 #else
937 vm_start();
938 #endif
941 break;
942 case 'g':
943 reg_size = cpu_gdb_read_registers(env, mem_buf);
944 memtohex(buf, mem_buf, reg_size);
945 put_packet(s, buf);
946 break;
947 case 'G':
948 registers = (void *)mem_buf;
949 len = strlen(p) / 2;
950 hextomem((uint8_t *)registers, p, len);
951 cpu_gdb_write_registers(env, mem_buf, len);
952 put_packet(s, "OK");
953 break;
954 case 'm':
955 addr = strtoull(p, (char **)&p, 16);
956 if (*p == ',')
957 p++;
958 len = strtoull(p, NULL, 16);
959 if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) {
960 put_packet (s, "E14");
961 } else {
962 memtohex(buf, mem_buf, len);
963 put_packet(s, buf);
965 break;
966 case 'M':
967 addr = strtoull(p, (char **)&p, 16);
968 if (*p == ',')
969 p++;
970 len = strtoull(p, (char **)&p, 16);
971 if (*p == ':')
972 p++;
973 hextomem(mem_buf, p, len);
974 if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0)
975 put_packet(s, "E14");
976 else
977 put_packet(s, "OK");
978 break;
979 case 'Z':
980 type = strtoul(p, (char **)&p, 16);
981 if (*p == ',')
982 p++;
983 addr = strtoull(p, (char **)&p, 16);
984 if (*p == ',')
985 p++;
986 len = strtoull(p, (char **)&p, 16);
987 if (type == 0 || type == 1) {
988 if (cpu_breakpoint_insert(env, addr) < 0)
989 goto breakpoint_error;
990 put_packet(s, "OK");
991 } else {
992 breakpoint_error:
993 put_packet(s, "E22");
995 break;
996 case 'z':
997 type = strtoul(p, (char **)&p, 16);
998 if (*p == ',')
999 p++;
1000 addr = strtoull(p, (char **)&p, 16);
1001 if (*p == ',')
1002 p++;
1003 len = strtoull(p, (char **)&p, 16);
1004 if (type == 0 || type == 1) {
1005 cpu_breakpoint_remove(env, addr);
1006 put_packet(s, "OK");
1007 } else {
1008 goto breakpoint_error;
1010 break;
1011 #ifdef CONFIG_LINUX_USER
1012 case 'q':
1013 if (strncmp(p, "Offsets", 7) == 0) {
1014 TaskState *ts = env->opaque;
1016 sprintf(buf, "Text=%x;Data=%x;Bss=%x", ts->info->code_offset,
1017 ts->info->data_offset, ts->info->data_offset);
1018 put_packet(s, buf);
1019 break;
1021 /* Fall through. */
1022 #endif
1023 default:
1024 // unknown_command:
1025 /* put empty packet */
1026 buf[0] = '\0';
1027 put_packet(s, buf);
1028 break;
1030 return RS_IDLE;
1033 extern void tb_flush(CPUState *env);
1035 #ifndef CONFIG_USER_ONLY
1036 static void gdb_vm_stopped(void *opaque, int reason)
1038 GDBState *s = opaque;
1039 char buf[256];
1040 int ret;
1042 if (s->state == RS_SYSCALL)
1043 return;
1045 /* disable single step if it was enable */
1046 cpu_single_step(s->env, 0);
1048 if (reason == EXCP_DEBUG) {
1049 tb_flush(s->env);
1050 ret = SIGTRAP;
1051 } else if (reason == EXCP_INTERRUPT) {
1052 ret = SIGINT;
1053 } else {
1054 ret = 0;
1056 snprintf(buf, sizeof(buf), "S%02x", ret);
1057 put_packet(s, buf);
1059 #endif
1061 /* Send a gdb syscall request.
1062 This accepts limited printf-style format specifiers, specifically:
1063 %x - target_ulong argument printed in hex.
1064 %s - string pointer (target_ulong) and length (int) pair. */
1065 void gdb_do_syscall(gdb_syscall_complete_cb cb, char *fmt, ...)
1067 va_list va;
1068 char buf[256];
1069 char *p;
1070 target_ulong addr;
1071 GDBState *s;
1073 s = gdb_syscall_state;
1074 if (!s)
1075 return;
1076 gdb_current_syscall_cb = cb;
1077 s->state = RS_SYSCALL;
1078 #ifndef CONFIG_USER_ONLY
1079 vm_stop(EXCP_DEBUG);
1080 #endif
1081 s->state = RS_IDLE;
1082 va_start(va, fmt);
1083 p = buf;
1084 *(p++) = 'F';
1085 while (*fmt) {
1086 if (*fmt == '%') {
1087 fmt++;
1088 switch (*fmt++) {
1089 case 'x':
1090 addr = va_arg(va, target_ulong);
1091 p += sprintf(p, TARGET_FMT_lx, addr);
1092 break;
1093 case 's':
1094 addr = va_arg(va, target_ulong);
1095 p += sprintf(p, TARGET_FMT_lx "/%x", addr, va_arg(va, int));
1096 break;
1097 default:
1098 fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
1099 fmt - 1);
1100 break;
1102 } else {
1103 *(p++) = *(fmt++);
1106 va_end(va);
1107 put_packet(s, buf);
1108 #ifdef CONFIG_USER_ONLY
1109 gdb_handlesig(s->env, 0);
1110 #else
1111 cpu_interrupt(s->env, CPU_INTERRUPT_EXIT);
1112 #endif
1115 static void gdb_read_byte(GDBState *s, int ch)
1117 CPUState *env = s->env;
1118 int i, csum;
1119 char reply[1];
1121 #ifndef CONFIG_USER_ONLY
1122 if (s->last_packet_len) {
1123 /* Waiting for a response to the last packet. If we see the start
1124 of a new command then abandon the previous response. */
1125 if (ch == '-') {
1126 #ifdef DEBUG_GDB
1127 printf("Got NACK, retransmitting\n");
1128 #endif
1129 put_buffer(s, s->last_packet, s->last_packet_len);
1131 #ifdef DEBUG_GDB
1132 else if (ch == '+')
1133 printf("Got ACK\n");
1134 else
1135 printf("Got '%c' when expecting ACK/NACK\n", ch);
1136 #endif
1137 if (ch == '+' || ch == '$')
1138 s->last_packet_len = 0;
1139 if (ch != '$')
1140 return;
1142 if (vm_running) {
1143 /* when the CPU is running, we cannot do anything except stop
1144 it when receiving a char */
1145 vm_stop(EXCP_INTERRUPT);
1146 } else
1147 #endif
1149 switch(s->state) {
1150 case RS_IDLE:
1151 if (ch == '$') {
1152 s->line_buf_index = 0;
1153 s->state = RS_GETLINE;
1155 break;
1156 case RS_GETLINE:
1157 if (ch == '#') {
1158 s->state = RS_CHKSUM1;
1159 } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
1160 s->state = RS_IDLE;
1161 } else {
1162 s->line_buf[s->line_buf_index++] = ch;
1164 break;
1165 case RS_CHKSUM1:
1166 s->line_buf[s->line_buf_index] = '\0';
1167 s->line_csum = fromhex(ch) << 4;
1168 s->state = RS_CHKSUM2;
1169 break;
1170 case RS_CHKSUM2:
1171 s->line_csum |= fromhex(ch);
1172 csum = 0;
1173 for(i = 0; i < s->line_buf_index; i++) {
1174 csum += s->line_buf[i];
1176 if (s->line_csum != (csum & 0xff)) {
1177 reply[0] = '-';
1178 put_buffer(s, reply, 1);
1179 s->state = RS_IDLE;
1180 } else {
1181 reply[0] = '+';
1182 put_buffer(s, reply, 1);
1183 s->state = gdb_handle_packet(s, env, s->line_buf);
1185 break;
1186 default:
1187 abort();
1192 #ifdef CONFIG_USER_ONLY
1194 gdb_handlesig (CPUState *env, int sig)
1196 GDBState *s;
1197 char buf[256];
1198 int n;
1200 if (gdbserver_fd < 0)
1201 return sig;
1203 s = &gdbserver_state;
1205 /* disable single step if it was enabled */
1206 cpu_single_step(env, 0);
1207 tb_flush(env);
1209 if (sig != 0)
1211 snprintf(buf, sizeof(buf), "S%02x", sig);
1212 put_packet(s, buf);
1215 sig = 0;
1216 s->state = RS_IDLE;
1217 s->running_state = 0;
1218 while (s->running_state == 0) {
1219 n = read (s->fd, buf, 256);
1220 if (n > 0)
1222 int i;
1224 for (i = 0; i < n; i++)
1225 gdb_read_byte (s, buf[i]);
1227 else if (n == 0 || errno != EAGAIN)
1229 /* XXX: Connection closed. Should probably wait for annother
1230 connection before continuing. */
1231 return sig;
1234 return sig;
1237 /* Tell the remote gdb that the process has exited. */
1238 void gdb_exit(CPUState *env, int code)
1240 GDBState *s;
1241 char buf[4];
1243 if (gdbserver_fd < 0)
1244 return;
1246 s = &gdbserver_state;
1248 snprintf(buf, sizeof(buf), "W%02x", code);
1249 put_packet(s, buf);
1253 static void gdb_accept(void *opaque)
1255 GDBState *s;
1256 struct sockaddr_in sockaddr;
1257 socklen_t len;
1258 int val, fd;
1260 for(;;) {
1261 len = sizeof(sockaddr);
1262 fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
1263 if (fd < 0 && errno != EINTR) {
1264 perror("accept");
1265 return;
1266 } else if (fd >= 0) {
1267 break;
1271 /* set short latency */
1272 val = 1;
1273 setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val));
1275 s = &gdbserver_state;
1276 memset (s, 0, sizeof (GDBState));
1277 s->env = first_cpu; /* XXX: allow to change CPU */
1278 s->fd = fd;
1280 gdb_syscall_state = s;
1282 fcntl(fd, F_SETFL, O_NONBLOCK);
1285 static int gdbserver_open(int port)
1287 struct sockaddr_in sockaddr;
1288 int fd, val, ret;
1290 fd = socket(PF_INET, SOCK_STREAM, 0);
1291 if (fd < 0) {
1292 perror("socket");
1293 return -1;
1296 /* allow fast reuse */
1297 val = 1;
1298 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val));
1300 sockaddr.sin_family = AF_INET;
1301 sockaddr.sin_port = htons(port);
1302 sockaddr.sin_addr.s_addr = 0;
1303 ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
1304 if (ret < 0) {
1305 perror("bind");
1306 return -1;
1308 ret = listen(fd, 0);
1309 if (ret < 0) {
1310 perror("listen");
1311 return -1;
1313 return fd;
1316 int gdbserver_start(int port)
1318 gdbserver_fd = gdbserver_open(port);
1319 if (gdbserver_fd < 0)
1320 return -1;
1321 /* accept connections */
1322 gdb_accept (NULL);
1323 return 0;
1325 #else
1326 static int gdb_chr_can_recieve(void *opaque)
1328 return 1;
1331 static void gdb_chr_recieve(void *opaque, const uint8_t *buf, int size)
1333 GDBState *s = opaque;
1334 int i;
1336 for (i = 0; i < size; i++) {
1337 gdb_read_byte(s, buf[i]);
1341 static void gdb_chr_event(void *opaque, int event)
1343 switch (event) {
1344 case CHR_EVENT_RESET:
1345 vm_stop(EXCP_INTERRUPT);
1346 gdb_syscall_state = opaque;
1347 break;
1348 default:
1349 break;
1353 int gdbserver_start(CharDriverState *chr)
1355 GDBState *s;
1357 if (!chr)
1358 return -1;
1360 s = qemu_mallocz(sizeof(GDBState));
1361 if (!s) {
1362 return -1;
1364 s->env = first_cpu; /* XXX: allow to change CPU */
1365 s->chr = chr;
1366 qemu_chr_add_handlers(chr, gdb_chr_can_recieve, gdb_chr_recieve,
1367 gdb_chr_event, s);
1368 qemu_add_vm_stop_handler(gdb_vm_stopped, s);
1369 return 0;
1372 int gdbserver_start_port(int port)
1374 CharDriverState *chr;
1375 char gdbstub_port_name[128];
1377 snprintf(gdbstub_port_name, sizeof(gdbstub_port_name),
1378 "tcp::%d,nowait,nodelay,server", port);
1379 chr = qemu_chr_open(gdbstub_port_name);
1380 if (!chr)
1381 return -EIO;
1382 return gdbserver_start(chr);
1385 #endif