2 * SSD0323 OLED controller with OSRAM Pictiva 128x64 display.
4 * Copyright (c) 2006-2007 CodeSourcery.
5 * Written by Paul Brook
7 * This code is licenced under the GPL.
10 /* The controller can support a variety of different displays, but we only
11 implement one. Most of the commends relating to brightness and geometry
17 //#define DEBUG_SSD0323 1
20 #define DPRINTF(fmt, args...) \
21 do { printf("ssd0323: " fmt , ##args); } while (0)
22 #define BADF(fmt, args...) \
23 do { fprintf(stderr, "ssd0323: error: " fmt , ##args); exit(1);} while (0)
25 #define DPRINTF(fmt, args...) do {} while(0)
26 #define BADF(fmt, args...) \
27 do { fprintf(stderr, "ssd0323: error: " fmt , ##args);} while (0)
30 /* Scaling factor for pixels. */
33 #define REMAP_SWAP_COLUMN 0x01
34 #define REMAP_SWAP_NYBBLE 0x02
35 #define REMAP_VERTICAL 0x04
36 #define REMAP_SWAP_COM 0x10
37 #define REMAP_SPLIT_COM 0x40
59 enum ssd0323_mode mode
;
60 uint8_t framebuffer
[128 * 80 / 2];
63 int ssd0323_xfer_ssi(void *opaque
, int data
)
65 ssd0323_state
*s
= (ssd0323_state
*)opaque
;
68 DPRINTF("data 0x%02x\n", data
);
69 s
->framebuffer
[s
->col
+ s
->row
* 64] = data
;
70 if (s
->remap
& REMAP_VERTICAL
) {
72 if (s
->row
> s
->row_end
) {
73 s
->row
= s
->row_start
;
76 if (s
->col
> s
->col_end
) {
77 s
->col
= s
->col_start
;
81 if (s
->col
> s
->col_end
) {
83 s
->col
= s
->col_start
;
85 if (s
->row
> s
->row_end
) {
86 s
->row
= s
->row_start
;
92 DPRINTF("cmd 0x%02x\n", data
);
93 if (s
->cmd_len
== 0) {
96 s
->cmd_data
[s
->cmd_len
- 1] = data
;
100 #define DATA(x) if (s->cmd_len <= (x)) return 0
101 case 0x15: /* Set column. */
103 s
->col
= s
->col_start
= s
->cmd_data
[0] % 64;
104 s
->col_end
= s
->cmd_data
[1] % 64;
106 case 0x75: /* Set row. */
108 s
->row
= s
->row_start
= s
->cmd_data
[0] % 80;
109 s
->row_end
= s
->cmd_data
[1] % 80;
111 case 0x81: /* Set contrast */
114 case 0x84: case 0x85: case 0x86: /* Max current. */
117 case 0xa0: /* Set remapping. */
118 /* FIXME: Implement this. */
120 s
->remap
= s
->cmd_data
[0];
122 case 0xa1: /* Set display start line. */
123 case 0xa2: /* Set display offset. */
124 /* FIXME: Implement these. */
127 case 0xa4: /* Normal mode. */
128 case 0xa5: /* All on. */
129 case 0xa6: /* All off. */
130 case 0xa7: /* Inverse. */
131 /* FIXME: Implement these. */
134 case 0xa8: /* Set multiplex ratio. */
135 case 0xad: /* Set DC-DC converter. */
137 /* Ignored. Don't care. */
139 case 0xae: /* Display off. */
140 case 0xaf: /* Display on. */
142 /* TODO: Implement power control. */
144 case 0xb1: /* Set phase length. */
145 case 0xb2: /* Set row period. */
146 case 0xb3: /* Set clock rate. */
147 case 0xbc: /* Set precharge. */
148 case 0xbe: /* Set VCOMH. */
149 case 0xbf: /* Set segment low. */
151 /* Ignored. Don't care. */
153 case 0xb8: /* Set grey scale table. */
154 /* FIXME: Implement this. */
157 case 0xe3: /* NOP. */
160 case 0xff: /* Nasty hack because we don't handle chip selects
164 BADF("Unknown command: 0x%x\n", data
);
172 static void ssd0323_update_display(void *opaque
)
174 ssd0323_state
*s
= (ssd0323_state
*)opaque
;
182 char colortab
[MAGNIFY
* 64];
187 switch (s
->ds
->depth
) {
203 BADF("Bad color depth\n");
207 for (i
= 0; i
< 16; i
++) {
210 switch (s
->ds
->depth
) {
212 n
= i
* 2 + (i
>> 3);
214 p
[1] = (n
<< 2) | (n
>> 3);
217 n
= i
* 2 + (i
>> 3);
218 p
[0] = n
| (n
<< 6) | ((n
<< 1) & 0x20);
219 p
[1] = (n
<< 3) | (n
>> 2);
224 p
[0] = p
[1] = p
[2] = n
;
227 BADF("Bad color depth\n");
232 /* TODO: Implement row/column remapping. */
234 for (y
= 0; y
< 64; y
++) {
236 src
= s
->framebuffer
+ 64 * line
;
237 for (x
= 0; x
< 64; x
++) {
240 for (i
= 0; i
< MAGNIFY
; i
++) {
241 memcpy(dest
, colors
[val
], dest_width
);
245 for (i
= 0; i
< MAGNIFY
; i
++) {
246 memcpy(dest
, colors
[val
], dest_width
);
251 for (i
= 1; i
< MAGNIFY
; i
++) {
252 memcpy(dest
, dest
- dest_width
* MAGNIFY
* 128,
253 dest_width
* 128 * MAGNIFY
);
254 dest
+= dest_width
* 128 * MAGNIFY
;
258 dpy_update(s
->ds
, 0, 0, 128 * MAGNIFY
, 64 * MAGNIFY
);
261 static void ssd0323_invalidate_display(void * opaque
)
263 ssd0323_state
*s
= (ssd0323_state
*)opaque
;
267 /* Command/data input. */
268 static void ssd0323_cd(void *opaque
, int n
, int level
)
270 ssd0323_state
*s
= (ssd0323_state
*)opaque
;
271 DPRINTF("%s mode\n", level
? "Data" : "Command");
272 s
->mode
= level
? SSD0323_DATA
: SSD0323_CMD
;
275 void *ssd0323_init(DisplayState
*ds
, qemu_irq
*cmd_p
)
280 s
= (ssd0323_state
*)qemu_mallocz(sizeof(ssd0323_state
));
282 graphic_console_init(ds
, ssd0323_update_display
, ssd0323_invalidate_display
,
284 dpy_resize(s
->ds
, 128 * MAGNIFY
, 64 * MAGNIFY
);
288 cmd
= qemu_allocate_irqs(ssd0323_cd
, s
, 1);