kvm: optimize inline assembly
[qemu-kvm/fedora.git] / gdbstub.c
blob8199d72f0fa9b6c481276b0387a45c6479eef3d3
1 /*
2 * gdb server stub
3 *
4 * Copyright (c) 2003-2005 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include "config.h"
21 #ifdef CONFIG_USER_ONLY
22 #include <stdlib.h>
23 #include <stdio.h>
24 #include <stdarg.h>
25 #include <string.h>
26 #include <errno.h>
27 #include <unistd.h>
28 #include <fcntl.h>
30 #include "qemu.h"
31 #else
32 #include "vl.h"
33 #endif
35 #include "qemu_socket.h"
36 #ifdef _WIN32
37 /* XXX: these constants may be independent of the host ones even for Unix */
38 #ifndef SIGTRAP
39 #define SIGTRAP 5
40 #endif
41 #ifndef SIGINT
42 #define SIGINT 2
43 #endif
44 #else
45 #include <signal.h>
46 #endif
48 //#define DEBUG_GDB
50 enum RSState {
51 RS_IDLE,
52 RS_GETLINE,
53 RS_CHKSUM1,
54 RS_CHKSUM2,
56 /* XXX: This is not thread safe. Do we care? */
57 static int gdbserver_fd = -1;
59 typedef struct GDBState {
60 CPUState *env; /* current CPU */
61 enum RSState state; /* parsing state */
62 int fd;
63 char line_buf[4096];
64 int line_buf_index;
65 int line_csum;
66 #ifdef CONFIG_USER_ONLY
67 int running_state;
68 #endif
69 } GDBState;
71 #ifdef CONFIG_USER_ONLY
72 /* XXX: remove this hack. */
73 static GDBState gdbserver_state;
74 #endif
76 static int get_char(GDBState *s)
78 uint8_t ch;
79 int ret;
81 for(;;) {
82 ret = recv(s->fd, &ch, 1, 0);
83 if (ret < 0) {
84 if (errno != EINTR && errno != EAGAIN)
85 return -1;
86 } else if (ret == 0) {
87 return -1;
88 } else {
89 break;
92 return ch;
95 static void put_buffer(GDBState *s, const uint8_t *buf, int len)
97 int ret;
99 while (len > 0) {
100 ret = send(s->fd, buf, len, 0);
101 if (ret < 0) {
102 if (errno != EINTR && errno != EAGAIN)
103 return;
104 } else {
105 buf += ret;
106 len -= ret;
111 static inline int fromhex(int v)
113 if (v >= '0' && v <= '9')
114 return v - '0';
115 else if (v >= 'A' && v <= 'F')
116 return v - 'A' + 10;
117 else if (v >= 'a' && v <= 'f')
118 return v - 'a' + 10;
119 else
120 return 0;
123 static inline int tohex(int v)
125 if (v < 10)
126 return v + '0';
127 else
128 return v - 10 + 'a';
131 static void memtohex(char *buf, const uint8_t *mem, int len)
133 int i, c;
134 char *q;
135 q = buf;
136 for(i = 0; i < len; i++) {
137 c = mem[i];
138 *q++ = tohex(c >> 4);
139 *q++ = tohex(c & 0xf);
141 *q = '\0';
144 static void hextomem(uint8_t *mem, const char *buf, int len)
146 int i;
148 for(i = 0; i < len; i++) {
149 mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
150 buf += 2;
154 /* return -1 if error, 0 if OK */
155 static int put_packet(GDBState *s, char *buf)
157 char buf1[3];
158 int len, csum, ch, i;
160 #ifdef DEBUG_GDB
161 printf("reply='%s'\n", buf);
162 #endif
164 for(;;) {
165 buf1[0] = '$';
166 put_buffer(s, buf1, 1);
167 len = strlen(buf);
168 put_buffer(s, buf, len);
169 csum = 0;
170 for(i = 0; i < len; i++) {
171 csum += buf[i];
173 buf1[0] = '#';
174 buf1[1] = tohex((csum >> 4) & 0xf);
175 buf1[2] = tohex((csum) & 0xf);
177 put_buffer(s, buf1, 3);
179 ch = get_char(s);
180 if (ch < 0)
181 return -1;
182 if (ch == '+')
183 break;
185 return 0;
188 #if defined(TARGET_X86_64)
190 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
192 uint8_t *p = mem_buf;
193 int i, fpus;
195 #define PUTREG(x) do { \
196 target_ulong reg = tswapl(x); \
197 memcpy(p, &reg, sizeof reg); \
198 p += sizeof reg; \
199 } while (0)
200 #define PUTREG32(x) do { \
201 uint32_t reg = tswap32(x); \
202 memcpy(p, &reg, sizeof reg); \
203 p += sizeof reg; \
204 } while (0)
205 #define PUTREGF(x) do { \
206 memcpy(p, &(x), 10); \
207 p += sizeof (x); \
208 } while (0)
210 PUTREG(env->regs[R_EAX]);
211 PUTREG(env->regs[R_EBX]);
212 PUTREG(env->regs[R_ECX]);
213 PUTREG(env->regs[R_EDX]);
214 PUTREG(env->regs[R_ESI]);
215 PUTREG(env->regs[R_EDI]);
216 PUTREG(env->regs[R_EBP]);
217 PUTREG(env->regs[R_ESP]);
218 PUTREG(env->regs[8]);
219 PUTREG(env->regs[9]);
220 PUTREG(env->regs[10]);
221 PUTREG(env->regs[11]);
222 PUTREG(env->regs[12]);
223 PUTREG(env->regs[13]);
224 PUTREG(env->regs[14]);
225 PUTREG(env->regs[15]);
227 PUTREG(env->eip);
228 PUTREG32(env->eflags);
229 PUTREG32(env->segs[R_CS].selector);
230 PUTREG32(env->segs[R_SS].selector);
231 PUTREG32(env->segs[R_DS].selector);
232 PUTREG32(env->segs[R_ES].selector);
233 PUTREG32(env->segs[R_FS].selector);
234 PUTREG32(env->segs[R_GS].selector);
235 /* XXX: convert floats */
236 for(i = 0; i < 8; i++) {
237 PUTREGF(env->fpregs[i]);
239 PUTREG32(env->fpuc);
240 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
241 PUTREG32(fpus);
242 PUTREG32(0); /* XXX: convert tags */
243 PUTREG32(0); /* fiseg */
244 PUTREG32(0); /* fioff */
245 PUTREG32(0); /* foseg */
246 PUTREG32(0); /* fooff */
247 PUTREG32(0); /* fop */
249 #undef PUTREG
250 #undef PUTREG32
251 #undef PUTREGF
253 return p - mem_buf;
256 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
258 uint8_t *p = mem_buf;
259 uint32_t junk;
260 int i, fpus;
262 #define GETREG(x) do { \
263 target_ulong reg; \
264 memcpy(&reg, p, sizeof reg); \
265 x = tswapl(reg); \
266 p += sizeof reg; \
267 } while (0)
268 #define GETREG32(x) do { \
269 uint32_t reg; \
270 memcpy(&reg, p, sizeof reg); \
271 x = tswap32(reg); \
272 p += sizeof reg; \
273 } while (0)
274 #define GETREGF(x) do { \
275 memcpy(&(x), p, 10); \
276 p += 10; \
277 } while (0)
279 GETREG(env->regs[R_EAX]);
280 GETREG(env->regs[R_EBX]);
281 GETREG(env->regs[R_ECX]);
282 GETREG(env->regs[R_EDX]);
283 GETREG(env->regs[R_ESI]);
284 GETREG(env->regs[R_EDI]);
285 GETREG(env->regs[R_EBP]);
286 GETREG(env->regs[R_ESP]);
287 GETREG(env->regs[8]);
288 GETREG(env->regs[9]);
289 GETREG(env->regs[10]);
290 GETREG(env->regs[11]);
291 GETREG(env->regs[12]);
292 GETREG(env->regs[13]);
293 GETREG(env->regs[14]);
294 GETREG(env->regs[15]);
296 GETREG(env->eip);
297 GETREG32(env->eflags);
298 GETREG32(env->segs[R_CS].selector);
299 GETREG32(env->segs[R_SS].selector);
300 GETREG32(env->segs[R_DS].selector);
301 GETREG32(env->segs[R_ES].selector);
302 GETREG32(env->segs[R_FS].selector);
303 GETREG32(env->segs[R_GS].selector);
304 /* XXX: convert floats */
305 for(i = 0; i < 8; i++) {
306 GETREGF(env->fpregs[i]);
308 GETREG32(env->fpuc);
309 GETREG32(fpus); /* XXX: convert fpus */
310 GETREG32(junk); /* XXX: convert tags */
311 GETREG32(junk); /* fiseg */
312 GETREG32(junk); /* fioff */
313 GETREG32(junk); /* foseg */
314 GETREG32(junk); /* fooff */
315 GETREG32(junk); /* fop */
317 #undef GETREG
318 #undef GETREG32
319 #undef GETREGF
322 #elif defined(TARGET_I386)
324 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
326 uint32_t *registers = (uint32_t *)mem_buf;
327 int i, fpus;
329 for(i = 0; i < 8; i++) {
330 registers[i] = env->regs[i];
332 registers[8] = env->eip;
333 registers[9] = env->eflags;
334 registers[10] = env->segs[R_CS].selector;
335 registers[11] = env->segs[R_SS].selector;
336 registers[12] = env->segs[R_DS].selector;
337 registers[13] = env->segs[R_ES].selector;
338 registers[14] = env->segs[R_FS].selector;
339 registers[15] = env->segs[R_GS].selector;
340 /* XXX: convert floats */
341 for(i = 0; i < 8; i++) {
342 memcpy(mem_buf + 16 * 4 + i * 10, &env->fpregs[i], 10);
344 registers[36] = env->fpuc;
345 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
346 registers[37] = fpus;
347 registers[38] = 0; /* XXX: convert tags */
348 registers[39] = 0; /* fiseg */
349 registers[40] = 0; /* fioff */
350 registers[41] = 0; /* foseg */
351 registers[42] = 0; /* fooff */
352 registers[43] = 0; /* fop */
354 for(i = 0; i < 16; i++)
355 tswapls(&registers[i]);
356 for(i = 36; i < 44; i++)
357 tswapls(&registers[i]);
358 return 44 * 4;
361 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
363 uint32_t *registers = (uint32_t *)mem_buf;
364 int i;
366 for(i = 0; i < 8; i++) {
367 env->regs[i] = tswapl(registers[i]);
369 env->eip = tswapl(registers[8]);
370 env->eflags = tswapl(registers[9]);
371 #if defined(CONFIG_USER_ONLY)
372 #define LOAD_SEG(index, sreg)\
373 if (tswapl(registers[index]) != env->segs[sreg].selector)\
374 cpu_x86_load_seg(env, sreg, tswapl(registers[index]));
375 LOAD_SEG(10, R_CS);
376 LOAD_SEG(11, R_SS);
377 LOAD_SEG(12, R_DS);
378 LOAD_SEG(13, R_ES);
379 LOAD_SEG(14, R_FS);
380 LOAD_SEG(15, R_GS);
381 #endif
384 #elif defined (TARGET_PPC)
385 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
387 uint32_t *registers = (uint32_t *)mem_buf, tmp;
388 int i;
390 /* fill in gprs */
391 for(i = 0; i < 32; i++) {
392 registers[i] = tswapl(env->gpr[i]);
394 /* fill in fprs */
395 for (i = 0; i < 32; i++) {
396 registers[(i * 2) + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
397 registers[(i * 2) + 33] = tswapl(*((uint32_t *)&env->fpr[i] + 1));
399 /* nip, msr, ccr, lnk, ctr, xer, mq */
400 registers[96] = tswapl(env->nip);
401 registers[97] = tswapl(do_load_msr(env));
402 tmp = 0;
403 for (i = 0; i < 8; i++)
404 tmp |= env->crf[i] << (32 - ((i + 1) * 4));
405 registers[98] = tswapl(tmp);
406 registers[99] = tswapl(env->lr);
407 registers[100] = tswapl(env->ctr);
408 registers[101] = tswapl(do_load_xer(env));
409 registers[102] = 0;
411 return 103 * 4;
414 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
416 uint32_t *registers = (uint32_t *)mem_buf;
417 int i;
419 /* fill in gprs */
420 for (i = 0; i < 32; i++) {
421 env->gpr[i] = tswapl(registers[i]);
423 /* fill in fprs */
424 for (i = 0; i < 32; i++) {
425 *((uint32_t *)&env->fpr[i]) = tswapl(registers[(i * 2) + 32]);
426 *((uint32_t *)&env->fpr[i] + 1) = tswapl(registers[(i * 2) + 33]);
428 /* nip, msr, ccr, lnk, ctr, xer, mq */
429 env->nip = tswapl(registers[96]);
430 do_store_msr(env, tswapl(registers[97]));
431 registers[98] = tswapl(registers[98]);
432 for (i = 0; i < 8; i++)
433 env->crf[i] = (registers[98] >> (32 - ((i + 1) * 4))) & 0xF;
434 env->lr = tswapl(registers[99]);
435 env->ctr = tswapl(registers[100]);
436 do_store_xer(env, tswapl(registers[101]));
438 #elif defined (TARGET_SPARC)
439 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
441 target_ulong *registers = (target_ulong *)mem_buf;
442 int i;
444 /* fill in g0..g7 */
445 for(i = 0; i < 8; i++) {
446 registers[i] = tswapl(env->gregs[i]);
448 /* fill in register window */
449 for(i = 0; i < 24; i++) {
450 registers[i + 8] = tswapl(env->regwptr[i]);
452 #ifndef TARGET_SPARC64
453 /* fill in fprs */
454 for (i = 0; i < 32; i++) {
455 registers[i + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
457 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
458 registers[64] = tswapl(env->y);
460 target_ulong tmp;
462 tmp = GET_PSR(env);
463 registers[65] = tswapl(tmp);
465 registers[66] = tswapl(env->wim);
466 registers[67] = tswapl(env->tbr);
467 registers[68] = tswapl(env->pc);
468 registers[69] = tswapl(env->npc);
469 registers[70] = tswapl(env->fsr);
470 registers[71] = 0; /* csr */
471 registers[72] = 0;
472 return 73 * sizeof(target_ulong);
473 #else
474 /* fill in fprs */
475 for (i = 0; i < 64; i += 2) {
476 uint64_t tmp;
478 tmp = (uint64_t)tswap32(*((uint32_t *)&env->fpr[i])) << 32;
479 tmp |= tswap32(*((uint32_t *)&env->fpr[i + 1]));
480 registers[i/2 + 32] = tmp;
482 registers[64] = tswapl(env->pc);
483 registers[65] = tswapl(env->npc);
484 registers[66] = tswapl(env->tstate[env->tl]);
485 registers[67] = tswapl(env->fsr);
486 registers[68] = tswapl(env->fprs);
487 registers[69] = tswapl(env->y);
488 return 70 * sizeof(target_ulong);
489 #endif
492 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
494 target_ulong *registers = (target_ulong *)mem_buf;
495 int i;
497 /* fill in g0..g7 */
498 for(i = 0; i < 7; i++) {
499 env->gregs[i] = tswapl(registers[i]);
501 /* fill in register window */
502 for(i = 0; i < 24; i++) {
503 env->regwptr[i] = tswapl(registers[i + 8]);
505 #ifndef TARGET_SPARC64
506 /* fill in fprs */
507 for (i = 0; i < 32; i++) {
508 *((uint32_t *)&env->fpr[i]) = tswapl(registers[i + 32]);
510 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
511 env->y = tswapl(registers[64]);
512 PUT_PSR(env, tswapl(registers[65]));
513 env->wim = tswapl(registers[66]);
514 env->tbr = tswapl(registers[67]);
515 env->pc = tswapl(registers[68]);
516 env->npc = tswapl(registers[69]);
517 env->fsr = tswapl(registers[70]);
518 #else
519 for (i = 0; i < 64; i += 2) {
520 *((uint32_t *)&env->fpr[i]) = tswap32(registers[i/2 + 32] >> 32);
521 *((uint32_t *)&env->fpr[i + 1]) = tswap32(registers[i/2 + 32] & 0xffffffff);
523 env->pc = tswapl(registers[64]);
524 env->npc = tswapl(registers[65]);
525 env->tstate[env->tl] = tswapl(registers[66]);
526 env->fsr = tswapl(registers[67]);
527 env->fprs = tswapl(registers[68]);
528 env->y = tswapl(registers[69]);
529 #endif
531 #elif defined (TARGET_ARM)
532 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
534 int i;
535 uint8_t *ptr;
537 ptr = mem_buf;
538 /* 16 core integer registers (4 bytes each). */
539 for (i = 0; i < 16; i++)
541 *(uint32_t *)ptr = tswapl(env->regs[i]);
542 ptr += 4;
544 /* 8 FPA registers (12 bytes each), FPS (4 bytes).
545 Not yet implemented. */
546 memset (ptr, 0, 8 * 12 + 4);
547 ptr += 8 * 12 + 4;
548 /* CPSR (4 bytes). */
549 *(uint32_t *)ptr = tswapl (cpsr_read(env));
550 ptr += 4;
552 return ptr - mem_buf;
555 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
557 int i;
558 uint8_t *ptr;
560 ptr = mem_buf;
561 /* Core integer registers. */
562 for (i = 0; i < 16; i++)
564 env->regs[i] = tswapl(*(uint32_t *)ptr);
565 ptr += 4;
567 /* Ignore FPA regs and scr. */
568 ptr += 8 * 12 + 4;
569 cpsr_write (env, tswapl(*(uint32_t *)ptr), 0xffffffff);
571 #elif defined (TARGET_MIPS)
572 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
574 int i;
575 uint8_t *ptr;
577 ptr = mem_buf;
578 for (i = 0; i < 32; i++)
580 *(uint32_t *)ptr = tswapl(env->gpr[i]);
581 ptr += 4;
584 *(uint32_t *)ptr = tswapl(env->CP0_Status);
585 ptr += 4;
587 *(uint32_t *)ptr = tswapl(env->LO);
588 ptr += 4;
590 *(uint32_t *)ptr = tswapl(env->HI);
591 ptr += 4;
593 *(uint32_t *)ptr = tswapl(env->CP0_BadVAddr);
594 ptr += 4;
596 *(uint32_t *)ptr = tswapl(env->CP0_Cause);
597 ptr += 4;
599 *(uint32_t *)ptr = tswapl(env->PC);
600 ptr += 4;
602 /* 32 FP registers, fsr, fir, fp. Not yet implemented. */
604 return ptr - mem_buf;
607 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
609 int i;
610 uint8_t *ptr;
612 ptr = mem_buf;
613 for (i = 0; i < 32; i++)
615 env->gpr[i] = tswapl(*(uint32_t *)ptr);
616 ptr += 4;
619 env->CP0_Status = tswapl(*(uint32_t *)ptr);
620 ptr += 4;
622 env->LO = tswapl(*(uint32_t *)ptr);
623 ptr += 4;
625 env->HI = tswapl(*(uint32_t *)ptr);
626 ptr += 4;
628 env->CP0_BadVAddr = tswapl(*(uint32_t *)ptr);
629 ptr += 4;
631 env->CP0_Cause = tswapl(*(uint32_t *)ptr);
632 ptr += 4;
634 env->PC = tswapl(*(uint32_t *)ptr);
635 ptr += 4;
637 #elif defined (TARGET_SH4)
638 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
640 uint32_t *ptr = (uint32_t *)mem_buf;
641 int i;
643 #define SAVE(x) *ptr++=tswapl(x)
644 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
645 for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
646 } else {
647 for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
649 for (i = 8; i < 16; i++) SAVE(env->gregs[i]);
650 SAVE (env->pc);
651 SAVE (env->pr);
652 SAVE (env->gbr);
653 SAVE (env->vbr);
654 SAVE (env->mach);
655 SAVE (env->macl);
656 SAVE (env->sr);
657 SAVE (0); /* TICKS */
658 SAVE (0); /* STALLS */
659 SAVE (0); /* CYCLES */
660 SAVE (0); /* INSTS */
661 SAVE (0); /* PLR */
663 return ((uint8_t *)ptr - mem_buf);
666 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
668 uint32_t *ptr = (uint32_t *)mem_buf;
669 int i;
671 #define LOAD(x) (x)=*ptr++;
672 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
673 for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
674 } else {
675 for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
677 for (i = 8; i < 16; i++) LOAD(env->gregs[i]);
678 LOAD (env->pc);
679 LOAD (env->pr);
680 LOAD (env->gbr);
681 LOAD (env->vbr);
682 LOAD (env->mach);
683 LOAD (env->macl);
684 LOAD (env->sr);
686 #else
687 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
689 return 0;
692 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
696 #endif
698 static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf)
700 const char *p;
701 int ch, reg_size, type;
702 char buf[4096];
703 uint8_t mem_buf[2000];
704 uint32_t *registers;
705 target_ulong addr, len;
707 #ifdef DEBUG_GDB
708 printf("command='%s'\n", line_buf);
709 #endif
710 p = line_buf;
711 ch = *p++;
712 switch(ch) {
713 case '?':
714 /* TODO: Make this return the correct value for user-mode. */
715 snprintf(buf, sizeof(buf), "S%02x", SIGTRAP);
716 put_packet(s, buf);
717 break;
718 case 'c':
719 if (*p != '\0') {
720 addr = strtoull(p, (char **)&p, 16);
721 #if defined(TARGET_I386)
722 env->eip = addr;
723 #elif defined (TARGET_PPC)
724 env->nip = addr;
725 #elif defined (TARGET_SPARC)
726 env->pc = addr;
727 env->npc = addr + 4;
728 #elif defined (TARGET_ARM)
729 env->regs[15] = addr;
730 #elif defined (TARGET_SH4)
731 env->pc = addr;
732 #endif
734 #ifdef CONFIG_USER_ONLY
735 s->running_state = 1;
736 #else
737 vm_start();
738 #endif
739 return RS_IDLE;
740 case 's':
741 if (*p != '\0') {
742 addr = strtoul(p, (char **)&p, 16);
743 #if defined(TARGET_I386)
744 env->eip = addr;
745 #elif defined (TARGET_PPC)
746 env->nip = addr;
747 #elif defined (TARGET_SPARC)
748 env->pc = addr;
749 env->npc = addr + 4;
750 #elif defined (TARGET_ARM)
751 env->regs[15] = addr;
752 #elif defined (TARGET_SH4)
753 env->pc = addr;
754 #endif
756 cpu_single_step(env, 1);
757 #ifdef CONFIG_USER_ONLY
758 s->running_state = 1;
759 #else
760 vm_start();
761 #endif
762 return RS_IDLE;
763 case 'g':
764 reg_size = cpu_gdb_read_registers(env, mem_buf);
765 memtohex(buf, mem_buf, reg_size);
766 put_packet(s, buf);
767 break;
768 case 'G':
769 registers = (void *)mem_buf;
770 len = strlen(p) / 2;
771 hextomem((uint8_t *)registers, p, len);
772 cpu_gdb_write_registers(env, mem_buf, len);
773 put_packet(s, "OK");
774 break;
775 case 'm':
776 addr = strtoull(p, (char **)&p, 16);
777 if (*p == ',')
778 p++;
779 len = strtoull(p, NULL, 16);
780 if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) {
781 put_packet (s, "E14");
782 } else {
783 memtohex(buf, mem_buf, len);
784 put_packet(s, buf);
786 break;
787 case 'M':
788 addr = strtoull(p, (char **)&p, 16);
789 if (*p == ',')
790 p++;
791 len = strtoull(p, (char **)&p, 16);
792 if (*p == ':')
793 p++;
794 hextomem(mem_buf, p, len);
795 if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0)
796 put_packet(s, "E14");
797 else
798 put_packet(s, "OK");
799 break;
800 case 'Z':
801 type = strtoul(p, (char **)&p, 16);
802 if (*p == ',')
803 p++;
804 addr = strtoull(p, (char **)&p, 16);
805 if (*p == ',')
806 p++;
807 len = strtoull(p, (char **)&p, 16);
808 if (type == 0 || type == 1) {
809 if (cpu_breakpoint_insert(env, addr) < 0)
810 goto breakpoint_error;
811 put_packet(s, "OK");
812 } else {
813 breakpoint_error:
814 put_packet(s, "E22");
816 break;
817 case 'z':
818 type = strtoul(p, (char **)&p, 16);
819 if (*p == ',')
820 p++;
821 addr = strtoull(p, (char **)&p, 16);
822 if (*p == ',')
823 p++;
824 len = strtoull(p, (char **)&p, 16);
825 if (type == 0 || type == 1) {
826 cpu_breakpoint_remove(env, addr);
827 put_packet(s, "OK");
828 } else {
829 goto breakpoint_error;
831 break;
832 #ifdef CONFIG_USER_ONLY
833 case 'q':
834 if (strncmp(p, "Offsets", 7) == 0) {
835 TaskState *ts = env->opaque;
837 sprintf(buf, "Text=%x;Data=%x;Bss=%x", ts->info->code_offset,
838 ts->info->data_offset, ts->info->data_offset);
839 put_packet(s, buf);
840 break;
842 /* Fall through. */
843 #endif
844 default:
845 // unknown_command:
846 /* put empty packet */
847 buf[0] = '\0';
848 put_packet(s, buf);
849 break;
851 return RS_IDLE;
854 extern void tb_flush(CPUState *env);
856 #ifndef CONFIG_USER_ONLY
857 static void gdb_vm_stopped(void *opaque, int reason)
859 GDBState *s = opaque;
860 char buf[256];
861 int ret;
863 /* disable single step if it was enable */
864 cpu_single_step(s->env, 0);
866 if (reason == EXCP_DEBUG) {
867 tb_flush(s->env);
868 ret = SIGTRAP;
869 } else if (reason == EXCP_INTERRUPT) {
870 ret = SIGINT;
871 } else {
872 ret = 0;
874 snprintf(buf, sizeof(buf), "S%02x", ret);
875 put_packet(s, buf);
877 #endif
879 static void gdb_read_byte(GDBState *s, int ch)
881 CPUState *env = s->env;
882 int i, csum;
883 char reply[1];
885 #ifndef CONFIG_USER_ONLY
886 if (vm_running) {
887 /* when the CPU is running, we cannot do anything except stop
888 it when receiving a char */
889 vm_stop(EXCP_INTERRUPT);
890 } else
891 #endif
893 switch(s->state) {
894 case RS_IDLE:
895 if (ch == '$') {
896 s->line_buf_index = 0;
897 s->state = RS_GETLINE;
899 break;
900 case RS_GETLINE:
901 if (ch == '#') {
902 s->state = RS_CHKSUM1;
903 } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
904 s->state = RS_IDLE;
905 } else {
906 s->line_buf[s->line_buf_index++] = ch;
908 break;
909 case RS_CHKSUM1:
910 s->line_buf[s->line_buf_index] = '\0';
911 s->line_csum = fromhex(ch) << 4;
912 s->state = RS_CHKSUM2;
913 break;
914 case RS_CHKSUM2:
915 s->line_csum |= fromhex(ch);
916 csum = 0;
917 for(i = 0; i < s->line_buf_index; i++) {
918 csum += s->line_buf[i];
920 if (s->line_csum != (csum & 0xff)) {
921 reply[0] = '-';
922 put_buffer(s, reply, 1);
923 s->state = RS_IDLE;
924 } else {
925 reply[0] = '+';
926 put_buffer(s, reply, 1);
927 s->state = gdb_handle_packet(s, env, s->line_buf);
929 break;
934 #ifdef CONFIG_USER_ONLY
936 gdb_handlesig (CPUState *env, int sig)
938 GDBState *s;
939 char buf[256];
940 int n;
942 if (gdbserver_fd < 0)
943 return sig;
945 s = &gdbserver_state;
947 /* disable single step if it was enabled */
948 cpu_single_step(env, 0);
949 tb_flush(env);
951 if (sig != 0)
953 snprintf(buf, sizeof(buf), "S%02x", sig);
954 put_packet(s, buf);
957 sig = 0;
958 s->state = RS_IDLE;
959 s->running_state = 0;
960 while (s->running_state == 0) {
961 n = read (s->fd, buf, 256);
962 if (n > 0)
964 int i;
966 for (i = 0; i < n; i++)
967 gdb_read_byte (s, buf[i]);
969 else if (n == 0 || errno != EAGAIN)
971 /* XXX: Connection closed. Should probably wait for annother
972 connection before continuing. */
973 return sig;
976 return sig;
979 /* Tell the remote gdb that the process has exited. */
980 void gdb_exit(CPUState *env, int code)
982 GDBState *s;
983 char buf[4];
985 if (gdbserver_fd < 0)
986 return;
988 s = &gdbserver_state;
990 snprintf(buf, sizeof(buf), "W%02x", code);
991 put_packet(s, buf);
994 #else
995 static void gdb_read(void *opaque)
997 GDBState *s = opaque;
998 int i, size;
999 uint8_t buf[4096];
1001 size = recv(s->fd, buf, sizeof(buf), 0);
1002 if (size < 0)
1003 return;
1004 if (size == 0) {
1005 /* end of connection */
1006 qemu_del_vm_stop_handler(gdb_vm_stopped, s);
1007 qemu_set_fd_handler(s->fd, NULL, NULL, NULL);
1008 qemu_free(s);
1009 vm_start();
1010 } else {
1011 for(i = 0; i < size; i++)
1012 gdb_read_byte(s, buf[i]);
1016 #endif
1018 static void gdb_accept(void *opaque)
1020 GDBState *s;
1021 struct sockaddr_in sockaddr;
1022 socklen_t len;
1023 int val, fd;
1025 for(;;) {
1026 len = sizeof(sockaddr);
1027 fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
1028 if (fd < 0 && errno != EINTR) {
1029 perror("accept");
1030 return;
1031 } else if (fd >= 0) {
1032 break;
1036 /* set short latency */
1037 val = 1;
1038 setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val));
1040 #ifdef CONFIG_USER_ONLY
1041 s = &gdbserver_state;
1042 memset (s, 0, sizeof (GDBState));
1043 #else
1044 s = qemu_mallocz(sizeof(GDBState));
1045 if (!s) {
1046 close(fd);
1047 return;
1049 #endif
1050 s->env = first_cpu; /* XXX: allow to change CPU */
1051 s->fd = fd;
1053 #ifdef CONFIG_USER_ONLY
1054 fcntl(fd, F_SETFL, O_NONBLOCK);
1055 #else
1056 socket_set_nonblock(fd);
1058 /* stop the VM */
1059 vm_stop(EXCP_INTERRUPT);
1061 /* start handling I/O */
1062 qemu_set_fd_handler(s->fd, gdb_read, NULL, s);
1063 /* when the VM is stopped, the following callback is called */
1064 qemu_add_vm_stop_handler(gdb_vm_stopped, s);
1065 #endif
1068 static int gdbserver_open(int port)
1070 struct sockaddr_in sockaddr;
1071 int fd, val, ret;
1073 fd = socket(PF_INET, SOCK_STREAM, 0);
1074 if (fd < 0) {
1075 perror("socket");
1076 return -1;
1079 /* allow fast reuse */
1080 val = 1;
1081 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val));
1083 sockaddr.sin_family = AF_INET;
1084 sockaddr.sin_port = htons(port);
1085 sockaddr.sin_addr.s_addr = 0;
1086 ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
1087 if (ret < 0) {
1088 perror("bind");
1089 return -1;
1091 ret = listen(fd, 0);
1092 if (ret < 0) {
1093 perror("listen");
1094 return -1;
1096 #ifndef CONFIG_USER_ONLY
1097 socket_set_nonblock(fd);
1098 #endif
1099 return fd;
1102 int gdbserver_start(int port)
1104 gdbserver_fd = gdbserver_open(port);
1105 if (gdbserver_fd < 0)
1106 return -1;
1107 /* accept connections */
1108 #ifdef CONFIG_USER_ONLY
1109 gdb_accept (NULL);
1110 #else
1111 qemu_set_fd_handler(gdbserver_fd, gdb_accept, NULL, NULL);
1112 #endif
1113 return 0;