2 * Tiny Code Generator for QEMU
4 * Copyright (c) 2008 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 #define TCG_TARGET_SPARC 1
26 #if defined(__sparc_v9__) && !defined(__sparc_v8plus__)
27 #define TCG_TARGET_REG_BITS 64
29 #define TCG_TARGET_REG_BITS 32
32 #define TCG_TARGET_WORDS_BIGENDIAN
34 #define TCG_TARGET_NB_REGS 32
71 #define TCG_CT_CONST_S11 0x100
72 #define TCG_CT_CONST_S13 0x200
74 /* used for function call generation */
75 #define TCG_REG_CALL_STACK TCG_REG_O6
76 #define TCG_TARGET_STACK_ALIGN 16
78 #if defined(__sparc_v9__) && !defined(__sparc_v8plus__)
79 #define TCG_TARGET_STACK_MINFRAME 176
81 #define TCG_TARGET_STACK_MINFRAME 92
84 /* optional instructions */
85 //#define TCG_TARGET_HAS_bswap_i32
86 //#define TCG_TARGET_HAS_bswap_i64
88 #define TCG_TARGET_NEEDS_PROLOGUE 1
90 /* Note: must be synced with dyngen-exec.h */
92 #define TCG_AREG0 TCG_REG_G2
93 #define TCG_AREG1 TCG_REG_G3
94 #define TCG_AREG2 TCG_REG_G4
95 #define TCG_AREG3 TCG_REG_G5
96 #define TCG_AREG4 TCG_REG_G6
97 #elif defined(__sparc_v9__)
98 #define TCG_AREG0 TCG_REG_G1
99 #define TCG_AREG1 TCG_REG_G4
100 #define TCG_AREG2 TCG_REG_G5
101 #define TCG_AREG3 TCG_REG_G7
103 #define TCG_AREG0 TCG_REG_G6
104 #define TCG_AREG1 TCG_REG_G1
105 #define TCG_AREG2 TCG_REG_G2
106 #define TCG_AREG3 TCG_REG_G3
109 static inline void flush_icache_range(unsigned long start
, unsigned long stop
)
113 p
= start
& ~(8UL - 1UL);
114 stop
= (stop
+ (8UL - 1UL)) & ~(8UL - 1UL);
116 for (; p
< stop
; p
+= 8)
117 __asm__
__volatile__("flush\t%0" : : "r" (p
));