hw/ppc_newworld.c

   1 /*
   2  * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
   3  *
   4  * Copyright (c) 2004-2007 Fabrice Bellard
   5  * Copyright (c) 2007 Jocelyn Mayer
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a copy
   8  * of this software and associated documentation files (the "Software"), to deal
   9  * in the Software without restriction, including without limitation the rights
  10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11  * copies of the Software, and to permit persons to whom the Software is
  12  * furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included in
  15  * all copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23  * THE SOFTWARE.
  24  */
  25 #include "hw.h"
  26 #include "ppc.h"
  27 #include "ppc_mac.h"
  28 #include "mac_dbdma.h"
  29 #include "nvram.h"
  30 #include "pc.h"
  31 #include "pci.h"
  32 #include "net.h"
  33 #include "sysemu.h"
  34 #include "boards.h"
  35 #include "fw_cfg.h"
  36 #include "escc.h"
  37 #include "openpic.h"
  38
  39 #define MAX_IDE_BUS 2
  40 #define VGA_BIOS_SIZE 65536
  41 #define CFG_ADDR 0xf0000510
  42
  43 /* debug UniNorth */
  44 //#define DEBUG_UNIN
  45
  46 #ifdef DEBUG_UNIN
  47 #define UNIN_DPRINTF(fmt, ...)                                  \
  48     do { printf("UNIN: " fmt , ## __VA_ARGS__); } while (0)
  49 #else
  50 #define UNIN_DPRINTF(fmt, ...)
  51 #endif
  52
  53 /* UniN device */
  54 static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
  55 {
  56     UNIN_DPRINTF("writel addr " TARGET_FMT_plx " val %x\n", addr, value);
  57 }
  58
  59 static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
  60 {
  61     uint32_t value;
  62
  63     value = 0;
  64     UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value);
  65
  66     return value;
  67 }
  68
  69 static CPUWriteMemoryFunc *unin_write[] = {
  70     &unin_writel,
  71     &unin_writel,
  72     &unin_writel,
  73 };
  74
  75 static CPUReadMemoryFunc *unin_read[] = {
  76     &unin_readl,
  77     &unin_readl,
  78     &unin_readl,
  79 };
  80
  81 static int fw_cfg_boot_set(void *opaque, const char *boot_device)
  82 {
  83     fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
  84     return 0;
  85 }
  86
  87 /* PowerPC Mac99 hardware initialisation */
  88 static void ppc_core99_init (ram_addr_t ram_size,
  89                              const char *boot_device,
  90                              const char *kernel_filename,
  91                              const char *kernel_cmdline,
  92                              const char *initrd_filename,
  93                              const char *cpu_model)
  94 {
  95     CPUState *env = NULL, *envs[MAX_CPUS];
  96     char *filename;
  97     qemu_irq *pic, **openpic_irqs;
  98     int unin_memory;
  99     int linux_boot, i;
 100     ram_addr_t ram_offset, bios_offset, vga_bios_offset;
 101     uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
 102     PCIBus *pci_bus;
 103     MacIONVRAMState *nvr;
 104     int nvram_mem_index;
 105     int vga_bios_size, bios_size;
 106     qemu_irq *dummy_irq;
 107     int pic_mem_index, dbdma_mem_index, cuda_mem_index, escc_mem_index;
 108     int ppc_boot_device;
 109     int index;
 110     BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 111     void *fw_cfg;
 112     void *dbdma;
 113     uint8_t *vga_bios_ptr;
 114
 115     linux_boot = (kernel_filename != NULL);
 116
 117     /* init CPUs */
 118     if (cpu_model == NULL)
 119         cpu_model = "G4";
 120     for (i = 0; i < smp_cpus; i++) {
 121         env = cpu_init(cpu_model);
 122         if (!env) {
 123             fprintf(stderr, "Unable to find PowerPC CPU definition\n");
 124             exit(1);
 125         }
 126         /* Set time-base frequency to 100 Mhz */
 127         cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
 128 #if 0
 129         env->osi_call = vga_osi_call;
 130 #endif
 131         qemu_register_reset(&cpu_ppc_reset, env);
 132         envs[i] = env;
 133     }
 134
 135     /* allocate RAM */
 136     ram_offset = qemu_ram_alloc(ram_size);
 137     cpu_register_physical_memory(0, ram_size, ram_offset);
 138
 139     /* allocate and load BIOS */
 140     bios_offset = qemu_ram_alloc(BIOS_SIZE);
 141     if (bios_name == NULL)
 142         bios_name = PROM_FILENAME;
 143     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 144     cpu_register_physical_memory(PROM_ADDR, BIOS_SIZE, bios_offset | IO_MEM_ROM);
 145
 146     /* Load OpenBIOS (ELF) */
 147     if (filename) {
 148         bios_size = load_elf(filename, 0, NULL, NULL, NULL);
 149         qemu_free(filename);
 150     } else {
 151         bios_size = -1;
 152     }
 153     if (bios_size < 0 || bios_size > BIOS_SIZE) {
 154         hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
 155         exit(1);
 156     }
 157
 158     /* allocate and load VGA BIOS */
 159     vga_bios_offset = qemu_ram_alloc(VGA_BIOS_SIZE);
 160     vga_bios_ptr = qemu_get_ram_ptr(vga_bios_offset);
 161     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, VGABIOS_FILENAME);
 162     if (filename) {
 163         vga_bios_size = load_image(filename, vga_bios_ptr + 8);
 164         qemu_free(filename);
 165     } else {
 166         vga_bios_size = -1;
 167     }
 168     if (vga_bios_size < 0) {
 169         /* if no bios is present, we can still work */
 170         fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n",
 171                 VGABIOS_FILENAME);
 172         vga_bios_size = 0;
 173     } else {
 174         /* set a specific header (XXX: find real Apple format for NDRV
 175            drivers) */
 176         vga_bios_ptr[0] = 'N';
 177         vga_bios_ptr[1] = 'D';
 178         vga_bios_ptr[2] = 'R';
 179         vga_bios_ptr[3] = 'V';
 180         cpu_to_be32w((uint32_t *)(vga_bios_ptr + 4), vga_bios_size);
 181         vga_bios_size += 8;
 182     }
 183
 184     if (linux_boot) {
 185         uint64_t lowaddr = 0;
 186         kernel_base = KERNEL_LOAD_ADDR;
 187
 188         /* Now we can load the kernel. The first step tries to load the kernel
 189            supposing PhysAddr = 0x00000000. If that was wrong the kernel is
 190            loaded again, the new PhysAddr being computed from lowaddr. */
 191         kernel_size = load_elf(kernel_filename, kernel_base, NULL, &lowaddr, NULL);
 192         if (kernel_size > 0 && lowaddr != KERNEL_LOAD_ADDR) {
 193             kernel_size = load_elf(kernel_filename, (2 * kernel_base) - lowaddr,
 194                                    NULL, NULL, NULL);
 195         }
 196         if (kernel_size < 0)
 197             kernel_size = load_aout(kernel_filename, kernel_base,
 198                                     ram_size - kernel_base);
 199         if (kernel_size < 0)
 200             kernel_size = load_image_targphys(kernel_filename,
 201                                               kernel_base,
 202                                               ram_size - kernel_base);
 203         if (kernel_size < 0) {
 204             hw_error("qemu: could not load kernel '%s'\n", kernel_filename);
 205             exit(1);
 206         }
 207         /* load initrd */
 208         if (initrd_filename) {
 209             initrd_base = INITRD_LOAD_ADDR;
 210             initrd_size = load_image_targphys(initrd_filename, initrd_base,
 211                                               ram_size - initrd_base);
 212             if (initrd_size < 0) {
 213                 hw_error("qemu: could not load initial ram disk '%s'\n",
 214                          initrd_filename);
 215                 exit(1);
 216             }
 217         } else {
 218             initrd_base = 0;
 219             initrd_size = 0;
 220         }
 221         ppc_boot_device = 'm';
 222     } else {
 223         kernel_base = 0;
 224         kernel_size = 0;
 225         initrd_base = 0;
 226         initrd_size = 0;
 227         ppc_boot_device = '\0';
 228         /* We consider that NewWorld PowerMac never have any floppy drive
 229          * For now, OHW cannot boot from the network.
 230          */
 231         for (i = 0; boot_device[i] != '\0'; i++) {
 232             if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
 233                 ppc_boot_device = boot_device[i];
 234                 break;
 235             }
 236         }
 237         if (ppc_boot_device == '\0') {
 238             fprintf(stderr, "No valid boot device for Mac99 machine\n");
 239             exit(1);
 240         }
 241     }
 242
 243     isa_mem_base = 0x80000000;
 244
 245     /* Register 8 MB of ISA IO space */
 246     isa_mmio_init(0xf2000000, 0x00800000);
 247
 248     /* UniN init */
 249     unin_memory = cpu_register_io_memory(unin_read, unin_write, NULL);
 250     cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);
 251
 252     openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
 253     openpic_irqs[0] =
 254         qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
 255     for (i = 0; i < smp_cpus; i++) {
 256         /* Mac99 IRQ connection between OpenPIC outputs pins
 257          * and PowerPC input pins
 258          */
 259         switch (PPC_INPUT(env)) {
 260         case PPC_FLAGS_INPUT_6xx:
 261             openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
 262             openpic_irqs[i][OPENPIC_OUTPUT_INT] =
 263                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 264             openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
 265                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 266             openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
 267                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
 268             /* Not connected ? */
 269             openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
 270             /* Check this */
 271             openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
 272                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
 273             break;
 274 #if defined(TARGET_PPC64)
 275         case PPC_FLAGS_INPUT_970:
 276             openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
 277             openpic_irqs[i][OPENPIC_OUTPUT_INT] =
 278                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
 279             openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
 280                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
 281             openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
 282                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
 283             /* Not connected ? */
 284             openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
 285             /* Check this */
 286             openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
 287                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
 288             break;
 289 #endif /* defined(TARGET_PPC64) */
 290         default:
 291             hw_error("Bus model not supported on mac99 machine\n");
 292             exit(1);
 293         }
 294     }
 295     pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
 296     pci_bus = pci_pmac_init(pic);
 297     /* init basic PC hardware */
 298     pci_vga_init(pci_bus, vga_bios_offset, vga_bios_size);
 299
 300     /* XXX: suppress that */
 301     dummy_irq = i8259_init(NULL);
 302
 303     escc_mem_index = escc_init(0x80013000, dummy_irq[4], dummy_irq[5],
 304                                serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);
 305
 306     for(i = 0; i < nb_nics; i++)
 307         pci_nic_init(&nd_table[i], "ne2k_pci", NULL);
 308
 309     if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
 310         fprintf(stderr, "qemu: too many IDE bus\n");
 311         exit(1);
 312     }
 313     for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
 314         index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
 315         if (index != -1)
 316             hd[i] = drives_table[index].bdrv;
 317         else
 318             hd[i] = NULL;
 319     }
 320     dbdma = DBDMA_init(&dbdma_mem_index);
 321     pci_cmd646_ide_init(pci_bus, hd, 0);
 322
 323     /* cuda also initialize ADB */
 324     cuda_init(&cuda_mem_index, pic[0x19]);
 325
 326     adb_kbd_init(&adb_bus);
 327     adb_mouse_init(&adb_bus);
 328
 329
 330     macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem_index,
 331                dbdma_mem_index, cuda_mem_index, NULL, 0, NULL,
 332                escc_mem_index);
 333
 334     if (usb_enabled) {
 335         usb_ohci_init_pci(pci_bus, 3, -1);
 336     }
 337
 338     if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
 339         graphic_depth = 15;
 340
 341     /* The NewWorld NVRAM is not located in the MacIO device */
 342     nvr = macio_nvram_init(&nvram_mem_index, 0x2000, 1);
 343     pmac_format_nvram_partition(nvr, 0x2000);
 344     macio_nvram_map(nvr, 0xFFF04000);
 345     /* No PCI init: the BIOS will do it */
 346
 347     fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
 348     fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
 349     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
 350     fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_MAC99);
 351     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
 352     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
 353     if (kernel_cmdline) {
 354         fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR);
 355         pstrcpy_targphys(CMDLINE_ADDR, TARGET_PAGE_SIZE, kernel_cmdline);
 356     } else {
 357         fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
 358     }
 359     fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
 360     fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
 361     fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
 362     qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
 363 }
 364
 365 static QEMUMachine core99_machine = {
 366     .name = "mac99",
 367     .desc = "Mac99 based PowerMAC",
 368     .init = ppc_core99_init,
 369     .max_cpus = MAX_CPUS,
 370 };
 371
 372 static void core99_machine_init(void)
 373 {
 374     qemu_register_machine(&core99_machine);
 375 }
 376
 377 machine_init(core99_machine_init);