target-sh4/op.c

   1 /*
   2  *  SH4 emulation
   3  *
   4  *  Copyright (c) 2005 Samuel Tardieu
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20 #include "exec.h"
  21
  22 static inline void set_t(void)
  23 {
  24     env->sr |= SR_T;
  25 }
  26
  27 static inline void clr_t(void)
  28 {
  29     env->sr &= ~SR_T;
  30 }
  31
  32 static inline void cond_t(int cond)
  33 {
  34     if (cond)
  35         set_t();
  36     else
  37         clr_t();
  38 }
  39
  40 void OPPROTO op_movl_imm_T0(void)
  41 {
  42     T0 = (uint32_t) PARAM1;
  43     RETURN();
  44 }
  45
  46 void OPPROTO op_movl_imm_T1(void)
  47 {
  48     T1 = (uint32_t) PARAM1;
  49     RETURN();
  50 }
  51
  52 void OPPROTO op_cmp_eq_imm_T0(void)
  53 {
  54     cond_t((int32_t) T0 == (int32_t) PARAM1);
  55     RETURN();
  56 }
  57
  58 void OPPROTO op_cmd_eq_T0_T1(void)
  59 {
  60     cond_t(T0 == T1);
  61     RETURN();
  62 }
  63
  64 void OPPROTO op_cmd_hs_T0_T1(void)
  65 {
  66     cond_t((uint32_t) T0 <= (uint32_t) T1);
  67     RETURN();
  68 }
  69
  70 void OPPROTO op_cmd_ge_T0_T1(void)
  71 {
  72     cond_t((int32_t) T0 <= (int32_t) T1);
  73     RETURN();
  74 }
  75
  76 void OPPROTO op_cmd_hi_T0_T1(void)
  77 {
  78     cond_t((uint32_t) T0 < (uint32_t) T1);
  79     RETURN();
  80 }
  81
  82 void OPPROTO op_cmd_gt_T0_T1(void)
  83 {
  84     cond_t((int32_t) T0 < (int32_t) T1);
  85     RETURN();
  86 }
  87
  88 void OPPROTO op_not_T0(void)
  89 {
  90     T0 = ~T0;
  91     RETURN();
  92 }
  93
  94 void OPPROTO op_bf_s(void)
  95 {
  96     env->delayed_pc = PARAM1;
  97     if (!(env->sr & SR_T)) {
  98         env->flags |= DELAY_SLOT_TRUE;
  99     }
 100     RETURN();
 101 }
 102
 103 void OPPROTO op_bt_s(void)
 104 {
 105     env->delayed_pc = PARAM1;
 106     if (env->sr & SR_T) {
 107         env->flags |= DELAY_SLOT_TRUE;
 108     }
 109     RETURN();
 110 }
 111
 112 void OPPROTO op_store_flags(void)
 113 {
 114     env->flags &= DELAY_SLOT_TRUE;
 115     env->flags |= PARAM1;
 116     RETURN();
 117 }
 118
 119 void OPPROTO op_bra(void)
 120 {
 121     env->delayed_pc = PARAM1;
 122     RETURN();
 123 }
 124
 125 void OPPROTO op_braf_T0(void)
 126 {
 127     env->delayed_pc = PARAM1 + T0;
 128     RETURN();
 129 }
 130
 131 void OPPROTO op_bsr(void)
 132 {
 133     env->pr = PARAM1;
 134     env->delayed_pc = PARAM2;
 135     RETURN();
 136 }
 137
 138 void OPPROTO op_bsrf_T0(void)
 139 {
 140     env->pr = PARAM1;
 141     env->delayed_pc = PARAM1 + T0;
 142     RETURN();
 143 }
 144
 145 void OPPROTO op_jsr_T0(void)
 146 {
 147     env->pr = PARAM1;
 148     env->delayed_pc = T0;
 149     RETURN();
 150 }
 151
 152 void OPPROTO op_rts(void)
 153 {
 154     env->delayed_pc = env->pr;
 155     RETURN();
 156 }
 157
 158 void OPPROTO op_addl_imm_T0(void)
 159 {
 160     T0 += PARAM1;
 161     RETURN();
 162 }
 163
 164 void OPPROTO op_addl_imm_T1(void)
 165 {
 166     T1 += PARAM1;
 167     RETURN();
 168 }
 169
 170 void OPPROTO op_clrmac(void)
 171 {
 172     env->mach = env->macl = 0;
 173     RETURN();
 174 }
 175
 176 void OPPROTO op_clrs(void)
 177 {
 178     env->sr &= ~SR_S;
 179     RETURN();
 180 }
 181
 182 void OPPROTO op_clrt(void)
 183 {
 184     env->sr &= ~SR_T;
 185     RETURN();
 186 }
 187
 188 void OPPROTO op_ldtlb(void)
 189 {
 190     helper_ldtlb();
 191     RETURN();
 192 }
 193
 194 void OPPROTO op_sets(void)
 195 {
 196     env->sr |= SR_S;
 197     RETURN();
 198 }
 199
 200 void OPPROTO op_sett(void)
 201 {
 202     env->sr |= SR_T;
 203     RETURN();
 204 }
 205
 206 void OPPROTO op_frchg(void)
 207 {
 208     env->fpscr ^= FPSCR_FR;
 209     RETURN();
 210 }
 211
 212 void OPPROTO op_fschg(void)
 213 {
 214     env->fpscr ^= FPSCR_SZ;
 215     RETURN();
 216 }
 217
 218 void OPPROTO op_rte(void)
 219 {
 220     env->sr = env->ssr;
 221     env->delayed_pc = env->spc;
 222     RETURN();
 223 }
 224
 225 void OPPROTO op_swapb_T0(void)
 226 {
 227     T0 = (T0 & 0xffff0000) | ((T0 & 0xff) << 8) | ((T0 >> 8) & 0xff);
 228     RETURN();
 229 }
 230
 231 void OPPROTO op_swapw_T0(void)
 232 {
 233     T0 = ((T0 & 0xffff) << 16) | ((T0 >> 16) & 0xffff);
 234     RETURN();
 235 }
 236
 237 void OPPROTO op_xtrct_T0_T1(void)
 238 {
 239     T1 = ((T0 & 0xffff) << 16) | ((T1 >> 16) & 0xffff);
 240     RETURN();
 241 }
 242
 243 void OPPROTO op_add_T0_T1(void)
 244 {
 245     T1 += T0;
 246     RETURN();
 247 }
 248
 249 void OPPROTO op_addc_T0_T1(void)
 250 {
 251     helper_addc_T0_T1();
 252     RETURN();
 253 }
 254
 255 void OPPROTO op_addv_T0_T1(void)
 256 {
 257     helper_addv_T0_T1();
 258     RETURN();
 259 }
 260
 261 void OPPROTO op_cmp_eq_T0_T1(void)
 262 {
 263     cond_t(T1 == T0);
 264     RETURN();
 265 }
 266
 267 void OPPROTO op_cmp_ge_T0_T1(void)
 268 {
 269     cond_t((int32_t) T1 >= (int32_t) T0);
 270     RETURN();
 271 }
 272
 273 void OPPROTO op_cmp_gt_T0_T1(void)
 274 {
 275     cond_t((int32_t) T1 > (int32_t) T0);
 276     RETURN();
 277 }
 278
 279 void OPPROTO op_cmp_hi_T0_T1(void)
 280 {
 281     cond_t((uint32_t) T1 > (uint32_t) T0);
 282     RETURN();
 283 }
 284
 285 void OPPROTO op_cmp_hs_T0_T1(void)
 286 {
 287     cond_t((uint32_t) T1 >= (uint32_t) T0);
 288     RETURN();
 289 }
 290
 291 void OPPROTO op_cmp_str_T0_T1(void)
 292 {
 293     cond_t((T0 & 0x000000ff) == (T1 & 0x000000ff) ||
 294            (T0 & 0x0000ff00) == (T1 & 0x0000ff00) ||
 295            (T0 & 0x00ff0000) == (T1 & 0x00ff0000) ||
 296            (T0 & 0xff000000) == (T1 & 0xff000000));
 297     RETURN();
 298 }
 299
 300 void OPPROTO op_tst_T0_T1(void)
 301 {
 302     cond_t((T1 & T0) == 0);
 303     RETURN();
 304 }
 305
 306 void OPPROTO op_div0s_T0_T1(void)
 307 {
 308     if (T1 & 0x80000000)
 309         env->sr |= SR_Q;
 310     else
 311         env->sr &= ~SR_Q;
 312     if (T0 & 0x80000000)
 313         env->sr |= SR_M;
 314     else
 315         env->sr &= ~SR_M;
 316     cond_t((T1 ^ T0) & 0x80000000);
 317     RETURN();
 318 }
 319
 320 void OPPROTO op_div0u(void)
 321 {
 322     env->sr &= ~(SR_M | SR_Q | SR_T);
 323     RETURN();
 324 }
 325
 326 void OPPROTO op_div1_T0_T1(void)
 327 {
 328     helper_div1_T0_T1();
 329     RETURN();
 330 }
 331
 332 void OPPROTO op_dmulsl_T0_T1(void)
 333 {
 334     helper_dmulsl_T0_T1();
 335     RETURN();
 336 }
 337
 338 void OPPROTO op_dmulul_T0_T1(void)
 339 {
 340     helper_dmulul_T0_T1();
 341     RETURN();
 342 }
 343
 344 void OPPROTO op_macl_T0_T1(void)
 345 {
 346     helper_macl_T0_T1();
 347     RETURN();
 348 }
 349
 350 void OPPROTO op_macw_T0_T1(void)
 351 {
 352     helper_macw_T0_T1();
 353     RETURN();
 354 }
 355
 356 void OPPROTO op_mull_T0_T1(void)
 357 {
 358     env->macl = (T0 * T1) & 0xffffffff;
 359     RETURN();
 360 }
 361
 362 void OPPROTO op_mulsw_T0_T1(void)
 363 {
 364     env->macl = (int32_t)(int16_t) T0 *(int32_t)(int16_t) T1;
 365     RETURN();
 366 }
 367
 368 void OPPROTO op_muluw_T0_T1(void)
 369 {
 370     env->macl = (uint32_t)(uint16_t) T0 *(uint32_t)(uint16_t) T1;
 371     RETURN();
 372 }
 373
 374 void OPPROTO op_neg_T0(void)
 375 {
 376     T0 = -T0;
 377     RETURN();
 378 }
 379
 380 void OPPROTO op_negc_T0(void)
 381 {
 382     helper_negc_T0();
 383     RETURN();
 384 }
 385
 386 void OPPROTO op_shad_T0_T1(void)
 387 {
 388     if ((T0 & 0x80000000) == 0)
 389         T1 <<= (T0 & 0x1f);
 390     else if ((T0 & 0x1f) == 0)
 391         T1 = (T1 & 0x80000000)? 0xffffffff : 0;
 392     else
 393         T1 = ((int32_t) T1) >> ((~T0 & 0x1f) + 1);
 394     RETURN();
 395 }
 396
 397 void OPPROTO op_shld_T0_T1(void)
 398 {
 399     if ((T0 & 0x80000000) == 0)
 400         T1 <<= (T0 & 0x1f);
 401     else if ((T0 & 0x1f) == 0)
 402         T1 = 0;
 403     else
 404         T1 = ((uint32_t) T1) >> ((~T0 & 0x1f) + 1);
 405     RETURN();
 406 }
 407
 408 void OPPROTO op_subc_T0_T1(void)
 409 {
 410     helper_subc_T0_T1();
 411     RETURN();
 412 }
 413
 414 void OPPROTO op_subv_T0_T1(void)
 415 {
 416     helper_subv_T0_T1();
 417     RETURN();
 418 }
 419
 420 void OPPROTO op_trapa(void)
 421 {
 422     env->tra = PARAM1 << 2;
 423     env->exception_index = 0x160;
 424     do_raise_exception();
 425     RETURN();
 426 }
 427
 428 void OPPROTO op_cmp_pl_T0(void)
 429 {
 430     cond_t((int32_t) T0 > 0);
 431     RETURN();
 432 }
 433
 434 void OPPROTO op_cmp_pz_T0(void)
 435 {
 436     cond_t((int32_t) T0 >= 0);
 437     RETURN();
 438 }
 439
 440 void OPPROTO op_jmp_T0(void)
 441 {
 442     env->delayed_pc = T0;
 443     RETURN();
 444 }
 445
 446 void OPPROTO op_movl_rN_rN(void)
 447 {
 448     env->gregs[PARAM2] = env->gregs[PARAM1];
 449     RETURN();
 450 }
 451
 452 void OPPROTO op_ldcl_rMplus_rN_bank(void)
 453 {
 454     env->gregs[PARAM2] = env->gregs[PARAM1];
 455     env->gregs[PARAM1] += 4;
 456     RETURN();
 457 }
 458
 459 void OPPROTO op_ldc_T0_sr(void)
 460 {
 461     env->sr = T0 & 0x700083f3;
 462     RETURN();
 463 }
 464
 465 void OPPROTO op_stc_sr_T0(void)
 466 {
 467     T0 = env->sr;
 468     RETURN();
 469 }
 470
 471 #define LDSTOPS(target,load,store) \
 472 void OPPROTO op_##load##_T0_##target (void) \
 473 { env ->target = T0;   RETURN(); \
 474 } \
 475 void OPPROTO op_##store##_##target##_T0 (void) \
 476 { T0 = env->target;   RETURN(); \
 477 } \
 478
 479     LDSTOPS(gbr, ldc, stc)
 480     LDSTOPS(vbr, ldc, stc)
 481     LDSTOPS(ssr, ldc, stc)
 482     LDSTOPS(spc, ldc, stc)
 483     LDSTOPS(sgr, ldc, stc)
 484     LDSTOPS(dbr, ldc, stc)
 485     LDSTOPS(mach, lds, sts)
 486     LDSTOPS(macl, lds, sts)
 487     LDSTOPS(pr, lds, sts)
 488     LDSTOPS(fpul, lds, sts)
 489
 490 void OPPROTO op_lds_T0_fpscr(void)
 491 {
 492     env->fpscr = T0 & 0x003fffff;
 493     env->fp_status.float_rounding_mode = T0 & 0x01 ?
 494       float_round_to_zero : float_round_nearest_even;
 495
 496     RETURN();
 497 }
 498
 499 void OPPROTO op_sts_fpscr_T0(void)
 500 {
 501     T0 = env->fpscr & 0x003fffff;
 502     RETURN();
 503 }
 504
 505 void OPPROTO op_movt_rN(void)
 506 {
 507     env->gregs[PARAM1] = env->sr & SR_T;
 508     RETURN();
 509 }
 510
 511 void OPPROTO op_rotcl_Rn(void)
 512 {
 513     helper_rotcl(&env->gregs[PARAM1]);
 514     RETURN();
 515 }
 516
 517 void OPPROTO op_rotcr_Rn(void)
 518 {
 519     helper_rotcr(&env->gregs[PARAM1]);
 520     RETURN();
 521 }
 522
 523 void OPPROTO op_rotl_Rn(void)
 524 {
 525     cond_t(env->gregs[PARAM1] & 0x80000000);
 526     env->gregs[PARAM1] = (env->gregs[PARAM1] << 1) | (env->sr & SR_T);
 527     RETURN();
 528 }
 529
 530 void OPPROTO op_rotr_Rn(void)
 531 {
 532     cond_t(env->gregs[PARAM1] & 1);
 533     env->gregs[PARAM1] = (env->gregs[PARAM1] >> 1) |
 534         ((env->sr & SR_T) ? 0x80000000 : 0);
 535     RETURN();
 536 }
 537
 538 void OPPROTO op_shal_Rn(void)
 539 {
 540     cond_t(env->gregs[PARAM1] & 0x80000000);
 541     env->gregs[PARAM1] <<= 1;
 542     RETURN();
 543 }
 544
 545 void OPPROTO op_shar_Rn(void)
 546 {
 547     cond_t(env->gregs[PARAM1] & 1);
 548     *(int32_t *)&env->gregs[PARAM1] >>= 1;
 549     RETURN();
 550 }
 551
 552 void OPPROTO op_shlr_Rn(void)
 553 {
 554     cond_t(env->gregs[PARAM1] & 1);
 555     env->gregs[PARAM1] >>= 1;
 556     RETURN();
 557 }
 558
 559 void OPPROTO op_shll2_Rn(void)
 560 {
 561     env->gregs[PARAM1] <<= 2;
 562     RETURN();
 563 }
 564
 565 void OPPROTO op_shll8_Rn(void)
 566 {
 567     env->gregs[PARAM1] <<= 8;
 568     RETURN();
 569 }
 570
 571 void OPPROTO op_shll16_Rn(void)
 572 {
 573     env->gregs[PARAM1] <<= 16;
 574     RETURN();
 575 }
 576
 577 void OPPROTO op_shlr2_Rn(void)
 578 {
 579     env->gregs[PARAM1] >>= 2;
 580     RETURN();
 581 }
 582
 583 void OPPROTO op_shlr8_Rn(void)
 584 {
 585     env->gregs[PARAM1] >>= 8;
 586     RETURN();
 587 }
 588
 589 void OPPROTO op_shlr16_Rn(void)
 590 {
 591     env->gregs[PARAM1] >>= 16;
 592     RETURN();
 593 }
 594
 595 void OPPROTO op_tasb_rN(void)
 596 {
 597     cond_t(*(int8_t *) env->gregs[PARAM1] == 0);
 598     *(int8_t *) env->gregs[PARAM1] |= 0x80;
 599     RETURN();
 600 }
 601
 602 void OPPROTO op_movl_T0_rN(void)
 603 {
 604     env->gregs[PARAM1] = T0;
 605     RETURN();
 606 }
 607
 608 void OPPROTO op_movl_T1_rN(void)
 609 {
 610     env->gregs[PARAM1] = T1;
 611     RETURN();
 612 }
 613
 614 void OPPROTO op_movb_rN_T0(void)
 615 {
 616     T0 = (int32_t) (int8_t) (env->gregs[PARAM1] & 0xff);
 617     RETURN();
 618 }
 619
 620 void OPPROTO op_movub_rN_T0(void)
 621 {
 622     T0 = env->gregs[PARAM1] & 0xff;
 623     RETURN();
 624 }
 625
 626 void OPPROTO op_movw_rN_T0(void)
 627 {
 628     T0 = (int32_t) (int16_t) (env->gregs[PARAM1] & 0xffff);
 629     RETURN();
 630 }
 631
 632 void OPPROTO op_movuw_rN_T0(void)
 633 {
 634     T0 = env->gregs[PARAM1] & 0xffff;
 635     RETURN();
 636 }
 637
 638 void OPPROTO op_movl_rN_T0(void)
 639 {
 640     T0 = env->gregs[PARAM1];
 641     RETURN();
 642 }
 643
 644 void OPPROTO op_movb_rN_T1(void)
 645 {
 646     T1 = (int32_t) (int8_t) (env->gregs[PARAM1] & 0xff);
 647     RETURN();
 648 }
 649
 650 void OPPROTO op_movub_rN_T1(void)
 651 {
 652     T1 = env->gregs[PARAM1] & 0xff;
 653     RETURN();
 654 }
 655
 656 void OPPROTO op_movw_rN_T1(void)
 657 {
 658     T1 = (int32_t) (int16_t) (env->gregs[PARAM1] & 0xffff);
 659     RETURN();
 660 }
 661
 662 void OPPROTO op_movuw_rN_T1(void)
 663 {
 664     T1 = env->gregs[PARAM1] & 0xffff;
 665     RETURN();
 666 }
 667
 668 void OPPROTO op_movl_rN_T1(void)
 669 {
 670     T1 = env->gregs[PARAM1];
 671     RETURN();
 672 }
 673
 674 void OPPROTO op_movl_imm_rN(void)
 675 {
 676     env->gregs[PARAM2] = PARAM1;
 677     RETURN();
 678 }
 679
 680 void OPPROTO op_fmov_frN_FT0(void)
 681 {
 682     FT0 = env->fregs[PARAM1];
 683     RETURN();
 684 }
 685
 686 void OPPROTO op_fmov_drN_DT0(void)
 687 {
 688     CPU_DoubleU d;
 689
 690     d.l.upper = *(uint32_t *)&env->fregs[PARAM1];
 691     d.l.lower = *(uint32_t *)&env->fregs[PARAM1 + 1];
 692     DT0 = d.d;
 693     RETURN();
 694 }
 695
 696 void OPPROTO op_fmov_frN_FT1(void)
 697 {
 698     FT1 = env->fregs[PARAM1];
 699     RETURN();
 700 }
 701
 702 void OPPROTO op_fmov_drN_DT1(void)
 703 {
 704     CPU_DoubleU d;
 705
 706     d.l.upper = *(uint32_t *)&env->fregs[PARAM1];
 707     d.l.lower = *(uint32_t *)&env->fregs[PARAM1 + 1];
 708     DT1 = d.d;
 709     RETURN();
 710 }
 711
 712 void OPPROTO op_fmov_FT0_frN(void)
 713 {
 714     env->fregs[PARAM1] = FT0;
 715     RETURN();
 716 }
 717
 718 void OPPROTO op_fmov_DT0_drN(void)
 719 {
 720     CPU_DoubleU d;
 721
 722     d.d = DT0;
 723     *(uint32_t *)&env->fregs[PARAM1] = d.l.upper;
 724     *(uint32_t *)&env->fregs[PARAM1 + 1] = d.l.lower;
 725     RETURN();
 726 }
 727
 728 void OPPROTO op_fadd_FT(void)
 729 {
 730     FT0 = float32_add(FT0, FT1, &env->fp_status);
 731     RETURN();
 732 }
 733
 734 void OPPROTO op_fadd_DT(void)
 735 {
 736     DT0 = float64_add(DT0, DT1, &env->fp_status);
 737     RETURN();
 738 }
 739
 740 void OPPROTO op_fsub_FT(void)
 741 {
 742     FT0 = float32_sub(FT0, FT1, &env->fp_status);
 743     RETURN();
 744 }
 745
 746 void OPPROTO op_fsub_DT(void)
 747 {
 748     DT0 = float64_sub(DT0, DT1, &env->fp_status);
 749     RETURN();
 750 }
 751
 752 void OPPROTO op_fmul_FT(void)
 753 {
 754     FT0 = float32_mul(FT0, FT1, &env->fp_status);
 755     RETURN();
 756 }
 757
 758 void OPPROTO op_fmul_DT(void)
 759 {
 760     DT0 = float64_mul(DT0, DT1, &env->fp_status);
 761     RETURN();
 762 }
 763
 764 void OPPROTO op_fdiv_FT(void)
 765 {
 766     FT0 = float32_div(FT0, FT1, &env->fp_status);
 767     RETURN();
 768 }
 769
 770 void OPPROTO op_fdiv_DT(void)
 771 {
 772     DT0 = float64_div(DT0, DT1, &env->fp_status);
 773     RETURN();
 774 }
 775
 776 void OPPROTO op_fcmp_eq_FT(void)
 777 {
 778     cond_t(float32_compare(FT0, FT1, &env->fp_status) == 0);
 779     RETURN();
 780 }
 781
 782 void OPPROTO op_fcmp_eq_DT(void)
 783 {
 784     cond_t(float64_compare(DT0, DT1, &env->fp_status) == 0);
 785     RETURN();
 786 }
 787
 788 void OPPROTO op_fcmp_gt_FT(void)
 789 {
 790     cond_t(float32_compare(FT0, FT1, &env->fp_status) == 1);
 791     RETURN();
 792 }
 793
 794 void OPPROTO op_fcmp_gt_DT(void)
 795 {
 796     cond_t(float64_compare(DT0, DT1, &env->fp_status) == 1);
 797     RETURN();
 798 }
 799
 800 void OPPROTO op_float_FT(void)
 801 {
 802     FT0 = int32_to_float32(env->fpul, &env->fp_status);
 803     RETURN();
 804 }
 805
 806 void OPPROTO op_float_DT(void)
 807 {
 808     DT0 = int32_to_float64(env->fpul, &env->fp_status);
 809     RETURN();
 810 }
 811
 812 void OPPROTO op_ftrc_FT(void)
 813 {
 814     env->fpul = float32_to_int32_round_to_zero(FT0, &env->fp_status);
 815     RETURN();
 816 }
 817
 818 void OPPROTO op_ftrc_DT(void)
 819 {
 820     env->fpul = float64_to_int32_round_to_zero(DT0, &env->fp_status);
 821     RETURN();
 822 }
 823
 824 void OPPROTO op_fneg_frN(void)
 825 {
 826     env->fregs[PARAM1] = float32_chs(env->fregs[PARAM1]);
 827     RETURN();
 828 }
 829
 830 void OPPROTO op_fabs_FT(void)
 831 {
 832     FT0 = float32_abs(FT0);
 833     RETURN();
 834 }
 835
 836 void OPPROTO op_fabs_DT(void)
 837 {
 838     DT0 = float64_abs(DT0);
 839     RETURN();
 840 }
 841
 842 void OPPROTO op_fcnvsd_FT_DT(void)
 843 {
 844     DT0 = float32_to_float64(FT0, &env->fp_status);
 845     RETURN();
 846 }
 847
 848 void OPPROTO op_fcnvds_DT_FT(void)
 849 {
 850     FT0 = float64_to_float32(DT0, &env->fp_status);
 851     RETURN();
 852 }
 853
 854 void OPPROTO op_fsqrt_FT(void)
 855 {
 856     FT0 = float32_sqrt(FT0, &env->fp_status);
 857     RETURN();
 858 }
 859
 860 void OPPROTO op_fsqrt_DT(void)
 861 {
 862     DT0 = float64_sqrt(DT0, &env->fp_status);
 863     RETURN();
 864 }
 865
 866 void OPPROTO op_fmov_T0_frN(void)
 867 {
 868     *(uint32_t *)&env->fregs[PARAM1] = T0;
 869     RETURN();
 870 }
 871
 872 void OPPROTO op_dec1_rN(void)
 873 {
 874     env->gregs[PARAM1] -= 1;
 875     RETURN();
 876 }
 877
 878 void OPPROTO op_dec2_rN(void)
 879 {
 880     env->gregs[PARAM1] -= 2;
 881     RETURN();
 882 }
 883
 884 void OPPROTO op_dec4_rN(void)
 885 {
 886     env->gregs[PARAM1] -= 4;
 887     RETURN();
 888 }
 889
 890 void OPPROTO op_dec8_rN(void)
 891 {
 892     env->gregs[PARAM1] -= 8;
 893     RETURN();
 894 }
 895
 896 void OPPROTO op_inc1_rN(void)
 897 {
 898     env->gregs[PARAM1] += 1;
 899     RETURN();
 900 }
 901
 902 void OPPROTO op_inc2_rN(void)
 903 {
 904     env->gregs[PARAM1] += 2;
 905     RETURN();
 906 }
 907
 908 void OPPROTO op_inc4_rN(void)
 909 {
 910     env->gregs[PARAM1] += 4;
 911     RETURN();
 912 }
 913
 914 void OPPROTO op_inc8_rN(void)
 915 {
 916     env->gregs[PARAM1] += 8;
 917     RETURN();
 918 }
 919
 920 void OPPROTO op_add_T0_rN(void)
 921 {
 922     env->gregs[PARAM1] += T0;
 923     RETURN();
 924 }
 925
 926 void OPPROTO op_sub_T0_rN(void)
 927 {
 928     env->gregs[PARAM1] -= T0;
 929     RETURN();
 930 }
 931
 932 void OPPROTO op_and_T0_rN(void)
 933 {
 934     env->gregs[PARAM1] &= T0;
 935     RETURN();
 936 }
 937
 938 void OPPROTO op_or_T0_rN(void)
 939 {
 940     env->gregs[PARAM1] |= T0;
 941     RETURN();
 942 }
 943
 944 void OPPROTO op_xor_T0_rN(void)
 945 {
 946     env->gregs[PARAM1] ^= T0;
 947     RETURN();
 948 }
 949
 950 void OPPROTO op_add_rN_T0(void)
 951 {
 952     T0 += env->gregs[PARAM1];
 953     RETURN();
 954 }
 955
 956 void OPPROTO op_add_rN_T1(void)
 957 {
 958     T1 += env->gregs[PARAM1];
 959     RETURN();
 960 }
 961
 962 void OPPROTO op_add_imm_rN(void)
 963 {
 964     env->gregs[PARAM2] += PARAM1;
 965     RETURN();
 966 }
 967
 968 void OPPROTO op_and_imm_rN(void)
 969 {
 970     env->gregs[PARAM2] &= PARAM1;
 971     RETURN();
 972 }
 973
 974 void OPPROTO op_or_imm_rN(void)
 975 {
 976     env->gregs[PARAM2] |= PARAM1;
 977     RETURN();
 978 }
 979
 980 void OPPROTO op_xor_imm_rN(void)
 981 {
 982     env->gregs[PARAM2] ^= PARAM1;
 983     RETURN();
 984 }
 985
 986 void OPPROTO op_dt_rN(void)
 987 {
 988     cond_t((--env->gregs[PARAM1]) == 0);
 989     RETURN();
 990 }
 991
 992 void OPPROTO op_tst_imm_rN(void)
 993 {
 994     cond_t((env->gregs[PARAM2] & PARAM1) == 0);
 995     RETURN();
 996 }
 997
 998 void OPPROTO op_movl_T0_T1(void)
 999 {
1000     T1 = T0;
1001     RETURN();
1002 }
1003
1004 void OPPROTO op_movl_fpul_FT0(void)
1005 {
1006     FT0 = *(float32 *)&env->fpul;
1007     RETURN();
1008 }
1009
1010 void OPPROTO op_movl_FT0_fpul(void)
1011 {
1012     *(float32 *)&env->fpul = FT0;
1013     RETURN();
1014 }
1015
1016 void OPPROTO op_movl_imm_PC(void)
1017 {
1018     env->pc = PARAM1;
1019     RETURN();
1020 }
1021
1022 void OPPROTO op_jT(void)
1023 {
1024     if (env->sr & SR_T)
1025         GOTO_LABEL_PARAM(1);
1026     RETURN();
1027 }
1028
1029 void OPPROTO op_jdelayed(void)
1030 {
1031     if (env->flags & DELAY_SLOT_TRUE) {
1032         env->flags &= ~DELAY_SLOT_TRUE;
1033         GOTO_LABEL_PARAM(1);
1034     }
1035     RETURN();
1036 }
1037
1038 void OPPROTO op_movl_delayed_pc_PC(void)
1039 {
1040     env->pc = env->delayed_pc;
1041     RETURN();
1042 }
1043
1044 void OPPROTO op_addl_GBR_T0(void)
1045 {
1046     T0 += env->gbr;
1047     RETURN();
1048 }
1049
1050 void OPPROTO op_and_imm_T0(void)
1051 {
1052     T0 &= PARAM1;
1053     RETURN();
1054 }
1055
1056 void OPPROTO op_or_imm_T0(void)
1057 {
1058     T0 |= PARAM1;
1059     RETURN();
1060 }
1061
1062 void OPPROTO op_xor_imm_T0(void)
1063 {
1064     T0 ^= PARAM1;
1065     RETURN();
1066 }
1067
1068 void OPPROTO op_tst_imm_T0(void)
1069 {
1070     cond_t((T0 & PARAM1) == 0);
1071     RETURN();
1072 }
1073
1074 void OPPROTO op_raise_illegal_instruction(void)
1075 {
1076     env->exception_index = 0x180;
1077     do_raise_exception();
1078     RETURN();
1079 }
1080
1081 void OPPROTO op_raise_slot_illegal_instruction(void)
1082 {
1083     env->exception_index = 0x1a0;
1084     do_raise_exception();
1085     RETURN();
1086 }
1087
1088 void OPPROTO op_debug(void)
1089 {
1090     env->exception_index = EXCP_DEBUG;
1091     cpu_loop_exit();
1092 }
1093
1094 /* Load and store */
1095 #define MEMSUFFIX _raw
1096 #include "op_mem.c"
1097 #undef MEMSUFFIX
1098 #if !defined(CONFIG_USER_ONLY)
1099 #define MEMSUFFIX _user
1100 #include "op_mem.c"
1101 #undef MEMSUFFIX
1102
1103 #define MEMSUFFIX _kernel
1104 #include "op_mem.c"
1105 #undef MEMSUFFIX
1106 #endif