hw/mips_jazz.c

   1 /*
   2  * QEMU MIPS Jazz support
   3  *
   4  * Copyright (c) 2007-2008 Hervé Poussineau
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #include "hw.h"
  26 #include "mips.h"
  27 #include "pc.h"
  28 #include "isa.h"
  29 #include "fdc.h"
  30 #include "sysemu.h"
  31 #include "audio/audio.h"
  32 #include "boards.h"
  33 #include "net.h"
  34 #include "scsi.h"
  35
  36 #ifdef TARGET_WORDS_BIGENDIAN
  37 #define BIOS_FILENAME "mips_bios.bin"
  38 #else
  39 #define BIOS_FILENAME "mipsel_bios.bin"
  40 #endif
  41
  42 enum jazz_model_e
  43 {
  44     JAZZ_MAGNUM,
  45     JAZZ_PICA61,
  46 };
  47
  48 static void main_cpu_reset(void *opaque)
  49 {
  50     CPUState *env = opaque;
  51     cpu_reset(env);
  52 }
  53
  54 static uint32_t rtc_readb(void *opaque, target_phys_addr_t addr)
  55 {
  56     CPUState *env = opaque;
  57     return cpu_inw(env, 0x71);
  58 }
  59
  60 static void rtc_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
  61 {
  62     CPUState *env = opaque;
  63     cpu_outw(env, 0x71, val & 0xff);
  64 }
  65
  66 static CPUReadMemoryFunc *rtc_read[3] = {
  67     rtc_readb,
  68     rtc_readb,
  69     rtc_readb,
  70 };
  71
  72 static CPUWriteMemoryFunc *rtc_write[3] = {
  73     rtc_writeb,
  74     rtc_writeb,
  75     rtc_writeb,
  76 };
  77
  78 static void dma_dummy_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
  79 {
  80     /* Nothing to do. That is only to ensure that
  81      * the current DMA acknowledge cycle is completed. */
  82 }
  83
  84 static CPUReadMemoryFunc *dma_dummy_read[3] = {
  85     NULL,
  86     NULL,
  87     NULL,
  88 };
  89
  90 static CPUWriteMemoryFunc *dma_dummy_write[3] = {
  91     dma_dummy_writeb,
  92     dma_dummy_writeb,
  93     dma_dummy_writeb,
  94 };
  95
  96 #ifdef HAS_AUDIO
  97 static void audio_init(qemu_irq *pic)
  98 {
  99     struct soundhw *c;
 100     int audio_enabled = 0;
 101
 102     for (c = soundhw; !audio_enabled && c->name; ++c) {
 103         audio_enabled = c->enabled;
 104     }
 105
 106     if (audio_enabled) {
 107         AudioState *s;
 108
 109         s = AUD_init();
 110         if (s) {
 111             for (c = soundhw; c->name; ++c) {
 112                 if (c->enabled) {
 113                     if (c->isa) {
 114                         c->init.init_isa(s, pic);
 115                     }
 116                 }
 117             }
 118         }
 119     }
 120 }
 121 #endif
 122
 123 #define MAGNUM_BIOS_SIZE_MAX 0x7e000
 124 #define MAGNUM_BIOS_SIZE (BIOS_SIZE < MAGNUM_BIOS_SIZE_MAX ? BIOS_SIZE : MAGNUM_BIOS_SIZE_MAX)
 125
 126 static
 127 void mips_jazz_init (ram_addr_t ram_size, int vga_ram_size,
 128                      const char *cpu_model,
 129                      enum jazz_model_e jazz_model)
 130 {
 131     char buf[1024];
 132     int bios_size, n;
 133     CPUState *env;
 134     qemu_irq *rc4030, *i8259;
 135     rc4030_dma *dmas;
 136     void* rc4030_opaque;
 137     void *scsi_hba;
 138     int hd;
 139     int s_rtc, s_dma_dummy;
 140     NICInfo *nd;
 141     PITState *pit;
 142     BlockDriverState *fds[MAX_FD];
 143     qemu_irq esp_reset;
 144     ram_addr_t ram_offset;
 145     ram_addr_t bios_offset;
 146
 147     /* init CPUs */
 148     if (cpu_model == NULL) {
 149 #ifdef TARGET_MIPS64
 150         cpu_model = "R4000";
 151 #else
 152         /* FIXME: All wrong, this maybe should be R3000 for the older JAZZs. */
 153         cpu_model = "24Kf";
 154 #endif
 155     }
 156     env = cpu_init(cpu_model);
 157     if (!env) {
 158         fprintf(stderr, "Unable to find CPU definition\n");
 159         exit(1);
 160     }
 161     qemu_register_reset(main_cpu_reset, env);
 162
 163     /* allocate RAM */
 164     ram_offset = qemu_ram_alloc(ram_size);
 165     cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
 166
 167     bios_offset = qemu_ram_alloc(MAGNUM_BIOS_SIZE);
 168     cpu_register_physical_memory(0x1fc00000LL,
 169                                  MAGNUM_BIOS_SIZE, bios_offset | IO_MEM_ROM);
 170     cpu_register_physical_memory(0xfff00000LL,
 171                                  MAGNUM_BIOS_SIZE, bios_offset | IO_MEM_ROM);
 172
 173     /* load the BIOS image. */
 174     if (bios_name == NULL)
 175         bios_name = BIOS_FILENAME;
 176     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
 177     bios_size = load_image_targphys(buf, 0xfff00000LL, MAGNUM_BIOS_SIZE);
 178     if (bios_size < 0 || bios_size > MAGNUM_BIOS_SIZE) {
 179         fprintf(stderr, "qemu: Could not load MIPS bios '%s'\n",
 180                 buf);
 181         exit(1);
 182     }
 183
 184     /* Init CPU internal devices */
 185     cpu_mips_irq_init_cpu(env);
 186     cpu_mips_clock_init(env);
 187
 188     /* Chipset */
 189     rc4030_opaque = rc4030_init(env->irq[6], env->irq[3], &rc4030, &dmas);
 190     s_dma_dummy = cpu_register_io_memory(0, dma_dummy_read, dma_dummy_write, NULL);
 191     cpu_register_physical_memory(0x8000d000, 0x00001000, s_dma_dummy);
 192
 193     /* ISA devices */
 194     i8259 = i8259_init(env->irq[4]);
 195     DMA_init(0);
 196     pit = pit_init(0x40, i8259[0]);
 197     pcspk_init(pit);
 198
 199     /* ISA IO space at 0x90000000 */
 200     isa_mmio_init(0x90000000, 0x01000000);
 201     isa_mem_base = 0x11000000;
 202
 203     /* Video card */
 204     switch (jazz_model) {
 205     case JAZZ_MAGNUM:
 206         g364fb_mm_init(vga_ram_size, 0x40000000, 0x60000000, 0, rc4030[3]);
 207         break;
 208     case JAZZ_PICA61:
 209         isa_vga_mm_init(vga_ram_size, 0x40000000, 0x60000000, 0);
 210         break;
 211     default:
 212         break;
 213     }
 214
 215     /* Network controller */
 216     for (n = 0; n < nb_nics; n++) {
 217         nd = &nd_table[n];
 218         if (!nd->model)
 219             nd->model = "dp83932";
 220         if (strcmp(nd->model, "dp83932") == 0) {
 221             dp83932_init(nd, 0x80001000, 2, rc4030[4],
 222                          rc4030_opaque, rc4030_dma_memory_rw);
 223             break;
 224         } else if (strcmp(nd->model, "?") == 0) {
 225             fprintf(stderr, "qemu: Supported NICs: dp83932\n");
 226             exit(1);
 227         } else {
 228             fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
 229             exit(1);
 230         }
 231     }
 232
 233     /* SCSI adapter */
 234     scsi_hba = esp_init(0x80002000, 0,
 235                         rc4030_dma_read, rc4030_dma_write, dmas[0],
 236                         rc4030[5], &esp_reset);
 237     for (n = 0; n < ESP_MAX_DEVS; n++) {
 238         hd = drive_get_index(IF_SCSI, 0, n);
 239         if (hd != -1) {
 240             esp_scsi_attach(scsi_hba, drives_table[hd].bdrv, n);
 241         }
 242     }
 243
 244     /* Floppy */
 245     if (drive_get_max_bus(IF_FLOPPY) >= MAX_FD) {
 246         fprintf(stderr, "qemu: too many floppy drives\n");
 247         exit(1);
 248     }
 249     for (n = 0; n < MAX_FD; n++) {
 250         int fd = drive_get_index(IF_FLOPPY, 0, n);
 251         if (fd != -1)
 252             fds[n] = drives_table[fd].bdrv;
 253         else
 254             fds[n] = NULL;
 255     }
 256     fdctrl_init(rc4030[1], 0, 1, 0x80003000, fds);
 257
 258     /* Real time clock */
 259     rtc_init(0x70, i8259[8], 1980);
 260     s_rtc = cpu_register_io_memory(0, rtc_read, rtc_write, env);
 261     cpu_register_physical_memory(0x80004000, 0x00001000, s_rtc);
 262
 263     /* Keyboard (i8042) */
 264     i8042_mm_init(rc4030[6], rc4030[7], 0x80005000, 0x1000, 0x1);
 265
 266     /* Serial ports */
 267     if (serial_hds[0])
 268         serial_mm_init(0x80006000, 0, rc4030[8], 8000000/16, serial_hds[0], 1);
 269     if (serial_hds[1])
 270         serial_mm_init(0x80007000, 0, rc4030[9], 8000000/16, serial_hds[1], 1);
 271
 272     /* Parallel port */
 273     if (parallel_hds[0])
 274         parallel_mm_init(0x80008000, 0, rc4030[0], parallel_hds[0]);
 275
 276     /* Sound card */
 277     /* FIXME: missing Jazz sound at 0x8000c000, rc4030[2] */
 278 #ifdef HAS_AUDIO
 279     audio_init(i8259);
 280 #endif
 281
 282     /* NVRAM: Unprotected at 0x9000, Protected at 0xa000, Read only at 0xb000 */
 283     ds1225y_init(0x80009000, "nvram");
 284
 285     /* LED indicator */
 286     jazz_led_init(0x8000f000);
 287 }
 288
 289 static
 290 void mips_magnum_init (ram_addr_t ram_size, int vga_ram_size,
 291                        const char *boot_device,
 292                        const char *kernel_filename, const char *kernel_cmdline,
 293                        const char *initrd_filename, const char *cpu_model)
 294 {
 295     mips_jazz_init(ram_size, vga_ram_size, cpu_model, JAZZ_MAGNUM);
 296 }
 297
 298 static
 299 void mips_pica61_init (ram_addr_t ram_size, int vga_ram_size,
 300                        const char *boot_device,
 301                        const char *kernel_filename, const char *kernel_cmdline,
 302                        const char *initrd_filename, const char *cpu_model)
 303 {
 304     mips_jazz_init(ram_size, vga_ram_size, cpu_model, JAZZ_PICA61);
 305 }
 306
 307 QEMUMachine mips_magnum_machine = {
 308     .name = "magnum",
 309     .desc = "MIPS Magnum",
 310     .init = mips_magnum_init,
 311     .use_scsi = 1,
 312 };
 313
 314 QEMUMachine mips_pica61_machine = {
 315     .name = "pica61",
 316     .desc = "Acer Pica 61",
 317     .init = mips_pica61_init,
 318     .use_scsi = 1,
 319 };