cache-utils.h

   1 #ifndef QEMU_CACHE_UTILS_H
   2 #define QEMU_CACHE_UTILS_H
   3
   4 #if defined(_ARCH_PPC)
   5 struct qemu_cache_conf {
   6     unsigned long dcache_bsize;
   7     unsigned long icache_bsize;
   8 };
   9
  10 extern struct qemu_cache_conf qemu_cache_conf;
  11
  12 extern void qemu_cache_utils_init(char **envp);
  13
  14 /* mildly adjusted code from tcg-dyngen.c */
  15 static inline void flush_icache_range(unsigned long start, unsigned long stop)
  16 {
  17     unsigned long p, start1, stop1;
  18     unsigned long dsize = qemu_cache_conf.dcache_bsize;
  19     unsigned long isize = qemu_cache_conf.icache_bsize;
  20
  21     start1 = start & ~(dsize - 1);
  22     stop1 = (stop + dsize - 1) & ~(dsize - 1);
  23     for (p = start1; p < stop1; p += dsize) {
  24         asm volatile ("dcbst 0,%0" : : "r"(p) : "memory");
  25     }
  26     asm volatile ("sync" : : : "memory");
  27
  28     start &= start & ~(isize - 1);
  29     stop1 = (stop + isize - 1) & ~(isize - 1);
  30     for (p = start1; p < stop1; p += isize) {
  31         asm volatile ("icbi 0,%0" : : "r"(p) : "memory");
  32     }
  33     asm volatile ("sync" : : : "memory");
  34     asm volatile ("isync" : : : "memory");
  35 }
  36 #define qemu_sync_idcache flush_icache_range
  37 #else
  38
  39 #ifdef __ia64__
  40 static inline void qemu_sync_idcache(unsigned long start, unsigned long stop)
  41 {
  42     while (start < stop) {
  43             asm volatile ("fc %0" :: "r"(start));
  44             start += 32;
  45     }
  46     asm volatile (";;sync.i;;srlz.i;;");
  47 }
  48 #else
  49 static inline void qemu_sync_idcache(unsigned long start, unsigned long stop) {}
  50 #endif
  51
  52 #define qemu_cache_utils_init(envp) do { (void) (envp); } while (0)
  53 #endif
  54
  55 #endif /* QEMU_CACHE_UTILS_H */