gdbstub.c

   1 /*
   2  * gdb server stub
   3  *
   4  * Copyright (c) 2003-2005 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20 #include "config.h"
  21 #ifdef CONFIG_USER_ONLY
  22 #include <stdlib.h>
  23 #include <stdio.h>
  24 #include <stdarg.h>
  25 #include <string.h>
  26 #include <errno.h>
  27 #include <unistd.h>
  28 #include <fcntl.h>
  29
  30 #include "qemu.h"
  31 #else
  32 #include "qemu-common.h"
  33 #include "qemu-char.h"
  34 #include "sysemu.h"
  35 #include "gdbstub.h"
  36 #include "qemu-kvm.h"
  37 #endif
  38
  39 #include "qemu_socket.h"
  40 #ifdef _WIN32
  41 /* XXX: these constants may be independent of the host ones even for Unix */
  42 #ifndef SIGTRAP
  43 #define SIGTRAP 5
  44 #endif
  45 #ifndef SIGINT
  46 #define SIGINT 2
  47 #endif
  48 #else
  49 #include <signal.h>
  50 #endif
  51
  52 //#define DEBUG_GDB
  53
  54 enum RSState {
  55     RS_IDLE,
  56     RS_GETLINE,
  57     RS_CHKSUM1,
  58     RS_CHKSUM2,
  59     RS_SYSCALL,
  60 };
  61 typedef struct GDBState {
  62     CPUState *env; /* current CPU */
  63     enum RSState state; /* parsing state */
  64     char line_buf[4096];
  65     int line_buf_index;
  66     int line_csum;
  67     uint8_t last_packet[4100];
  68     int last_packet_len;
  69 #ifdef CONFIG_USER_ONLY
  70     int fd;
  71     int running_state;
  72 #else
  73     CharDriverState *chr;
  74 #endif
  75 } GDBState;
  76
  77 #ifdef CONFIG_USER_ONLY
  78 /* XXX: This is not thread safe.  Do we care?  */
  79 static int gdbserver_fd = -1;
  80
  81 /* XXX: remove this hack.  */
  82 static GDBState gdbserver_state;
  83
  84 static int get_char(GDBState *s)
  85 {
  86     uint8_t ch;
  87     int ret;
  88
  89     for(;;) {
  90         ret = recv(s->fd, &ch, 1, 0);
  91         if (ret < 0) {
  92             if (errno != EINTR && errno != EAGAIN)
  93                 return -1;
  94         } else if (ret == 0) {
  95             return -1;
  96         } else {
  97             break;
  98         }
  99     }
 100     return ch;
 101 }
 102 #endif
 103
 104 /* GDB stub state for use by semihosting syscalls.  */
 105 static GDBState *gdb_syscall_state;
 106 static gdb_syscall_complete_cb gdb_current_syscall_cb;
 107
 108 enum {
 109     GDB_SYS_UNKNOWN,
 110     GDB_SYS_ENABLED,
 111     GDB_SYS_DISABLED,
 112 } gdb_syscall_mode;
 113
 114 /* If gdb is connected when the first semihosting syscall occurs then use
 115    remote gdb syscalls.  Otherwise use native file IO.  */
 116 int use_gdb_syscalls(void)
 117 {
 118     if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
 119         gdb_syscall_mode = (gdb_syscall_state ? GDB_SYS_ENABLED
 120                                               : GDB_SYS_DISABLED);
 121     }
 122     return gdb_syscall_mode == GDB_SYS_ENABLED;
 123 }
 124
 125 static void put_buffer(GDBState *s, const uint8_t *buf, int len)
 126 {
 127 #ifdef CONFIG_USER_ONLY
 128     int ret;
 129
 130     while (len > 0) {
 131         ret = send(s->fd, buf, len, 0);
 132         if (ret < 0) {
 133             if (errno != EINTR && errno != EAGAIN)
 134                 return;
 135         } else {
 136             buf += ret;
 137             len -= ret;
 138         }
 139     }
 140 #else
 141     qemu_chr_write(s->chr, buf, len);
 142 #endif
 143 }
 144
 145 static inline int fromhex(int v)
 146 {
 147     if (v >= '0' && v <= '9')
 148         return v - '0';
 149     else if (v >= 'A' && v <= 'F')
 150         return v - 'A' + 10;
 151     else if (v >= 'a' && v <= 'f')
 152         return v - 'a' + 10;
 153     else
 154         return 0;
 155 }
 156
 157 static inline int tohex(int v)
 158 {
 159     if (v < 10)
 160         return v + '0';
 161     else
 162         return v - 10 + 'a';
 163 }
 164
 165 static void memtohex(char *buf, const uint8_t *mem, int len)
 166 {
 167     int i, c;
 168     char *q;
 169     q = buf;
 170     for(i = 0; i < len; i++) {
 171         c = mem[i];
 172         *q++ = tohex(c >> 4);
 173         *q++ = tohex(c & 0xf);
 174     }
 175     *q = '\0';
 176 }
 177
 178 static void hextomem(uint8_t *mem, const char *buf, int len)
 179 {
 180     int i;
 181
 182     for(i = 0; i < len; i++) {
 183         mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
 184         buf += 2;
 185     }
 186 }
 187
 188 /* return -1 if error, 0 if OK */
 189 static int put_packet(GDBState *s, char *buf)
 190 {
 191     int len, csum, i;
 192     uint8_t *p;
 193
 194 #ifdef DEBUG_GDB
 195     printf("reply='%s'\n", buf);
 196 #endif
 197
 198     for(;;) {
 199         p = s->last_packet;
 200         *(p++) = '$';
 201         len = strlen(buf);
 202         memcpy(p, buf, len);
 203         p += len;
 204         csum = 0;
 205         for(i = 0; i < len; i++) {
 206             csum += buf[i];
 207         }
 208         *(p++) = '#';
 209         *(p++) = tohex((csum >> 4) & 0xf);
 210         *(p++) = tohex((csum) & 0xf);
 211
 212         s->last_packet_len = p - s->last_packet;
 213         put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
 214
 215 #ifdef CONFIG_USER_ONLY
 216         i = get_char(s);
 217         if (i < 0)
 218             return -1;
 219         if (i == '+')
 220             break;
 221 #else
 222         break;
 223 #endif
 224     }
 225     return 0;
 226 }
 227
 228 #if defined(TARGET_I386)
 229
 230 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 231 {
 232     int i, fpus;
 233     uint32_t *registers = (uint32_t *)mem_buf;
 234
 235 #ifdef TARGET_X86_64
 236     /* This corresponds with amd64_register_info[] in gdb/amd64-tdep.c */
 237     uint64_t *registers64 = (uint64_t *)mem_buf;
 238
 239     if (env->hflags & HF_CS64_MASK) {
 240         registers64[0] = tswap64(env->regs[R_EAX]);
 241         registers64[1] = tswap64(env->regs[R_EBX]);
 242         registers64[2] = tswap64(env->regs[R_ECX]);
 243         registers64[3] = tswap64(env->regs[R_EDX]);
 244         registers64[4] = tswap64(env->regs[R_ESI]);
 245         registers64[5] = tswap64(env->regs[R_EDI]);
 246         registers64[6] = tswap64(env->regs[R_EBP]);
 247         registers64[7] = tswap64(env->regs[R_ESP]);
 248         for(i = 8; i < 16; i++) {
 249             registers64[i] = tswap64(env->regs[i]);
 250         }
 251         registers64[16] = tswap64(env->eip);
 252
 253         registers = (uint32_t *)&registers64[17];
 254         registers[0] = tswap32(env->eflags);
 255         registers[1] = tswap32(env->segs[R_CS].selector);
 256         registers[2] = tswap32(env->segs[R_SS].selector);
 257         registers[3] = tswap32(env->segs[R_DS].selector);
 258         registers[4] = tswap32(env->segs[R_ES].selector);
 259         registers[5] = tswap32(env->segs[R_FS].selector);
 260         registers[6] = tswap32(env->segs[R_GS].selector);
 261         /* XXX: convert floats */
 262         for(i = 0; i < 8; i++) {
 263             memcpy(mem_buf + 16 * 8 + 7 * 4 + i * 10, &env->fpregs[i], 10);
 264         }
 265         registers[27] = tswap32(env->fpuc); /* fctrl */
 266         fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
 267         registers[28] = tswap32(fpus); /* fstat */
 268         registers[29] = 0; /* ftag */
 269         registers[30] = 0; /* fiseg */
 270         registers[31] = 0; /* fioff */
 271         registers[32] = 0; /* foseg */
 272         registers[33] = 0; /* fooff */
 273         registers[34] = 0; /* fop */
 274         for(i = 0; i < 16; i++) {
 275             memcpy(mem_buf + 16 * 8 + 35 * 4 + i * 16, &env->xmm_regs[i], 16);
 276         }
 277         registers[99] = tswap32(env->mxcsr);
 278
 279         return 8 * 17 + 4 * 7 + 10 * 8 + 4 * 8 + 16 * 16 + 4;
 280     }
 281 #endif
 282
 283     for(i = 0; i < 8; i++) {
 284         registers[i] = env->regs[i];
 285     }
 286     registers[8] = env->eip;
 287     registers[9] = env->eflags;
 288     registers[10] = env->segs[R_CS].selector;
 289     registers[11] = env->segs[R_SS].selector;
 290     registers[12] = env->segs[R_DS].selector;
 291     registers[13] = env->segs[R_ES].selector;
 292     registers[14] = env->segs[R_FS].selector;
 293     registers[15] = env->segs[R_GS].selector;
 294     /* XXX: convert floats */
 295     for(i = 0; i < 8; i++) {
 296         memcpy(mem_buf + 16 * 4 + i * 10, &env->fpregs[i], 10);
 297     }
 298     registers[36] = env->fpuc;
 299     fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
 300     registers[37] = fpus;
 301     registers[38] = 0; /* XXX: convert tags */
 302     registers[39] = 0; /* fiseg */
 303     registers[40] = 0; /* fioff */
 304     registers[41] = 0; /* foseg */
 305     registers[42] = 0; /* fooff */
 306     registers[43] = 0; /* fop */
 307
 308     for(i = 0; i < 16; i++)
 309         tswapls(&registers[i]);
 310     for(i = 36; i < 44; i++)
 311         tswapls(&registers[i]);
 312     return 44 * 4;
 313 }
 314
 315 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 316 {
 317     uint32_t *registers = (uint32_t *)mem_buf;
 318     int i;
 319
 320     for(i = 0; i < 8; i++) {
 321         env->regs[i] = tswapl(registers[i]);
 322     }
 323     env->eip = tswapl(registers[8]);
 324     env->eflags = tswapl(registers[9]);
 325 #if defined(CONFIG_USER_ONLY)
 326 #define LOAD_SEG(index, sreg)\
 327             if (tswapl(registers[index]) != env->segs[sreg].selector)\
 328                 cpu_x86_load_seg(env, sreg, tswapl(registers[index]));
 329             LOAD_SEG(10, R_CS);
 330             LOAD_SEG(11, R_SS);
 331             LOAD_SEG(12, R_DS);
 332             LOAD_SEG(13, R_ES);
 333             LOAD_SEG(14, R_FS);
 334             LOAD_SEG(15, R_GS);
 335 #endif
 336 }
 337
 338 #elif defined (TARGET_PPC)
 339 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 340 {
 341     uint32_t *registers = (uint32_t *)mem_buf, tmp;
 342     int i;
 343
 344     /* fill in gprs */
 345     for(i = 0; i < 32; i++) {
 346         registers[i] = tswapl(env->gpr[i]);
 347     }
 348     /* fill in fprs */
 349     for (i = 0; i < 32; i++) {
 350         registers[(i * 2) + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
 351         registers[(i * 2) + 33] = tswapl(*((uint32_t *)&env->fpr[i] + 1));
 352     }
 353     /* nip, msr, ccr, lnk, ctr, xer, mq */
 354     registers[96] = tswapl(env->nip);
 355     registers[97] = tswapl(env->msr);
 356     tmp = 0;
 357     for (i = 0; i < 8; i++)
 358         tmp |= env->crf[i] << (32 - ((i + 1) * 4));
 359     registers[98] = tswapl(tmp);
 360     registers[99] = tswapl(env->lr);
 361     registers[100] = tswapl(env->ctr);
 362     registers[101] = tswapl(ppc_load_xer(env));
 363     registers[102] = 0;
 364
 365     return 103 * 4;
 366 }
 367
 368 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 369 {
 370     uint32_t *registers = (uint32_t *)mem_buf;
 371     int i;
 372
 373     /* fill in gprs */
 374     for (i = 0; i < 32; i++) {
 375         env->gpr[i] = tswapl(registers[i]);
 376     }
 377     /* fill in fprs */
 378     for (i = 0; i < 32; i++) {
 379         *((uint32_t *)&env->fpr[i]) = tswapl(registers[(i * 2) + 32]);
 380         *((uint32_t *)&env->fpr[i] + 1) = tswapl(registers[(i * 2) + 33]);
 381     }
 382     /* nip, msr, ccr, lnk, ctr, xer, mq */
 383     env->nip = tswapl(registers[96]);
 384     ppc_store_msr(env, tswapl(registers[97]));
 385     registers[98] = tswapl(registers[98]);
 386     for (i = 0; i < 8; i++)
 387         env->crf[i] = (registers[98] >> (32 - ((i + 1) * 4))) & 0xF;
 388     env->lr = tswapl(registers[99]);
 389     env->ctr = tswapl(registers[100]);
 390     ppc_store_xer(env, tswapl(registers[101]));
 391 }
 392 #elif defined (TARGET_SPARC)
 393 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 394 {
 395     target_ulong *registers = (target_ulong *)mem_buf;
 396     int i;
 397
 398     /* fill in g0..g7 */
 399     for(i = 0; i < 8; i++) {
 400         registers[i] = tswapl(env->gregs[i]);
 401     }
 402     /* fill in register window */
 403     for(i = 0; i < 24; i++) {
 404         registers[i + 8] = tswapl(env->regwptr[i]);
 405     }
 406 #ifndef TARGET_SPARC64
 407     /* fill in fprs */
 408     for (i = 0; i < 32; i++) {
 409         registers[i + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
 410     }
 411     /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
 412     registers[64] = tswapl(env->y);
 413     {
 414         target_ulong tmp;
 415
 416         tmp = GET_PSR(env);
 417         registers[65] = tswapl(tmp);
 418     }
 419     registers[66] = tswapl(env->wim);
 420     registers[67] = tswapl(env->tbr);
 421     registers[68] = tswapl(env->pc);
 422     registers[69] = tswapl(env->npc);
 423     registers[70] = tswapl(env->fsr);
 424     registers[71] = 0; /* csr */
 425     registers[72] = 0;
 426     return 73 * sizeof(target_ulong);
 427 #else
 428     /* fill in fprs */
 429     for (i = 0; i < 64; i += 2) {
 430         uint64_t tmp;
 431
 432         tmp = ((uint64_t)*(uint32_t *)&env->fpr[i]) << 32;
 433         tmp |= *(uint32_t *)&env->fpr[i + 1];
 434         registers[i / 2 + 32] = tswap64(tmp);
 435     }
 436     registers[64] = tswapl(env->pc);
 437     registers[65] = tswapl(env->npc);
 438     registers[66] = tswapl(((uint64_t)GET_CCR(env) << 32) |
 439                            ((env->asi & 0xff) << 24) |
 440                            ((env->pstate & 0xfff) << 8) |
 441                            GET_CWP64(env));
 442     registers[67] = tswapl(env->fsr);
 443     registers[68] = tswapl(env->fprs);
 444     registers[69] = tswapl(env->y);
 445     return 70 * sizeof(target_ulong);
 446 #endif
 447 }
 448
 449 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 450 {
 451     target_ulong *registers = (target_ulong *)mem_buf;
 452     int i;
 453
 454     /* fill in g0..g7 */
 455     for(i = 0; i < 7; i++) {
 456         env->gregs[i] = tswapl(registers[i]);
 457     }
 458     /* fill in register window */
 459     for(i = 0; i < 24; i++) {
 460         env->regwptr[i] = tswapl(registers[i + 8]);
 461     }
 462 #ifndef TARGET_SPARC64
 463     /* fill in fprs */
 464     for (i = 0; i < 32; i++) {
 465         *((uint32_t *)&env->fpr[i]) = tswapl(registers[i + 32]);
 466     }
 467     /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
 468     env->y = tswapl(registers[64]);
 469     PUT_PSR(env, tswapl(registers[65]));
 470     env->wim = tswapl(registers[66]);
 471     env->tbr = tswapl(registers[67]);
 472     env->pc = tswapl(registers[68]);
 473     env->npc = tswapl(registers[69]);
 474     env->fsr = tswapl(registers[70]);
 475 #else
 476     for (i = 0; i < 64; i += 2) {
 477         uint64_t tmp;
 478
 479         tmp = tswap64(registers[i / 2 + 32]);
 480         *((uint32_t *)&env->fpr[i]) = tmp >> 32;
 481         *((uint32_t *)&env->fpr[i + 1]) = tmp & 0xffffffff;
 482     }
 483     env->pc = tswapl(registers[64]);
 484     env->npc = tswapl(registers[65]);
 485     {
 486         uint64_t tmp = tswapl(registers[66]);
 487
 488         PUT_CCR(env, tmp >> 32);
 489         env->asi = (tmp >> 24) & 0xff;
 490         env->pstate = (tmp >> 8) & 0xfff;
 491         PUT_CWP64(env, tmp & 0xff);
 492     }
 493     env->fsr = tswapl(registers[67]);
 494     env->fprs = tswapl(registers[68]);
 495     env->y = tswapl(registers[69]);
 496 #endif
 497 }
 498 #elif defined (TARGET_ARM)
 499 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 500 {
 501     int i;
 502     uint8_t *ptr;
 503
 504     ptr = mem_buf;
 505     /* 16 core integer registers (4 bytes each).  */
 506     for (i = 0; i < 16; i++)
 507       {
 508         *(uint32_t *)ptr = tswapl(env->regs[i]);
 509         ptr += 4;
 510       }
 511     /* 8 FPA registers (12 bytes each), FPS (4 bytes).
 512        Not yet implemented.  */
 513     memset (ptr, 0, 8 * 12 + 4);
 514     ptr += 8 * 12 + 4;
 515     /* CPSR (4 bytes).  */
 516     *(uint32_t *)ptr = tswapl (cpsr_read(env));
 517     ptr += 4;
 518
 519     return ptr - mem_buf;
 520 }
 521
 522 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 523 {
 524     int i;
 525     uint8_t *ptr;
 526
 527     ptr = mem_buf;
 528     /* Core integer registers.  */
 529     for (i = 0; i < 16; i++)
 530       {
 531         env->regs[i] = tswapl(*(uint32_t *)ptr);
 532         ptr += 4;
 533       }
 534     /* Ignore FPA regs and scr.  */
 535     ptr += 8 * 12 + 4;
 536     cpsr_write (env, tswapl(*(uint32_t *)ptr), 0xffffffff);
 537 }
 538 #elif defined (TARGET_M68K)
 539 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 540 {
 541     int i;
 542     uint8_t *ptr;
 543     CPU_DoubleU u;
 544
 545     ptr = mem_buf;
 546     /* D0-D7 */
 547     for (i = 0; i < 8; i++) {
 548         *(uint32_t *)ptr = tswapl(env->dregs[i]);
 549         ptr += 4;
 550     }
 551     /* A0-A7 */
 552     for (i = 0; i < 8; i++) {
 553         *(uint32_t *)ptr = tswapl(env->aregs[i]);
 554         ptr += 4;
 555     }
 556     *(uint32_t *)ptr = tswapl(env->sr);
 557     ptr += 4;
 558     *(uint32_t *)ptr = tswapl(env->pc);
 559     ptr += 4;
 560     /* F0-F7.  The 68881/68040 have 12-bit extended precision registers.
 561        ColdFire has 8-bit double precision registers.  */
 562     for (i = 0; i < 8; i++) {
 563         u.d = env->fregs[i];
 564         *(uint32_t *)ptr = tswap32(u.l.upper);
 565         *(uint32_t *)ptr = tswap32(u.l.lower);
 566     }
 567     /* FP control regs (not implemented).  */
 568     memset (ptr, 0, 3 * 4);
 569     ptr += 3 * 4;
 570
 571     return ptr - mem_buf;
 572 }
 573
 574 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 575 {
 576     int i;
 577     uint8_t *ptr;
 578     CPU_DoubleU u;
 579
 580     ptr = mem_buf;
 581     /* D0-D7 */
 582     for (i = 0; i < 8; i++) {
 583         env->dregs[i] = tswapl(*(uint32_t *)ptr);
 584         ptr += 4;
 585     }
 586     /* A0-A7 */
 587     for (i = 0; i < 8; i++) {
 588         env->aregs[i] = tswapl(*(uint32_t *)ptr);
 589         ptr += 4;
 590     }
 591     env->sr = tswapl(*(uint32_t *)ptr);
 592     ptr += 4;
 593     env->pc = tswapl(*(uint32_t *)ptr);
 594     ptr += 4;
 595     /* F0-F7.  The 68881/68040 have 12-bit extended precision registers.
 596        ColdFire has 8-bit double precision registers.  */
 597     for (i = 0; i < 8; i++) {
 598         u.l.upper = tswap32(*(uint32_t *)ptr);
 599         u.l.lower = tswap32(*(uint32_t *)ptr);
 600         env->fregs[i] = u.d;
 601     }
 602     /* FP control regs (not implemented).  */
 603     ptr += 3 * 4;
 604 }
 605 #elif defined (TARGET_MIPS)
 606 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 607 {
 608     int i;
 609     uint8_t *ptr;
 610
 611     ptr = mem_buf;
 612     for (i = 0; i < 32; i++)
 613       {
 614         *(target_ulong *)ptr = tswapl(env->gpr[env->current_tc][i]);
 615         ptr += sizeof(target_ulong);
 616       }
 617
 618     *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_Status);
 619     ptr += sizeof(target_ulong);
 620
 621     *(target_ulong *)ptr = tswapl(env->LO[env->current_tc][0]);
 622     ptr += sizeof(target_ulong);
 623
 624     *(target_ulong *)ptr = tswapl(env->HI[env->current_tc][0]);
 625     ptr += sizeof(target_ulong);
 626
 627     *(target_ulong *)ptr = tswapl(env->CP0_BadVAddr);
 628     ptr += sizeof(target_ulong);
 629
 630     *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_Cause);
 631     ptr += sizeof(target_ulong);
 632
 633     *(target_ulong *)ptr = tswapl(env->PC[env->current_tc]);
 634     ptr += sizeof(target_ulong);
 635
 636     if (env->CP0_Config1 & (1 << CP0C1_FP))
 637       {
 638         for (i = 0; i < 32; i++)
 639           {
 640             if (env->CP0_Status & (1 << CP0St_FR))
 641               *(target_ulong *)ptr = tswapl(env->fpu->fpr[i].d);
 642             else
 643               *(target_ulong *)ptr = tswap32(env->fpu->fpr[i].w[FP_ENDIAN_IDX]);
 644             ptr += sizeof(target_ulong);
 645           }
 646
 647         *(target_ulong *)ptr = (int32_t)tswap32(env->fpu->fcr31);
 648         ptr += sizeof(target_ulong);
 649
 650         *(target_ulong *)ptr = (int32_t)tswap32(env->fpu->fcr0);
 651         ptr += sizeof(target_ulong);
 652       }
 653
 654     /* "fp", pseudo frame pointer. Not yet implemented in gdb. */
 655     *(target_ulong *)ptr = 0;
 656     ptr += sizeof(target_ulong);
 657
 658     /* Registers for embedded use, we just pad them. */
 659     for (i = 0; i < 16; i++)
 660       {
 661         *(target_ulong *)ptr = 0;
 662         ptr += sizeof(target_ulong);
 663       }
 664
 665     /* Processor ID. */
 666     *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_PRid);
 667     ptr += sizeof(target_ulong);
 668
 669     return ptr - mem_buf;
 670 }
 671
 672 /* convert MIPS rounding mode in FCR31 to IEEE library */
 673 static unsigned int ieee_rm[] =
 674   {
 675     float_round_nearest_even,
 676     float_round_to_zero,
 677     float_round_up,
 678     float_round_down
 679   };
 680 #define RESTORE_ROUNDING_MODE \
 681     set_float_rounding_mode(ieee_rm[env->fpu->fcr31 & 3], &env->fpu->fp_status)
 682
 683 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 684 {
 685     int i;
 686     uint8_t *ptr;
 687
 688     ptr = mem_buf;
 689     for (i = 0; i < 32; i++)
 690       {
 691         env->gpr[env->current_tc][i] = tswapl(*(target_ulong *)ptr);
 692         ptr += sizeof(target_ulong);
 693       }
 694
 695     env->CP0_Status = tswapl(*(target_ulong *)ptr);
 696     ptr += sizeof(target_ulong);
 697
 698     env->LO[env->current_tc][0] = tswapl(*(target_ulong *)ptr);
 699     ptr += sizeof(target_ulong);
 700
 701     env->HI[env->current_tc][0] = tswapl(*(target_ulong *)ptr);
 702     ptr += sizeof(target_ulong);
 703
 704     env->CP0_BadVAddr = tswapl(*(target_ulong *)ptr);
 705     ptr += sizeof(target_ulong);
 706
 707     env->CP0_Cause = tswapl(*(target_ulong *)ptr);
 708     ptr += sizeof(target_ulong);
 709
 710     env->PC[env->current_tc] = tswapl(*(target_ulong *)ptr);
 711     ptr += sizeof(target_ulong);
 712
 713     if (env->CP0_Config1 & (1 << CP0C1_FP))
 714       {
 715         for (i = 0; i < 32; i++)
 716           {
 717             if (env->CP0_Status & (1 << CP0St_FR))
 718               env->fpu->fpr[i].d = tswapl(*(target_ulong *)ptr);
 719             else
 720               env->fpu->fpr[i].w[FP_ENDIAN_IDX] = tswapl(*(target_ulong *)ptr);
 721             ptr += sizeof(target_ulong);
 722           }
 723
 724         env->fpu->fcr31 = tswapl(*(target_ulong *)ptr) & 0xFF83FFFF;
 725         ptr += sizeof(target_ulong);
 726
 727         /* The remaining registers are assumed to be read-only. */
 728
 729         /* set rounding mode */
 730         RESTORE_ROUNDING_MODE;
 731
 732 #ifndef CONFIG_SOFTFLOAT
 733         /* no floating point exception for native float */
 734         SET_FP_ENABLE(env->fcr31, 0);
 735 #endif
 736       }
 737 }
 738 #elif defined (TARGET_SH4)
 739
 740 /* Hint: Use "set architecture sh4" in GDB to see fpu registers */
 741
 742 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 743 {
 744   uint32_t *ptr = (uint32_t *)mem_buf;
 745   int i;
 746
 747 #define SAVE(x) *ptr++=tswapl(x)
 748   if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
 749       for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
 750   } else {
 751       for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
 752   }
 753   for (i = 8; i < 16; i++) SAVE(env->gregs[i]);
 754   SAVE (env->pc);
 755   SAVE (env->pr);
 756   SAVE (env->gbr);
 757   SAVE (env->vbr);
 758   SAVE (env->mach);
 759   SAVE (env->macl);
 760   SAVE (env->sr);
 761   SAVE (env->fpul);
 762   SAVE (env->fpscr);
 763   for (i = 0; i < 16; i++)
 764       SAVE(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
 765   SAVE (env->ssr);
 766   SAVE (env->spc);
 767   for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
 768   for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
 769   return ((uint8_t *)ptr - mem_buf);
 770 }
 771
 772 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 773 {
 774   uint32_t *ptr = (uint32_t *)mem_buf;
 775   int i;
 776
 777 #define LOAD(x) (x)=*ptr++;
 778   if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
 779       for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
 780   } else {
 781       for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
 782   }
 783   for (i = 8; i < 16; i++) LOAD(env->gregs[i]);
 784   LOAD (env->pc);
 785   LOAD (env->pr);
 786   LOAD (env->gbr);
 787   LOAD (env->vbr);
 788   LOAD (env->mach);
 789   LOAD (env->macl);
 790   LOAD (env->sr);
 791   LOAD (env->fpul);
 792   LOAD (env->fpscr);
 793   for (i = 0; i < 16; i++)
 794       LOAD(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
 795   LOAD (env->ssr);
 796   LOAD (env->spc);
 797   for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
 798   for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
 799 }
 800 #elif defined (TARGET_CRIS)
 801
 802 static int cris_save_32 (unsigned char *d, uint32_t value)
 803 {
 804         *d++ = (value);
 805         *d++ = (value >>= 8);
 806         *d++ = (value >>= 8);
 807         *d++ = (value >>= 8);
 808         return 4;
 809 }
 810 static int cris_save_16 (unsigned char *d, uint32_t value)
 811 {
 812         *d++ = (value);
 813         *d++ = (value >>= 8);
 814         return 2;
 815 }
 816 static int cris_save_8 (unsigned char *d, uint32_t value)
 817 {
 818         *d++ = (value);
 819         return 1;
 820 }
 821
 822 /* FIXME: this will bug on archs not supporting unaligned word accesses.  */
 823 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 824 {
 825   uint8_t *ptr = mem_buf;
 826   uint8_t srs;
 827   int i;
 828
 829   for (i = 0; i < 16; i++)
 830           ptr += cris_save_32 (ptr, env->regs[i]);
 831
 832   srs = env->pregs[PR_SRS];
 833
 834   ptr += cris_save_8 (ptr, env->pregs[0]);
 835   ptr += cris_save_8 (ptr, env->pregs[1]);
 836   ptr += cris_save_32 (ptr, env->pregs[2]);
 837   ptr += cris_save_8 (ptr, srs);
 838   ptr += cris_save_16 (ptr, env->pregs[4]);
 839
 840   for (i = 5; i < 16; i++)
 841           ptr += cris_save_32 (ptr, env->pregs[i]);
 842
 843   ptr += cris_save_32 (ptr, env->pc);
 844
 845   for (i = 0; i < 16; i++)
 846           ptr += cris_save_32 (ptr, env->sregs[srs][i]);
 847
 848   return ((uint8_t *)ptr - mem_buf);
 849 }
 850
 851 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 852 {
 853   uint32_t *ptr = (uint32_t *)mem_buf;
 854   int i;
 855
 856 #define LOAD(x) (x)=*ptr++;
 857   for (i = 0; i < 16; i++) LOAD(env->regs[i]);
 858   LOAD (env->pc);
 859 }
 860 #else
 861 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 862 {
 863     return 0;
 864 }
 865
 866 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 867 {
 868 }
 869
 870 #endif
 871
 872 static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf)
 873 {
 874     const char *p;
 875     int ch, reg_size, type;
 876     char buf[4096];
 877     uint8_t mem_buf[4096];
 878     uint32_t *registers;
 879     target_ulong addr, len;
 880
 881 #ifdef DEBUG_GDB
 882     printf("command='%s'\n", line_buf);
 883 #endif
 884     p = line_buf;
 885     ch = *p++;
 886     switch(ch) {
 887     case '?':
 888         /* TODO: Make this return the correct value for user-mode.  */
 889         snprintf(buf, sizeof(buf), "S%02x", SIGTRAP);
 890         put_packet(s, buf);
 891         break;
 892     case 'c':
 893         if (*p != '\0') {
 894             addr = strtoull(p, (char **)&p, 16);
 895 #if defined(TARGET_I386)
 896             env->eip = addr;
 897             if (kvm_enabled())
 898                 kvm_load_registers(env);
 899 #elif defined (TARGET_PPC)
 900             env->nip = addr;
 901 #elif defined (TARGET_SPARC)
 902             env->pc = addr;
 903             env->npc = addr + 4;
 904 #elif defined (TARGET_ARM)
 905             env->regs[15] = addr;
 906 #elif defined (TARGET_SH4)
 907             env->pc = addr;
 908 #elif defined (TARGET_MIPS)
 909             env->PC[env->current_tc] = addr;
 910 #elif defined (TARGET_CRIS)
 911             env->pc = addr;
 912 #endif
 913         }
 914 #ifdef CONFIG_USER_ONLY
 915         s->running_state = 1;
 916 #else
 917         vm_start();
 918 #endif
 919         return RS_IDLE;
 920     case 's':
 921         if (*p != '\0') {
 922             addr = strtoull(p, (char **)&p, 16);
 923 #if defined(TARGET_I386)
 924             env->eip = addr;
 925             if (kvm_enabled())
 926                 kvm_load_registers(env);
 927 #elif defined (TARGET_PPC)
 928             env->nip = addr;
 929 #elif defined (TARGET_SPARC)
 930             env->pc = addr;
 931             env->npc = addr + 4;
 932 #elif defined (TARGET_ARM)
 933             env->regs[15] = addr;
 934 #elif defined (TARGET_SH4)
 935             env->pc = addr;
 936 #elif defined (TARGET_MIPS)
 937             env->PC[env->current_tc] = addr;
 938 #elif defined (TARGET_CRIS)
 939             env->pc = addr;
 940 #endif
 941         }
 942         cpu_single_step(env, 1);
 943 #ifdef CONFIG_USER_ONLY
 944         s->running_state = 1;
 945 #else
 946         vm_start();
 947 #endif
 948         return RS_IDLE;
 949     case 'F':
 950         {
 951             target_ulong ret;
 952             target_ulong err;
 953
 954             ret = strtoull(p, (char **)&p, 16);
 955             if (*p == ',') {
 956                 p++;
 957                 err = strtoull(p, (char **)&p, 16);
 958             } else {
 959                 err = 0;
 960             }
 961             if (*p == ',')
 962                 p++;
 963             type = *p;
 964             if (gdb_current_syscall_cb)
 965                 gdb_current_syscall_cb(s->env, ret, err);
 966             if (type == 'C') {
 967                 put_packet(s, "T02");
 968             } else {
 969 #ifdef CONFIG_USER_ONLY
 970                 s->running_state = 1;
 971 #else
 972                 vm_start();
 973 #endif
 974             }
 975         }
 976         break;
 977     case 'g':
 978         if (kvm_enabled())
 979             kvm_save_registers(env);
 980         reg_size = cpu_gdb_read_registers(env, mem_buf);
 981         memtohex(buf, mem_buf, reg_size);
 982         put_packet(s, buf);
 983         break;
 984     case 'G':
 985         registers = (void *)mem_buf;
 986         len = strlen(p) / 2;
 987         hextomem((uint8_t *)registers, p, len);
 988         cpu_gdb_write_registers(env, mem_buf, len);
 989         if (kvm_enabled())
 990             kvm_load_registers(env);
 991         put_packet(s, "OK");
 992         break;
 993     case 'm':
 994         addr = strtoull(p, (char **)&p, 16);
 995         if (*p == ',')
 996             p++;
 997         len = strtoull(p, NULL, 16);
 998         if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) {
 999             put_packet (s, "E14");
1000         } else {
1001             memtohex(buf, mem_buf, len);
1002             put_packet(s, buf);
1003         }
1004         break;
1005     case 'M':
1006         addr = strtoull(p, (char **)&p, 16);
1007         if (*p == ',')
1008             p++;
1009         len = strtoull(p, (char **)&p, 16);
1010         if (*p == ':')
1011             p++;
1012         hextomem(mem_buf, p, len);
1013         if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0)
1014             put_packet(s, "E14");
1015         else
1016             put_packet(s, "OK");
1017         break;
1018     case 'Z':
1019         type = strtoul(p, (char **)&p, 16);
1020         if (*p == ',')
1021             p++;
1022         addr = strtoull(p, (char **)&p, 16);
1023         if (*p == ',')
1024             p++;
1025         len = strtoull(p, (char **)&p, 16);
1026         if (type == 0 || type == 1) {
1027             if (cpu_breakpoint_insert(env, addr) < 0)
1028                 goto breakpoint_error;
1029             put_packet(s, "OK");
1030 #ifndef CONFIG_USER_ONLY
1031         } else if (type == 2) {
1032             if (cpu_watchpoint_insert(env, addr) < 0)
1033                 goto breakpoint_error;
1034             put_packet(s, "OK");
1035 #endif
1036         } else {
1037         breakpoint_error:
1038             put_packet(s, "E22");
1039         }
1040         break;
1041     case 'z':
1042         type = strtoul(p, (char **)&p, 16);
1043         if (*p == ',')
1044             p++;
1045         addr = strtoull(p, (char **)&p, 16);
1046         if (*p == ',')
1047             p++;
1048         len = strtoull(p, (char **)&p, 16);
1049         if (type == 0 || type == 1) {
1050             cpu_breakpoint_remove(env, addr);
1051             put_packet(s, "OK");
1052 #ifndef CONFIG_USER_ONLY
1053         } else if (type == 2) {
1054             cpu_watchpoint_remove(env, addr);
1055             put_packet(s, "OK");
1056 #endif
1057         } else {
1058             goto breakpoint_error;
1059         }
1060         break;
1061 #ifdef CONFIG_LINUX_USER
1062     case 'q':
1063         if (strncmp(p, "Offsets", 7) == 0) {
1064             TaskState *ts = env->opaque;
1065
1066             sprintf(buf,
1067                     "Text=" TARGET_ABI_FMT_lx ";Data=" TARGET_ABI_FMT_lx
1068                     ";Bss=" TARGET_ABI_FMT_lx,
1069                     ts->info->code_offset,
1070                     ts->info->data_offset,
1071                     ts->info->data_offset);
1072             put_packet(s, buf);
1073             break;
1074         }
1075         /* Fall through.  */
1076 #endif
1077     default:
1078         //        unknown_command:
1079         /* put empty packet */
1080         buf[0] = '\0';
1081         put_packet(s, buf);
1082         break;
1083     }
1084     return RS_IDLE;
1085 }
1086
1087 extern void tb_flush(CPUState *env);
1088
1089 #ifndef CONFIG_USER_ONLY
1090 static void gdb_vm_stopped(void *opaque, int reason)
1091 {
1092     GDBState *s = opaque;
1093     char buf[256];
1094     int ret;
1095
1096     if (s->state == RS_SYSCALL)
1097         return;
1098
1099     /* disable single step if it was enable */
1100     cpu_single_step(s->env, 0);
1101
1102     if (reason == EXCP_DEBUG) {
1103         if (s->env->watchpoint_hit) {
1104             snprintf(buf, sizeof(buf), "T%02xwatch:" TARGET_FMT_lx ";",
1105                      SIGTRAP,
1106                      s->env->watchpoint[s->env->watchpoint_hit - 1].vaddr);
1107             put_packet(s, buf);
1108             s->env->watchpoint_hit = 0;
1109             return;
1110         }
1111         tb_flush(s->env);
1112         ret = SIGTRAP;
1113     } else if (reason == EXCP_INTERRUPT) {
1114         ret = SIGINT;
1115     } else {
1116         ret = 0;
1117     }
1118     snprintf(buf, sizeof(buf), "S%02x", ret);
1119     put_packet(s, buf);
1120 }
1121 #endif
1122
1123 /* Send a gdb syscall request.
1124    This accepts limited printf-style format specifiers, specifically:
1125     %x  - target_ulong argument printed in hex.
1126     %lx - 64-bit argument printed in hex.
1127     %s  - string pointer (target_ulong) and length (int) pair.  */
1128 void gdb_do_syscall(gdb_syscall_complete_cb cb, char *fmt, ...)
1129 {
1130     va_list va;
1131     char buf[256];
1132     char *p;
1133     target_ulong addr;
1134     uint64_t i64;
1135     GDBState *s;
1136
1137     s = gdb_syscall_state;
1138     if (!s)
1139         return;
1140     gdb_current_syscall_cb = cb;
1141     s->state = RS_SYSCALL;
1142 #ifndef CONFIG_USER_ONLY
1143     vm_stop(EXCP_DEBUG);
1144 #endif
1145     s->state = RS_IDLE;
1146     va_start(va, fmt);
1147     p = buf;
1148     *(p++) = 'F';
1149     while (*fmt) {
1150         if (*fmt == '%') {
1151             fmt++;
1152             switch (*fmt++) {
1153             case 'x':
1154                 addr = va_arg(va, target_ulong);
1155                 p += sprintf(p, TARGET_FMT_lx, addr);
1156                 break;
1157             case 'l':
1158                 if (*(fmt++) != 'x')
1159                     goto bad_format;
1160                 i64 = va_arg(va, uint64_t);
1161                 p += sprintf(p, "%" PRIx64, i64);
1162                 break;
1163             case 's':
1164                 addr = va_arg(va, target_ulong);
1165                 p += sprintf(p, TARGET_FMT_lx "/%x", addr, va_arg(va, int));
1166                 break;
1167             default:
1168             bad_format:
1169                 fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
1170                         fmt - 1);
1171                 break;
1172             }
1173         } else {
1174             *(p++) = *(fmt++);
1175         }
1176     }
1177     *p = 0;
1178     va_end(va);
1179     put_packet(s, buf);
1180 #ifdef CONFIG_USER_ONLY
1181     gdb_handlesig(s->env, 0);
1182 #else
1183     cpu_interrupt(s->env, CPU_INTERRUPT_EXIT);
1184 #endif
1185 }
1186
1187 static void gdb_read_byte(GDBState *s, int ch)
1188 {
1189     CPUState *env = s->env;
1190     int i, csum;
1191     uint8_t reply;
1192
1193 #ifndef CONFIG_USER_ONLY
1194     if (s->last_packet_len) {
1195         /* Waiting for a response to the last packet.  If we see the start
1196            of a new command then abandon the previous response.  */
1197         if (ch == '-') {
1198 #ifdef DEBUG_GDB
1199             printf("Got NACK, retransmitting\n");
1200 #endif
1201             put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
1202         }
1203 #ifdef DEBUG_GDB
1204         else if (ch == '+')
1205             printf("Got ACK\n");
1206         else
1207             printf("Got '%c' when expecting ACK/NACK\n", ch);
1208 #endif
1209         if (ch == '+' || ch == '$')
1210             s->last_packet_len = 0;
1211         if (ch != '$')
1212             return;
1213     }
1214     if (vm_running) {
1215         /* when the CPU is running, we cannot do anything except stop
1216            it when receiving a char */
1217         vm_stop(EXCP_INTERRUPT);
1218     } else
1219 #endif
1220     {
1221         switch(s->state) {
1222         case RS_IDLE:
1223             if (ch == '$') {
1224                 s->line_buf_index = 0;
1225                 s->state = RS_GETLINE;
1226             }
1227             break;
1228         case RS_GETLINE:
1229             if (ch == '#') {
1230             s->state = RS_CHKSUM1;
1231             } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
1232                 s->state = RS_IDLE;
1233             } else {
1234             s->line_buf[s->line_buf_index++] = ch;
1235             }
1236             break;
1237         case RS_CHKSUM1:
1238             s->line_buf[s->line_buf_index] = '\0';
1239             s->line_csum = fromhex(ch) << 4;
1240             s->state = RS_CHKSUM2;
1241             break;
1242         case RS_CHKSUM2:
1243             s->line_csum |= fromhex(ch);
1244             csum = 0;
1245             for(i = 0; i < s->line_buf_index; i++) {
1246                 csum += s->line_buf[i];
1247             }
1248             if (s->line_csum != (csum & 0xff)) {
1249                 reply = '-';
1250                 put_buffer(s, &reply, 1);
1251                 s->state = RS_IDLE;
1252             } else {
1253                 reply = '+';
1254                 put_buffer(s, &reply, 1);
1255                 s->state = gdb_handle_packet(s, env, s->line_buf);
1256             }
1257             break;
1258         default:
1259             abort();
1260         }
1261     }
1262 }
1263
1264 #ifdef CONFIG_USER_ONLY
1265 int
1266 gdb_handlesig (CPUState *env, int sig)
1267 {
1268   GDBState *s;
1269   char buf[256];
1270   int n;
1271
1272   if (gdbserver_fd < 0)
1273     return sig;
1274
1275   s = &gdbserver_state;
1276
1277   /* disable single step if it was enabled */
1278   cpu_single_step(env, 0);
1279   tb_flush(env);
1280
1281   if (sig != 0)
1282     {
1283       snprintf(buf, sizeof(buf), "S%02x", sig);
1284       put_packet(s, buf);
1285     }
1286
1287   sig = 0;
1288   s->state = RS_IDLE;
1289   s->running_state = 0;
1290   while (s->running_state == 0) {
1291       n = read (s->fd, buf, 256);
1292       if (n > 0)
1293         {
1294           int i;
1295
1296           for (i = 0; i < n; i++)
1297             gdb_read_byte (s, buf[i]);
1298         }
1299       else if (n == 0 || errno != EAGAIN)
1300         {
1301           /* XXX: Connection closed.  Should probably wait for annother
1302              connection before continuing.  */
1303           return sig;
1304         }
1305   }
1306   return sig;
1307 }
1308
1309 /* Tell the remote gdb that the process has exited.  */
1310 void gdb_exit(CPUState *env, int code)
1311 {
1312   GDBState *s;
1313   char buf[4];
1314
1315   if (gdbserver_fd < 0)
1316     return;
1317
1318   s = &gdbserver_state;
1319
1320   snprintf(buf, sizeof(buf), "W%02x", code);
1321   put_packet(s, buf);
1322 }
1323
1324
1325 static void gdb_accept(void *opaque)
1326 {
1327     GDBState *s;
1328     struct sockaddr_in sockaddr;
1329     socklen_t len;
1330     int val, fd;
1331
1332     for(;;) {
1333         len = sizeof(sockaddr);
1334         fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
1335         if (fd < 0 && errno != EINTR) {
1336             perror("accept");
1337             return;
1338         } else if (fd >= 0) {
1339             break;
1340         }
1341     }
1342
1343     /* set short latency */
1344     val = 1;
1345     setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val));
1346
1347     s = &gdbserver_state;
1348     memset (s, 0, sizeof (GDBState));
1349     s->env = first_cpu; /* XXX: allow to change CPU */
1350     s->fd = fd;
1351
1352     gdb_syscall_state = s;
1353
1354     fcntl(fd, F_SETFL, O_NONBLOCK);
1355 }
1356
1357 static int gdbserver_open(int port)
1358 {
1359     struct sockaddr_in sockaddr;
1360     int fd, val, ret;
1361
1362     fd = socket(PF_INET, SOCK_STREAM, 0);
1363     if (fd < 0) {
1364         perror("socket");
1365         return -1;
1366     }
1367
1368     /* allow fast reuse */
1369     val = 1;
1370     setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val));
1371
1372     sockaddr.sin_family = AF_INET;
1373     sockaddr.sin_port = htons(port);
1374     sockaddr.sin_addr.s_addr = 0;
1375     ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
1376     if (ret < 0) {
1377         perror("bind");
1378         return -1;
1379     }
1380     ret = listen(fd, 0);
1381     if (ret < 0) {
1382         perror("listen");
1383         return -1;
1384     }
1385     return fd;
1386 }
1387
1388 int gdbserver_start(int port)
1389 {
1390     gdbserver_fd = gdbserver_open(port);
1391     if (gdbserver_fd < 0)
1392         return -1;
1393     /* accept connections */
1394     gdb_accept (NULL);
1395     return 0;
1396 }
1397 #else
1398 static int gdb_chr_can_receive(void *opaque)
1399 {
1400   return 1;
1401 }
1402
1403 static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size)
1404 {
1405     GDBState *s = opaque;
1406     int i;
1407
1408     for (i = 0; i < size; i++) {
1409         gdb_read_byte(s, buf[i]);
1410     }
1411 }
1412
1413 static void gdb_chr_event(void *opaque, int event)
1414 {
1415     switch (event) {
1416     case CHR_EVENT_RESET:
1417         vm_stop(EXCP_INTERRUPT);
1418         gdb_syscall_state = opaque;
1419         break;
1420     default:
1421         break;
1422     }
1423 }
1424
1425 int gdbserver_start(const char *port)
1426 {
1427     GDBState *s;
1428     char gdbstub_port_name[128];
1429     int port_num;
1430     char *p;
1431     CharDriverState *chr;
1432
1433     if (!port || !*port)
1434       return -1;
1435
1436     port_num = strtol(port, &p, 10);
1437     if (*p == 0) {
1438         /* A numeric value is interpreted as a port number.  */
1439         snprintf(gdbstub_port_name, sizeof(gdbstub_port_name),
1440                  "tcp::%d,nowait,nodelay,server", port_num);
1441         port = gdbstub_port_name;
1442     }
1443
1444     chr = qemu_chr_open(port);
1445     if (!chr)
1446         return -1;
1447
1448     s = qemu_mallocz(sizeof(GDBState));
1449     if (!s) {
1450         return -1;
1451     }
1452     s->env = first_cpu; /* XXX: allow to change CPU */
1453     s->chr = chr;
1454     qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive,
1455                           gdb_chr_event, s);
1456     qemu_add_vm_stop_handler(gdb_vm_stopped, s);
1457     return 0;
1458 }
1459 #endif