hw/ipf.c

   1 /*
   2  * Itanium Platforma Emulator derived from QEMU PC System Emulator
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  *
   6  * Copyright (c) 2007 Intel
   7  * Ported for IA64 Platform Zhang Xiantao <xiantao.zhang@intel.com>
   8  *
   9  * Permission is hereby granted, free of charge, to any person obtaining a copy
  10  * of this software and associated documentation files (the "Software"), to deal
  11  * in the Software without restriction, including without limitation the rights
  12  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  13  * copies of the Software, and to permit persons to whom the Software is
  14  * furnished to do so, subject to the following conditions:
  15  *
  16  * The above copyright notice and this permission notice shall be included in
  17  * all copies or substantial portions of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  22  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  23  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  24  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  25  * THE SOFTWARE.
  26  */
  27
  28 #include "hw.h"
  29 #include "pc.h"
  30 #include "fdc.h"
  31 #include "pci.h"
  32 #include "block.h"
  33 #include "sysemu.h"
  34 #include "audio/audio.h"
  35 #include "net.h"
  36 #include "smbus.h"
  37 #include "boards.h"
  38 #include "firmware.h"
  39 #include "ia64intrin.h"
  40 #include "dyngen.h"
  41 #include <unistd.h>
  42
  43 #ifdef USE_KVM
  44 #include "qemu-kvm.h"
  45 extern int kvm_allowed;
  46 #endif
  47
  48 #define FW_FILENAME "Flash.fd"
  49
  50 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables.  */
  51 #define ACPI_DATA_SIZE       0x10000
  52
  53 #define MAX_IDE_BUS 2
  54
  55 static fdctrl_t *floppy_controller;
  56 static RTCState *rtc_state;
  57 static PCIDevice *i440fx_state;
  58
  59 static void pic_irq_request(void *opaque, int irq, int level)
  60 {
  61         fprintf(stderr,"pic_irq_request called!\n");
  62 }
  63
  64 /* PC cmos mappings */
  65
  66 #define REG_EQUIPMENT_BYTE          0x14
  67
  68 static int cmos_get_fd_drive_type(int fd0)
  69 {
  70     int val;
  71
  72     switch (fd0) {
  73     case 0:
  74         /* 1.44 Mb 3"5 drive */
  75         val = 4;
  76         break;
  77     case 1:
  78         /* 2.88 Mb 3"5 drive */
  79         val = 5;
  80         break;
  81     case 2:
  82         /* 1.2 Mb 5"5 drive */
  83         val = 2;
  84         break;
  85     default:
  86         val = 0;
  87         break;
  88     }
  89     return val;
  90 }
  91
  92 static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
  93 {
  94     RTCState *s = rtc_state;
  95     int cylinders, heads, sectors;
  96     bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
  97     rtc_set_memory(s, type_ofs, 47);
  98     rtc_set_memory(s, info_ofs, cylinders);
  99     rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
 100     rtc_set_memory(s, info_ofs + 2, heads);
 101     rtc_set_memory(s, info_ofs + 3, 0xff);
 102     rtc_set_memory(s, info_ofs + 4, 0xff);
 103     rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
 104     rtc_set_memory(s, info_ofs + 6, cylinders);
 105     rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
 106     rtc_set_memory(s, info_ofs + 8, sectors);
 107 }
 108
 109 /* convert boot_device letter to something recognizable by the bios */
 110 static int boot_device2nibble(char boot_device)
 111 {
 112     switch(boot_device) {
 113     case 'a':
 114     case 'b':
 115         return 0x01; /* floppy boot */
 116     case 'c':
 117         return 0x02; /* hard drive boot */
 118     case 'd':
 119         return 0x03; /* CD-ROM boot */
 120     case 'n':
 121         return 0x04; /* Network boot */
 122     }
 123     return 0;
 124 }
 125
 126 /* hd_table must contain 4 block drivers */
 127 static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
 128                       const char *boot_device, BlockDriverState **hd_table,
 129                       int smp_cpus)
 130 {
 131     RTCState *s = rtc_state;
 132     int nbds, bds[3] = { 0, };
 133     int val;
 134     int fd0, fd1, nb;
 135     int i;
 136
 137     /* various important CMOS locations needed by PC/Bochs bios */
 138
 139     /* memory size */
 140     val = 640; /* base memory in K */
 141     rtc_set_memory(s, 0x15, val);
 142     rtc_set_memory(s, 0x16, val >> 8);
 143
 144     val = (ram_size / 1024) - 1024;
 145     if (val > 65535)
 146         val = 65535;
 147     rtc_set_memory(s, 0x17, val);
 148     rtc_set_memory(s, 0x18, val >> 8);
 149     rtc_set_memory(s, 0x30, val);
 150     rtc_set_memory(s, 0x31, val >> 8);
 151
 152     if (above_4g_mem_size) {
 153         rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16);
 154         rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24);
 155         rtc_set_memory(s, 0x5d, above_4g_mem_size >> 32);
 156     }
 157     rtc_set_memory(s, 0x5f, smp_cpus - 1);
 158
 159     if (ram_size > (16 * 1024 * 1024))
 160         val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
 161     else
 162         val = 0;
 163     if (val > 65535)
 164         val = 65535;
 165     rtc_set_memory(s, 0x34, val);
 166     rtc_set_memory(s, 0x35, val >> 8);
 167
 168     /* set boot devices, and disable floppy signature check if requested */
 169 #define PC_MAX_BOOT_DEVICES 3
 170     nbds = strlen(boot_device);
 171     if (nbds > PC_MAX_BOOT_DEVICES) {
 172         fprintf(stderr, "Too many boot devices for PC\n");
 173         exit(1);
 174     }
 175     for (i = 0; i < nbds; i++) {
 176         bds[i] = boot_device2nibble(boot_device[i]);
 177         if (bds[i] == 0) {
 178             fprintf(stderr, "Invalid boot device for PC: '%c'\n",
 179                     boot_device[i]);
 180             exit(1);
 181         }
 182     }
 183     rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
 184     rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ?  0x0 : 0x1));
 185
 186     /* floppy type */
 187
 188     fd0 = fdctrl_get_drive_type(floppy_controller, 0);
 189     fd1 = fdctrl_get_drive_type(floppy_controller, 1);
 190
 191     val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
 192     rtc_set_memory(s, 0x10, val);
 193
 194     val = 0;
 195     nb = 0;
 196     if (fd0 < 3)
 197         nb++;
 198     if (fd1 < 3)
 199         nb++;
 200     switch (nb) {
 201     case 0:
 202         break;
 203     case 1:
 204         val |= 0x01; /* 1 drive, ready for boot */
 205         break;
 206     case 2:
 207         val |= 0x41; /* 2 drives, ready for boot */
 208         break;
 209     }
 210     val |= 0x02; /* FPU is there */
 211     val |= 0x04; /* PS/2 mouse installed */
 212     rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
 213
 214     /* hard drives */
 215
 216     rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
 217     if (hd_table[0])
 218         cmos_init_hd(0x19, 0x1b, hd_table[0]);
 219     if (hd_table[1])
 220         cmos_init_hd(0x1a, 0x24, hd_table[1]);
 221
 222     val = 0;
 223     for (i = 0; i < 4; i++) {
 224         if (hd_table[i]) {
 225             int cylinders, heads, sectors, translation;
 226             /* NOTE: bdrv_get_geometry_hint() returns the physical
 227                 geometry.  It is always such that: 1 <= sects <= 63, 1
 228                 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
 229                 geometry can be different if a translation is done. */
 230             translation = bdrv_get_translation_hint(hd_table[i]);
 231             if (translation == BIOS_ATA_TRANSLATION_AUTO) {
 232                 bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, &sectors);
 233                 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
 234                     /* No translation. */
 235                     translation = 0;
 236                 } else {
 237                     /* LBA translation. */
 238                     translation = 1;
 239                 }
 240             } else {
 241                 translation--;
 242             }
 243             val |= translation << (i * 2);
 244         }
 245     }
 246     rtc_set_memory(s, 0x39, val);
 247 }
 248
 249 static void main_cpu_reset(void *opaque)
 250 {
 251     CPUState *env = opaque;
 252     cpu_reset(env);
 253 }
 254
 255 static const int ide_iobase[2] = { 0x1f0, 0x170 };
 256 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
 257 static const int ide_irq[2] = { 14, 15 };
 258
 259 #define NE2000_NB_MAX 6
 260
 261 static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
 262 static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
 263
 264 static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
 265 static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
 266
 267 static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
 268 static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
 269
 270 #ifdef HAS_AUDIO
 271 static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
 272 {
 273     struct soundhw *c;
 274     int audio_enabled = 0;
 275
 276     for (c = soundhw; !audio_enabled && c->name; ++c) {
 277         audio_enabled = c->enabled;
 278     }
 279
 280     if (audio_enabled) {
 281         AudioState *s;
 282
 283         s = AUD_init ();
 284         if (s) {
 285             for (c = soundhw; c->name; ++c) {
 286                 if (c->enabled) {
 287                     if (c->isa) {
 288                         c->init.init_isa (s, pic);
 289                     }
 290                     else {
 291                         if (pci_bus) {
 292                             c->init.init_pci (pci_bus, s);
 293                         }
 294                     }
 295                 }
 296             }
 297         }
 298     }
 299 }
 300 #endif
 301
 302 static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic)
 303 {
 304     static int nb_ne2k = 0;
 305
 306     if (nb_ne2k == NE2000_NB_MAX)
 307         return;
 308     isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd);
 309     nb_ne2k++;
 310 }
 311
 312 #ifdef USE_KVM
 313 extern kvm_context_t kvm_context;
 314 extern int kvm_allowed;
 315 #endif
 316
 317 /* Itanium hardware initialisation */
 318 static void ipf_init1(ram_addr_t ram_size, int vga_ram_size,
 319                      const char *boot_device, DisplayState *ds,
 320                      const char *kernel_filename, const char *kernel_cmdline,
 321                      const char *initrd_filename,
 322                      int pci_enabled, const char *cpu_model)
 323 {
 324     char buf[1024];
 325     int i;
 326     ram_addr_t ram_addr, vga_ram_addr;
 327     ram_addr_t above_4g_mem_size = 0;
 328     PCIBus *pci_bus;
 329     int piix3_devfn = -1;
 330     CPUState *env;
 331     NICInfo *nd;
 332     qemu_irq *cpu_irq;
 333     qemu_irq *i8259;
 334     int page_size;
 335     int index;
 336     BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 337     BlockDriverState *fd[MAX_FD];
 338
 339     page_size = getpagesize();
 340     if (page_size != TARGET_PAGE_SIZE) {
 341         fprintf(stderr,"Error! Host page size != qemu target page size,"
 342                         " you may need to change TARGET_PAGE_BITS in qemu!"
 343                         "host page size:0x%x\n", page_size);
 344                 exit(-1);
 345     };
 346
 347     if (ram_size >= 0xc0000000 ) {
 348         above_4g_mem_size = ram_size - 0xc0000000;
 349         ram_size = 0xc0000000;
 350     }
 351
 352     /* init CPUs */
 353     if (cpu_model == NULL) {
 354         cpu_model = "IA64";
 355     }
 356
 357     for(i = 0; i < smp_cpus; i++) {
 358         env = cpu_init(cpu_model);
 359         if (!env) {
 360             fprintf(stderr, "Unable to find CPU definition\n");
 361             exit(1);
 362         }
 363         if (i != 0)
 364             env->hflags |= HF_HALTED_MASK;
 365         register_savevm("cpu", i, 4, cpu_save, cpu_load, env);
 366         qemu_register_reset(main_cpu_reset, env);
 367     }
 368
 369         /* allocate RAM */
 370 #ifdef USE_KVM
 371 #ifdef KVM_CAP_USER_MEMORY
 372         if (kvm_allowed && kvm_qemu_check_extension(KVM_CAP_USER_MEMORY)) {
 373                 ram_addr = qemu_ram_alloc(0xa0000);
 374                 cpu_register_physical_memory(0, 0xa0000, ram_addr);
 375                 kvm_cpu_register_physical_memory(0, 0xa0000, ram_addr);
 376
 377                 ram_addr = qemu_ram_alloc(0x20000); // Workaround 0xa0000-0xc0000
 378
 379                 ram_addr = qemu_ram_alloc(0x40000);
 380                 cpu_register_physical_memory(0xc0000, 0x40000, ram_addr);
 381                 kvm_cpu_register_physical_memory(0xc0000, 0x40000, ram_addr);
 382
 383                 ram_addr = qemu_ram_alloc(ram_size - 0x100000);
 384                 cpu_register_physical_memory(0x100000, ram_size - 0x100000, ram_addr);
 385                 kvm_cpu_register_physical_memory(0x100000, ram_size - 0x100000,
 386                                 ram_addr);
 387         } else
 388 #endif
 389 #endif
 390     {
 391         ram_addr = qemu_ram_alloc(ram_size);
 392         cpu_register_physical_memory(0, ram_size, ram_addr);
 393     }
 394     /* allocate VGA RAM */
 395     vga_ram_addr = qemu_ram_alloc(vga_ram_size);
 396
 397         /* above 4giga memory allocation */
 398         if (above_4g_mem_size > 0) {
 399                 ram_addr = qemu_ram_alloc(above_4g_mem_size);
 400                 cpu_register_physical_memory(0x100000000, above_4g_mem_size, ram_addr);
 401 #ifdef USE_KVM
 402         if (kvm_allowed)
 403                 kvm_cpu_register_physical_memory(0x100000000, above_4g_mem_size,
 404                                         ram_addr);
 405 #endif
 406         }
 407
 408         /*Load firware to its proper position.*/
 409 #ifdef USE_KVM
 410         if (kvm_allowed) {
 411                 int r;
 412                 unsigned long  image_size;
 413                 char *image = NULL;
 414                 char *fw_image_start;
 415                 ram_addr_t fw_offset = qemu_ram_alloc(GFW_SIZE);
 416                 char *fw_start = phys_ram_base + fw_offset;
 417
 418                 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, FW_FILENAME);
 419                 image = read_image(buf, &image_size );
 420                 if (NULL == image || !image_size) {
 421                         fprintf(stderr, "Error when reading Guest Firmware!\n");
 422                         fprintf(stderr, "Please check Guest firmware at %s\n", buf);
 423                         exit(1);
 424                 }
 425                 fw_image_start = fw_start + GFW_SIZE - image_size;
 426
 427 #ifdef KVM_CAP_USER_MEMORY
 428                 r = kvm_qemu_check_extension(KVM_CAP_USER_MEMORY);
 429                 if (r) {
 430                         cpu_register_physical_memory(GFW_START, GFW_SIZE, fw_offset);
 431                         kvm_cpu_register_physical_memory(GFW_START,GFW_SIZE, fw_offset);
 432                         memcpy(fw_image_start, image, image_size);
 433                 }
 434                 else
 435 #endif
 436                 {
 437                         fw_start = kvm_create_phys_mem(kvm_context, (uint32_t)(-image_size),
 438                                         image_size, 0, 1);
 439                         if (!fw_start)
 440                                 exit(1);
 441                         fw_image_start = fw_start + GFW_SIZE - image_size;
 442                         memcpy(fw_image_start, image, image_size);
 443                 }
 444                 free(image);
 445                 flush_icache_range((unsigned long)fw_image_start,
 446                         (unsigned long)fw_image_start + image_size);
 447                 kvm_ia64_build_hob(ram_size + above_4g_mem_size, smp_cpus, fw_start);
 448         }
 449 #endif
 450
 451     cpu_irq = qemu_allocate_irqs(pic_irq_request, first_cpu, 1);
 452     i8259 = i8259_init(cpu_irq[0]);
 453
 454     if (pci_enabled) {
 455         pci_bus = i440fx_init(&i440fx_state, i8259);
 456         piix3_devfn = piix3_init(pci_bus, -1);
 457     } else {
 458         pci_bus = NULL;
 459     }
 460
 461     if (cirrus_vga_enabled) {
 462         if (pci_enabled) {
 463             pci_cirrus_vga_init(pci_bus,
 464                                 ds, phys_ram_base + vga_ram_addr,
 465                                 vga_ram_addr, vga_ram_size);
 466         } else {
 467             isa_cirrus_vga_init(ds, phys_ram_base + vga_ram_addr,
 468                                 vga_ram_addr, vga_ram_size);
 469         }
 470     } else {
 471         if (pci_enabled) {
 472             pci_vga_init(pci_bus, ds, phys_ram_base + vga_ram_addr,
 473                          vga_ram_addr, vga_ram_size, 0, 0);
 474         } else {
 475             isa_vga_init(ds, phys_ram_base + vga_ram_addr,
 476                          vga_ram_addr, vga_ram_size);
 477         }
 478     }
 479
 480     rtc_state = rtc_init(0x70, i8259[8]);
 481
 482     if (pci_enabled) {
 483         pic_set_alt_irq_func(isa_pic, NULL, NULL);
 484     }
 485
 486     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
 487         if (serial_hds[i]) {
 488             serial_init(serial_io[i], i8259[serial_irq[i]], serial_hds[i]);
 489         }
 490     }
 491
 492     for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
 493         if (parallel_hds[i]) {
 494             parallel_init(parallel_io[i], i8259[parallel_irq[i]],
 495                           parallel_hds[i]);
 496         }
 497     }
 498
 499     for(i = 0; i < nb_nics; i++) {
 500         nd = &nd_table[i];
 501         if (!nd->model) {
 502             if (pci_enabled) {
 503                 nd->model = "ne2k_pci";
 504             } else {
 505                 nd->model = "ne2k_isa";
 506             }
 507         }
 508         if (strcmp(nd->model, "ne2k_isa") == 0) {
 509             pc_init_ne2k_isa(nd, i8259);
 510         } else if (pci_enabled) {
 511             if (strcmp(nd->model, "?") == 0)
 512                 fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
 513             pci_nic_init(pci_bus, nd, -1);
 514         } else if (strcmp(nd->model, "?") == 0) {
 515             fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
 516             exit(1);
 517         } else {
 518             fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
 519             exit(1);
 520         }
 521     }
 522
 523 #undef USE_HYPERCALL  //Disable it now, need to implement later!
 524 #ifdef USE_HYPERCALL
 525     pci_hypercall_init(pci_bus);
 526 #endif
 527
 528     if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
 529         fprintf(stderr, "qemu: too many IDE bus\n");
 530         exit(1);
 531     }
 532
 533     for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
 534         index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
 535         if (index != -1)
 536             hd[i] = drives_table[index].bdrv;
 537         else
 538             hd[i] = NULL;
 539     }
 540
 541     if (pci_enabled) {
 542         pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, i8259);
 543     } else {
 544         for(i = 0; i < MAX_IDE_BUS; i++) {
 545             isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
 546                          hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
 547         }
 548     }
 549
 550     i8042_init(i8259[1], i8259[12], 0x60);
 551     DMA_init(0);
 552 #ifdef HAS_AUDIO
 553     audio_init(pci_enabled ? pci_bus : NULL, i8259);
 554 #endif
 555
 556     for(i = 0; i < MAX_FD; i++) {
 557         index = drive_get_index(IF_FLOPPY, 0, i);
 558         if (index != -1)
 559             fd[i] = drives_table[index].bdrv;
 560         else
 561             fd[i] = NULL;
 562     }
 563     floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd);
 564
 565     cmos_init(ram_size, above_4g_mem_size, boot_device, hd, smp_cpus);
 566
 567     if (pci_enabled && usb_enabled) {
 568         usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
 569     }
 570
 571     if (pci_enabled && acpi_enabled) {
 572         uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
 573         i2c_bus *smbus;
 574
 575         /* TODO: Populate SPD eeprom data.  */
 576         smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100);
 577         for (i = 0; i < 8; i++) {
 578             smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256));
 579         }
 580     }
 581
 582     if (i440fx_state) {
 583         i440fx_init_memory_mappings(i440fx_state);
 584     }
 585
 586     if (pci_enabled) {
 587         int max_bus;
 588         int bus, unit;
 589         void *scsi;
 590
 591         max_bus = drive_get_max_bus(IF_SCSI);
 592
 593         for (bus = 0; bus <= max_bus; bus++) {
 594             scsi = lsi_scsi_init(pci_bus, -1);
 595             for (unit = 0; unit < LSI_MAX_DEVS; unit++) {
 596                 index = drive_get_index(IF_SCSI, bus, unit);
 597                 if (index == -1)
 598                     continue;
 599                 lsi_scsi_attach(scsi, drives_table[index].bdrv, unit);
 600             }
 601         }
 602     }
 603 }
 604
 605 static void ipf_init_pci(ram_addr_t ram_size, int vga_ram_size,
 606                         const char *boot_device, DisplayState *ds,
 607                         const char *kernel_filename,
 608                         const char *kernel_cmdline,
 609                         const char *initrd_filename,
 610                         const char *cpu_model)
 611 {
 612     ipf_init1(ram_size, vga_ram_size, boot_device, ds,
 613              kernel_filename, kernel_cmdline,
 614              initrd_filename, 1, cpu_model);
 615 }
 616
 617 QEMUMachine ipf_machine = {
 618     "itanium",
 619     "Itanium Platform",
 620     ipf_init_pci,
 621 };