softmmu_header.h

   1 /*
   2  *  Software MMU support
   3  *
   4  *  Copyright (c) 2003 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20 #if DATA_SIZE == 8
  21 #define SUFFIX q
  22 #define USUFFIX q
  23 #define DATA_TYPE uint64_t
  24 #elif DATA_SIZE == 4
  25 #define SUFFIX l
  26 #define USUFFIX l
  27 #define DATA_TYPE uint32_t
  28 #elif DATA_SIZE == 2
  29 #define SUFFIX w
  30 #define USUFFIX uw
  31 #define DATA_TYPE uint16_t
  32 #define DATA_STYPE int16_t
  33 #elif DATA_SIZE == 1
  34 #define SUFFIX b
  35 #define USUFFIX ub
  36 #define DATA_TYPE uint8_t
  37 #define DATA_STYPE int8_t
  38 #else
  39 #error unsupported data size
  40 #endif
  41
  42 #if ACCESS_TYPE == 0
  43
  44 #define CPU_MEM_INDEX 0
  45 #define MMUSUFFIX _mmu
  46
  47 #elif ACCESS_TYPE == 1
  48
  49 #define CPU_MEM_INDEX 1
  50 #define MMUSUFFIX _mmu
  51
  52 #elif ACCESS_TYPE == 2
  53
  54 #ifdef TARGET_I386
  55 #define CPU_MEM_INDEX ((env->hflags & HF_CPL_MASK) == 3)
  56 #elif defined (TARGET_PPC)
  57 #define CPU_MEM_INDEX (msr_pr)
  58 #elif defined (TARGET_MIPS)
  59 #define CPU_MEM_INDEX ((env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM)
  60 #elif defined (TARGET_SPARC)
  61 #define CPU_MEM_INDEX ((env->psrs) == 0)
  62 #elif defined (TARGET_ARM)
  63 #define CPU_MEM_INDEX ((env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_USR)
  64 #elif defined (TARGET_SH4)
  65 #define CPU_MEM_INDEX ((env->sr & SR_MD) == 0)
  66 #elif defined (TARGET_ALPHA)
  67 #define CPU_MEM_INDEX ((env->ps >> 3) & 3)
  68 #elif defined (TARGET_M68K)
  69 #define CPU_MEM_INDEX ((env->sr & SR_S) == 0)
  70 #else
  71 #error unsupported CPU
  72 #endif
  73 #define MMUSUFFIX _mmu
  74
  75 #elif ACCESS_TYPE == 3
  76
  77 #ifdef TARGET_I386
  78 #define CPU_MEM_INDEX ((env->hflags & HF_CPL_MASK) == 3)
  79 #elif defined (TARGET_PPC)
  80 #define CPU_MEM_INDEX (msr_pr)
  81 #elif defined (TARGET_MIPS)
  82 #define CPU_MEM_INDEX ((env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM)
  83 #elif defined (TARGET_SPARC)
  84 #define CPU_MEM_INDEX ((env->psrs) == 0)
  85 #elif defined (TARGET_ARM)
  86 #define CPU_MEM_INDEX ((env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_USR)
  87 #elif defined (TARGET_SH4)
  88 #define CPU_MEM_INDEX ((env->sr & SR_MD) == 0)
  89 #elif defined (TARGET_ALPHA)
  90 #define CPU_MEM_INDEX ((env->ps >> 3) & 3)
  91 #elif defined (TARGET_M68K)
  92 #define CPU_MEM_INDEX ((env->sr & SR_S) == 0)
  93 #elif defined (TARGET_IA64)
  94 #define CPU_MEM_INDEX (0)
  95 #else
  96 #error unsupported CPU
  97 #endif
  98 #define MMUSUFFIX _cmmu
  99
 100 #else
 101 #error invalid ACCESS_TYPE
 102 #endif
 103
 104 #if DATA_SIZE == 8
 105 #define RES_TYPE uint64_t
 106 #else
 107 #define RES_TYPE int
 108 #endif
 109
 110 #if ACCESS_TYPE == 3
 111 #define ADDR_READ addr_code
 112 #else
 113 #define ADDR_READ addr_read
 114 #endif
 115
 116 DATA_TYPE REGPARM(1) glue(glue(__ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
 117                                                          int is_user);
 118 void REGPARM(2) glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr, DATA_TYPE v, int is_user);
 119
 120 #if (DATA_SIZE <= 4) && (TARGET_LONG_BITS == 32) && defined(__i386__) && \
 121     (ACCESS_TYPE <= 1) && defined(ASM_SOFTMMU)
 122
 123 #define CPU_TLB_ENTRY_BITS 4
 124
 125 static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
 126 {
 127     int res;
 128
 129     asm volatile ("movl %1, %%edx\n"
 130                   "movl %1, %%eax\n"
 131                   "shrl %3, %%edx\n"
 132                   "andl %4, %%eax\n"
 133                   "andl %2, %%edx\n"
 134                   "leal %5(%%edx, %%ebp), %%edx\n"
 135                   "cmpl (%%edx), %%eax\n"
 136                   "movl %1, %%eax\n"
 137                   "je 1f\n"
 138                   "pushl %6\n"
 139                   "call %7\n"
 140                   "popl %%edx\n"
 141                   "movl %%eax, %0\n"
 142                   "jmp 2f\n"
 143                   "1:\n"
 144                   "addl 12(%%edx), %%eax\n"
 145 #if DATA_SIZE == 1
 146                   "movzbl (%%eax), %0\n"
 147 #elif DATA_SIZE == 2
 148                   "movzwl (%%eax), %0\n"
 149 #elif DATA_SIZE == 4
 150                   "movl (%%eax), %0\n"
 151 #else
 152 #error unsupported size
 153 #endif
 154                   "2:\n"
 155                   : "=r" (res)
 156                   : "r" (ptr),
 157                   "i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS),
 158                   "i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS),
 159                   "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),
 160                   "m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MEM_INDEX][0].addr_read)),
 161                   "i" (CPU_MEM_INDEX),
 162                   "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
 163                   : "%eax", "%ecx", "%edx", "memory", "cc");
 164     return res;
 165 }
 166
 167 #if DATA_SIZE <= 2
 168 static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
 169 {
 170     int res;
 171
 172     asm volatile ("movl %1, %%edx\n"
 173                   "movl %1, %%eax\n"
 174                   "shrl %3, %%edx\n"
 175                   "andl %4, %%eax\n"
 176                   "andl %2, %%edx\n"
 177                   "leal %5(%%edx, %%ebp), %%edx\n"
 178                   "cmpl (%%edx), %%eax\n"
 179                   "movl %1, %%eax\n"
 180                   "je 1f\n"
 181                   "pushl %6\n"
 182                   "call %7\n"
 183                   "popl %%edx\n"
 184 #if DATA_SIZE == 1
 185                   "movsbl %%al, %0\n"
 186 #elif DATA_SIZE == 2
 187                   "movswl %%ax, %0\n"
 188 #else
 189 #error unsupported size
 190 #endif
 191                   "jmp 2f\n"
 192                   "1:\n"
 193                   "addl 12(%%edx), %%eax\n"
 194 #if DATA_SIZE == 1
 195                   "movsbl (%%eax), %0\n"
 196 #elif DATA_SIZE == 2
 197                   "movswl (%%eax), %0\n"
 198 #else
 199 #error unsupported size
 200 #endif
 201                   "2:\n"
 202                   : "=r" (res)
 203                   : "r" (ptr),
 204                   "i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS),
 205                   "i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS),
 206                   "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),
 207                   "m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MEM_INDEX][0].addr_read)),
 208                   "i" (CPU_MEM_INDEX),
 209                   "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
 210                   : "%eax", "%ecx", "%edx", "memory", "cc");
 211     return res;
 212 }
 213 #endif
 214
 215 static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
 216 {
 217     asm volatile ("movl %0, %%edx\n"
 218                   "movl %0, %%eax\n"
 219                   "shrl %3, %%edx\n"
 220                   "andl %4, %%eax\n"
 221                   "andl %2, %%edx\n"
 222                   "leal %5(%%edx, %%ebp), %%edx\n"
 223                   "cmpl (%%edx), %%eax\n"
 224                   "movl %0, %%eax\n"
 225                   "je 1f\n"
 226 #if DATA_SIZE == 1
 227                   "movzbl %b1, %%edx\n"
 228 #elif DATA_SIZE == 2
 229                   "movzwl %w1, %%edx\n"
 230 #elif DATA_SIZE == 4
 231                   "movl %1, %%edx\n"
 232 #else
 233 #error unsupported size
 234 #endif
 235                   "pushl %6\n"
 236                   "call %7\n"
 237                   "popl %%eax\n"
 238                   "jmp 2f\n"
 239                   "1:\n"
 240                   "addl 8(%%edx), %%eax\n"
 241 #if DATA_SIZE == 1
 242                   "movb %b1, (%%eax)\n"
 243 #elif DATA_SIZE == 2
 244                   "movw %w1, (%%eax)\n"
 245 #elif DATA_SIZE == 4
 246                   "movl %1, (%%eax)\n"
 247 #else
 248 #error unsupported size
 249 #endif
 250                   "2:\n"
 251                   :
 252                   : "r" (ptr),
 253 /* NOTE: 'q' would be needed as constraint, but we could not use it
 254    with T1 ! */
 255                   "r" (v),
 256                   "i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS),
 257                   "i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS),
 258                   "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),
 259                   "m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MEM_INDEX][0].addr_write)),
 260                   "i" (CPU_MEM_INDEX),
 261                   "m" (*(uint8_t *)&glue(glue(__st, SUFFIX), MMUSUFFIX))
 262                   : "%eax", "%ecx", "%edx", "memory", "cc");
 263 }
 264
 265 #else
 266
 267 /* generic load/store macros */
 268
 269 static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
 270 {
 271     int index;
 272     RES_TYPE res;
 273     target_ulong addr;
 274     unsigned long physaddr;
 275     int is_user;
 276
 277     addr = ptr;
 278     index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
 279     is_user = CPU_MEM_INDEX;
 280     if (__builtin_expect(env->tlb_table[is_user][index].ADDR_READ !=
 281                          (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
 282         res = glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, is_user);
 283     } else {
 284         physaddr = addr + env->tlb_table[is_user][index].addend;
 285         res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr);
 286     }
 287     return res;
 288 }
 289
 290 #if DATA_SIZE <= 2
 291 static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
 292 {
 293     int res, index;
 294     target_ulong addr;
 295     unsigned long physaddr;
 296     int is_user;
 297
 298     addr = ptr;
 299     index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
 300     is_user = CPU_MEM_INDEX;
 301     if (__builtin_expect(env->tlb_table[is_user][index].ADDR_READ !=
 302                          (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
 303         res = (DATA_STYPE)glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, is_user);
 304     } else {
 305         physaddr = addr + env->tlb_table[is_user][index].addend;
 306         res = glue(glue(lds, SUFFIX), _raw)((uint8_t *)physaddr);
 307     }
 308     return res;
 309 }
 310 #endif
 311
 312 #if ACCESS_TYPE != 3
 313
 314 /* generic store macro */
 315
 316 static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
 317 {
 318     int index;
 319     target_ulong addr;
 320     unsigned long physaddr;
 321     int is_user;
 322
 323     addr = ptr;
 324     index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
 325     is_user = CPU_MEM_INDEX;
 326     if (__builtin_expect(env->tlb_table[is_user][index].addr_write !=
 327                          (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
 328         glue(glue(__st, SUFFIX), MMUSUFFIX)(addr, v, is_user);
 329     } else {
 330         physaddr = addr + env->tlb_table[is_user][index].addend;
 331         glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, v);
 332     }
 333 }
 334
 335 #endif /* ACCESS_TYPE != 3 */
 336
 337 #endif /* !asm */
 338
 339 #if ACCESS_TYPE != 3
 340
 341 #if DATA_SIZE == 8
 342 static inline float64 glue(ldfq, MEMSUFFIX)(target_ulong ptr)
 343 {
 344     union {
 345         float64 d;
 346         uint64_t i;
 347     } u;
 348     u.i = glue(ldq, MEMSUFFIX)(ptr);
 349     return u.d;
 350 }
 351
 352 static inline void glue(stfq, MEMSUFFIX)(target_ulong ptr, float64 v)
 353 {
 354     union {
 355         float64 d;
 356         uint64_t i;
 357     } u;
 358     u.d = v;
 359     glue(stq, MEMSUFFIX)(ptr, u.i);
 360 }
 361 #endif /* DATA_SIZE == 8 */
 362
 363 #if DATA_SIZE == 4
 364 static inline float32 glue(ldfl, MEMSUFFIX)(target_ulong ptr)
 365 {
 366     union {
 367         float32 f;
 368         uint32_t i;
 369     } u;
 370     u.i = glue(ldl, MEMSUFFIX)(ptr);
 371     return u.f;
 372 }
 373
 374 static inline void glue(stfl, MEMSUFFIX)(target_ulong ptr, float32 v)
 375 {
 376     union {
 377         float32 f;
 378         uint32_t i;
 379     } u;
 380     u.f = v;
 381     glue(stl, MEMSUFFIX)(ptr, u.i);
 382 }
 383 #endif /* DATA_SIZE == 4 */
 384
 385 #endif /* ACCESS_TYPE != 3 */
 386
 387 #undef RES_TYPE
 388 #undef DATA_TYPE
 389 #undef DATA_STYPE
 390 #undef SUFFIX
 391 #undef USUFFIX
 392 #undef DATA_SIZE
 393 #undef CPU_MEM_INDEX
 394 #undef MMUSUFFIX
 395 #undef ADDR_READ