gdbstub.c

   1 /*
   2  * gdb server stub
   3  *
   4  * Copyright (c) 2003-2005 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20 #include "config.h"
  21 #ifdef CONFIG_USER_ONLY
  22 #include <stdlib.h>
  23 #include <stdio.h>
  24 #include <stdarg.h>
  25 #include <string.h>
  26 #include <errno.h>
  27 #include <unistd.h>
  28 #include <fcntl.h>
  29
  30 #include "qemu.h"
  31 #else
  32 #include "qemu-common.h"
  33 #include "qemu-char.h"
  34 #include "sysemu.h"
  35 #include "gdbstub.h"
  36 #include "qemu-kvm.h"
  37 #endif
  38
  39 #include "qemu_socket.h"
  40 #ifdef _WIN32
  41 /* XXX: these constants may be independent of the host ones even for Unix */
  42 #ifndef SIGTRAP
  43 #define SIGTRAP 5
  44 #endif
  45 #ifndef SIGINT
  46 #define SIGINT 2
  47 #endif
  48 #else
  49 #include <signal.h>
  50 #endif
  51
  52 //#define DEBUG_GDB
  53
  54 enum RSState {
  55     RS_IDLE,
  56     RS_GETLINE,
  57     RS_CHKSUM1,
  58     RS_CHKSUM2,
  59     RS_SYSCALL,
  60 };
  61 typedef struct GDBState {
  62     CPUState *env; /* current CPU */
  63     enum RSState state; /* parsing state */
  64     char line_buf[4096];
  65     int line_buf_index;
  66     int line_csum;
  67     uint8_t last_packet[4100];
  68     int last_packet_len;
  69 #ifdef CONFIG_USER_ONLY
  70     int fd;
  71     int running_state;
  72 #else
  73     CharDriverState *chr;
  74 #endif
  75 } GDBState;
  76
  77 #ifdef CONFIG_USER_ONLY
  78 /* XXX: This is not thread safe.  Do we care?  */
  79 static int gdbserver_fd = -1;
  80
  81 /* XXX: remove this hack.  */
  82 static GDBState gdbserver_state;
  83
  84 static int get_char(GDBState *s)
  85 {
  86     uint8_t ch;
  87     int ret;
  88
  89     for(;;) {
  90         ret = recv(s->fd, &ch, 1, 0);
  91         if (ret < 0) {
  92             if (errno != EINTR && errno != EAGAIN)
  93                 return -1;
  94         } else if (ret == 0) {
  95             return -1;
  96         } else {
  97             break;
  98         }
  99     }
 100     return ch;
 101 }
 102 #endif
 103
 104 /* GDB stub state for use by semihosting syscalls.  */
 105 static GDBState *gdb_syscall_state;
 106 static gdb_syscall_complete_cb gdb_current_syscall_cb;
 107
 108 enum {
 109     GDB_SYS_UNKNOWN,
 110     GDB_SYS_ENABLED,
 111     GDB_SYS_DISABLED,
 112 } gdb_syscall_mode;
 113
 114 /* If gdb is connected when the first semihosting syscall occurs then use
 115    remote gdb syscalls.  Otherwise use native file IO.  */
 116 int use_gdb_syscalls(void)
 117 {
 118     if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
 119         gdb_syscall_mode = (gdb_syscall_state ? GDB_SYS_ENABLED
 120                                               : GDB_SYS_DISABLED);
 121     }
 122     return gdb_syscall_mode == GDB_SYS_ENABLED;
 123 }
 124
 125 static void put_buffer(GDBState *s, const uint8_t *buf, int len)
 126 {
 127 #ifdef CONFIG_USER_ONLY
 128     int ret;
 129
 130     while (len > 0) {
 131         ret = send(s->fd, buf, len, 0);
 132         if (ret < 0) {
 133             if (errno != EINTR && errno != EAGAIN)
 134                 return;
 135         } else {
 136             buf += ret;
 137             len -= ret;
 138         }
 139     }
 140 #else
 141     qemu_chr_write(s->chr, buf, len);
 142 #endif
 143 }
 144
 145 static inline int fromhex(int v)
 146 {
 147     if (v >= '0' && v <= '9')
 148         return v - '0';
 149     else if (v >= 'A' && v <= 'F')
 150         return v - 'A' + 10;
 151     else if (v >= 'a' && v <= 'f')
 152         return v - 'a' + 10;
 153     else
 154         return 0;
 155 }
 156
 157 static inline int tohex(int v)
 158 {
 159     if (v < 10)
 160         return v + '0';
 161     else
 162         return v - 10 + 'a';
 163 }
 164
 165 static void memtohex(char *buf, const uint8_t *mem, int len)
 166 {
 167     int i, c;
 168     char *q;
 169     q = buf;
 170     for(i = 0; i < len; i++) {
 171         c = mem[i];
 172         *q++ = tohex(c >> 4);
 173         *q++ = tohex(c & 0xf);
 174     }
 175     *q = '\0';
 176 }
 177
 178 static void hextomem(uint8_t *mem, const char *buf, int len)
 179 {
 180     int i;
 181
 182     for(i = 0; i < len; i++) {
 183         mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
 184         buf += 2;
 185     }
 186 }
 187
 188 /* return -1 if error, 0 if OK */
 189 static int put_packet(GDBState *s, char *buf)
 190 {
 191     int len, csum, i;
 192     uint8_t *p;
 193
 194 #ifdef DEBUG_GDB
 195     printf("reply='%s'\n", buf);
 196 #endif
 197
 198     for(;;) {
 199         p = s->last_packet;
 200         *(p++) = '$';
 201         len = strlen(buf);
 202         memcpy(p, buf, len);
 203         p += len;
 204         csum = 0;
 205         for(i = 0; i < len; i++) {
 206             csum += buf[i];
 207         }
 208         *(p++) = '#';
 209         *(p++) = tohex((csum >> 4) & 0xf);
 210         *(p++) = tohex((csum) & 0xf);
 211
 212         s->last_packet_len = p - s->last_packet;
 213         put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
 214
 215 #ifdef CONFIG_USER_ONLY
 216         i = get_char(s);
 217         if (i < 0)
 218             return -1;
 219         if (i == '+')
 220             break;
 221 #else
 222         break;
 223 #endif
 224     }
 225     return 0;
 226 }
 227
 228 #if defined(TARGET_X86_64)
 229
 230 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 231 {
 232     uint8_t *p = mem_buf;
 233     int i, fpus;
 234
 235 #define PUTREG(x) do { \
 236         target_ulong reg = tswapl(x); \
 237         memcpy(p, &reg, sizeof reg); \
 238         p += sizeof reg; \
 239     } while (0)
 240 #define PUTREG32(x) do { \
 241         uint32_t reg = tswap32(x);              \
 242         memcpy(p, &reg, sizeof reg); \
 243         p += sizeof reg; \
 244     } while (0)
 245 #define PUTREGF(x) do { \
 246         memcpy(p, &(x), 10);                    \
 247         p += sizeof (x);                        \
 248     } while (0)
 249
 250     PUTREG(env->regs[R_EAX]);
 251     PUTREG(env->regs[R_EBX]);
 252     PUTREG(env->regs[R_ECX]);
 253     PUTREG(env->regs[R_EDX]);
 254     PUTREG(env->regs[R_ESI]);
 255     PUTREG(env->regs[R_EDI]);
 256     PUTREG(env->regs[R_EBP]);
 257     PUTREG(env->regs[R_ESP]);
 258     PUTREG(env->regs[8]);
 259     PUTREG(env->regs[9]);
 260     PUTREG(env->regs[10]);
 261     PUTREG(env->regs[11]);
 262     PUTREG(env->regs[12]);
 263     PUTREG(env->regs[13]);
 264     PUTREG(env->regs[14]);
 265     PUTREG(env->regs[15]);
 266
 267     PUTREG(env->eip);
 268     PUTREG32(env->eflags);
 269     PUTREG32(env->segs[R_CS].selector);
 270     PUTREG32(env->segs[R_SS].selector);
 271     PUTREG32(env->segs[R_DS].selector);
 272     PUTREG32(env->segs[R_ES].selector);
 273     PUTREG32(env->segs[R_FS].selector);
 274     PUTREG32(env->segs[R_GS].selector);
 275     /* XXX: convert floats */
 276     for(i = 0; i < 8; i++) {
 277         PUTREGF(env->fpregs[i]);
 278     }
 279     PUTREG32(env->fpuc);
 280     fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
 281     PUTREG32(fpus);
 282     PUTREG32(0); /* XXX: convert tags */
 283     PUTREG32(0); /* fiseg */
 284     PUTREG32(0); /* fioff */
 285     PUTREG32(0); /* foseg */
 286     PUTREG32(0); /* fooff */
 287     PUTREG32(0); /* fop */
 288
 289 #undef PUTREG
 290 #undef PUTREG32
 291 #undef PUTREGF
 292
 293     return p - mem_buf;
 294 }
 295
 296 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 297 {
 298     uint8_t *p = mem_buf;
 299     uint32_t junk;
 300     int i, fpus;
 301
 302 #define GETREG(x) do { \
 303         target_ulong reg; \
 304         memcpy(&reg, p, sizeof reg);     \
 305         x = tswapl(reg);                 \
 306         p += sizeof reg;                 \
 307     } while (0)
 308 #define GETREG32(x) do { \
 309         uint32_t reg; \
 310         memcpy(&reg, p, sizeof reg);     \
 311         x = tswap32(reg);                \
 312         p += sizeof reg;                 \
 313     } while (0)
 314 #define GETREGF(x) do { \
 315         memcpy(&(x), p, 10);             \
 316         p += 10;                         \
 317     } while (0)
 318
 319     GETREG(env->regs[R_EAX]);
 320     GETREG(env->regs[R_EBX]);
 321     GETREG(env->regs[R_ECX]);
 322     GETREG(env->regs[R_EDX]);
 323     GETREG(env->regs[R_ESI]);
 324     GETREG(env->regs[R_EDI]);
 325     GETREG(env->regs[R_EBP]);
 326     GETREG(env->regs[R_ESP]);
 327     GETREG(env->regs[8]);
 328     GETREG(env->regs[9]);
 329     GETREG(env->regs[10]);
 330     GETREG(env->regs[11]);
 331     GETREG(env->regs[12]);
 332     GETREG(env->regs[13]);
 333     GETREG(env->regs[14]);
 334     GETREG(env->regs[15]);
 335
 336     GETREG(env->eip);
 337     GETREG32(env->eflags);
 338     GETREG32(env->segs[R_CS].selector);
 339     GETREG32(env->segs[R_SS].selector);
 340     GETREG32(env->segs[R_DS].selector);
 341     GETREG32(env->segs[R_ES].selector);
 342     GETREG32(env->segs[R_FS].selector);
 343     GETREG32(env->segs[R_GS].selector);
 344     /* XXX: convert floats */
 345     for(i = 0; i < 8; i++) {
 346         GETREGF(env->fpregs[i]);
 347     }
 348     GETREG32(env->fpuc);
 349     GETREG32(fpus); /* XXX: convert fpus */
 350     GETREG32(junk); /* XXX: convert tags */
 351     GETREG32(junk); /* fiseg */
 352     GETREG32(junk); /* fioff */
 353     GETREG32(junk); /* foseg */
 354     GETREG32(junk); /* fooff */
 355     GETREG32(junk); /* fop */
 356
 357 #undef GETREG
 358 #undef GETREG32
 359 #undef GETREGF
 360 }
 361
 362 #elif defined(TARGET_I386)
 363
 364 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 365 {
 366     int i, fpus;
 367     uint32_t *registers = (uint32_t *)mem_buf;
 368
 369 #ifdef TARGET_X86_64
 370     /* This corresponds with amd64_register_info[] in gdb/amd64-tdep.c */
 371     uint64_t *registers64 = (uint64_t *)mem_buf;
 372
 373     if (env->hflags & HF_CS64_MASK) {
 374         registers64[0] = tswap64(env->regs[R_EAX]);
 375         registers64[1] = tswap64(env->regs[R_EBX]);
 376         registers64[2] = tswap64(env->regs[R_ECX]);
 377         registers64[3] = tswap64(env->regs[R_EDX]);
 378         registers64[4] = tswap64(env->regs[R_ESI]);
 379         registers64[5] = tswap64(env->regs[R_EDI]);
 380         registers64[6] = tswap64(env->regs[R_EBP]);
 381         registers64[7] = tswap64(env->regs[R_ESP]);
 382         for(i = 8; i < 16; i++) {
 383             registers64[i] = tswap64(env->regs[i]);
 384         }
 385         registers64[16] = tswap64(env->eip);
 386
 387         registers = (uint32_t *)&registers64[17];
 388         registers[0] = tswap32(env->eflags);
 389         registers[1] = tswap32(env->segs[R_CS].selector);
 390         registers[2] = tswap32(env->segs[R_SS].selector);
 391         registers[3] = tswap32(env->segs[R_DS].selector);
 392         registers[4] = tswap32(env->segs[R_ES].selector);
 393         registers[5] = tswap32(env->segs[R_FS].selector);
 394         registers[6] = tswap32(env->segs[R_GS].selector);
 395         /* XXX: convert floats */
 396         for(i = 0; i < 8; i++) {
 397             memcpy(mem_buf + 16 * 8 + 7 * 4 + i * 10, &env->fpregs[i], 10);
 398         }
 399         registers[27] = tswap32(env->fpuc); /* fctrl */
 400         fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
 401         registers[28] = tswap32(fpus); /* fstat */
 402         registers[29] = 0; /* ftag */
 403         registers[30] = 0; /* fiseg */
 404         registers[31] = 0; /* fioff */
 405         registers[32] = 0; /* foseg */
 406         registers[33] = 0; /* fooff */
 407         registers[34] = 0; /* fop */
 408         for(i = 0; i < 16; i++) {
 409             memcpy(mem_buf + 16 * 8 + 35 * 4 + i * 16, &env->xmm_regs[i], 16);
 410         }
 411         registers[99] = tswap32(env->mxcsr);
 412
 413         return 8 * 17 + 4 * 7 + 10 * 8 + 4 * 8 + 16 * 16 + 4;
 414     }
 415 #endif
 416
 417     for(i = 0; i < 8; i++) {
 418         registers[i] = env->regs[i];
 419     }
 420     registers[8] = env->eip;
 421     registers[9] = env->eflags;
 422     registers[10] = env->segs[R_CS].selector;
 423     registers[11] = env->segs[R_SS].selector;
 424     registers[12] = env->segs[R_DS].selector;
 425     registers[13] = env->segs[R_ES].selector;
 426     registers[14] = env->segs[R_FS].selector;
 427     registers[15] = env->segs[R_GS].selector;
 428     /* XXX: convert floats */
 429     for(i = 0; i < 8; i++) {
 430         memcpy(mem_buf + 16 * 4 + i * 10, &env->fpregs[i], 10);
 431     }
 432     registers[36] = env->fpuc;
 433     fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
 434     registers[37] = fpus;
 435     registers[38] = 0; /* XXX: convert tags */
 436     registers[39] = 0; /* fiseg */
 437     registers[40] = 0; /* fioff */
 438     registers[41] = 0; /* foseg */
 439     registers[42] = 0; /* fooff */
 440     registers[43] = 0; /* fop */
 441
 442     for(i = 0; i < 16; i++)
 443         tswapls(&registers[i]);
 444     for(i = 36; i < 44; i++)
 445         tswapls(&registers[i]);
 446     return 44 * 4;
 447 }
 448
 449 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 450 {
 451     uint32_t *registers = (uint32_t *)mem_buf;
 452     int i;
 453
 454     for(i = 0; i < 8; i++) {
 455         env->regs[i] = tswapl(registers[i]);
 456     }
 457     env->eip = tswapl(registers[8]);
 458     env->eflags = tswapl(registers[9]);
 459 #if defined(CONFIG_USER_ONLY)
 460 #define LOAD_SEG(index, sreg)\
 461             if (tswapl(registers[index]) != env->segs[sreg].selector)\
 462                 cpu_x86_load_seg(env, sreg, tswapl(registers[index]));
 463             LOAD_SEG(10, R_CS);
 464             LOAD_SEG(11, R_SS);
 465             LOAD_SEG(12, R_DS);
 466             LOAD_SEG(13, R_ES);
 467             LOAD_SEG(14, R_FS);
 468             LOAD_SEG(15, R_GS);
 469 #endif
 470 }
 471
 472 #elif defined (TARGET_PPC)
 473 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 474 {
 475     uint32_t *registers = (uint32_t *)mem_buf, tmp;
 476     int i;
 477
 478     /* fill in gprs */
 479     for(i = 0; i < 32; i++) {
 480         registers[i] = tswapl(env->gpr[i]);
 481     }
 482     /* fill in fprs */
 483     for (i = 0; i < 32; i++) {
 484         registers[(i * 2) + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
 485         registers[(i * 2) + 33] = tswapl(*((uint32_t *)&env->fpr[i] + 1));
 486     }
 487     /* nip, msr, ccr, lnk, ctr, xer, mq */
 488     registers[96] = tswapl(env->nip);
 489     registers[97] = tswapl(env->msr);
 490     tmp = 0;
 491     for (i = 0; i < 8; i++)
 492         tmp |= env->crf[i] << (32 - ((i + 1) * 4));
 493     registers[98] = tswapl(tmp);
 494     registers[99] = tswapl(env->lr);
 495     registers[100] = tswapl(env->ctr);
 496     registers[101] = tswapl(ppc_load_xer(env));
 497     registers[102] = 0;
 498
 499     return 103 * 4;
 500 }
 501
 502 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 503 {
 504     uint32_t *registers = (uint32_t *)mem_buf;
 505     int i;
 506
 507     /* fill in gprs */
 508     for (i = 0; i < 32; i++) {
 509         env->gpr[i] = tswapl(registers[i]);
 510     }
 511     /* fill in fprs */
 512     for (i = 0; i < 32; i++) {
 513         *((uint32_t *)&env->fpr[i]) = tswapl(registers[(i * 2) + 32]);
 514         *((uint32_t *)&env->fpr[i] + 1) = tswapl(registers[(i * 2) + 33]);
 515     }
 516     /* nip, msr, ccr, lnk, ctr, xer, mq */
 517     env->nip = tswapl(registers[96]);
 518     ppc_store_msr(env, tswapl(registers[97]));
 519     registers[98] = tswapl(registers[98]);
 520     for (i = 0; i < 8; i++)
 521         env->crf[i] = (registers[98] >> (32 - ((i + 1) * 4))) & 0xF;
 522     env->lr = tswapl(registers[99]);
 523     env->ctr = tswapl(registers[100]);
 524     ppc_store_xer(env, tswapl(registers[101]));
 525 }
 526 #elif defined (TARGET_SPARC)
 527 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 528 {
 529     target_ulong *registers = (target_ulong *)mem_buf;
 530     int i;
 531
 532     /* fill in g0..g7 */
 533     for(i = 0; i < 8; i++) {
 534         registers[i] = tswapl(env->gregs[i]);
 535     }
 536     /* fill in register window */
 537     for(i = 0; i < 24; i++) {
 538         registers[i + 8] = tswapl(env->regwptr[i]);
 539     }
 540 #ifndef TARGET_SPARC64
 541     /* fill in fprs */
 542     for (i = 0; i < 32; i++) {
 543         registers[i + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
 544     }
 545     /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
 546     registers[64] = tswapl(env->y);
 547     {
 548         target_ulong tmp;
 549
 550         tmp = GET_PSR(env);
 551         registers[65] = tswapl(tmp);
 552     }
 553     registers[66] = tswapl(env->wim);
 554     registers[67] = tswapl(env->tbr);
 555     registers[68] = tswapl(env->pc);
 556     registers[69] = tswapl(env->npc);
 557     registers[70] = tswapl(env->fsr);
 558     registers[71] = 0; /* csr */
 559     registers[72] = 0;
 560     return 73 * sizeof(target_ulong);
 561 #else
 562     /* fill in fprs */
 563     for (i = 0; i < 64; i += 2) {
 564         uint64_t tmp;
 565
 566         tmp = ((uint64_t)*(uint32_t *)&env->fpr[i]) << 32;
 567         tmp |= *(uint32_t *)&env->fpr[i + 1];
 568         registers[i / 2 + 32] = tswap64(tmp);
 569     }
 570     registers[64] = tswapl(env->pc);
 571     registers[65] = tswapl(env->npc);
 572     registers[66] = tswapl(((uint64_t)GET_CCR(env) << 32) |
 573                            ((env->asi & 0xff) << 24) |
 574                            ((env->pstate & 0xfff) << 8) |
 575                            GET_CWP64(env));
 576     registers[67] = tswapl(env->fsr);
 577     registers[68] = tswapl(env->fprs);
 578     registers[69] = tswapl(env->y);
 579     return 70 * sizeof(target_ulong);
 580 #endif
 581 }
 582
 583 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 584 {
 585     target_ulong *registers = (target_ulong *)mem_buf;
 586     int i;
 587
 588     /* fill in g0..g7 */
 589     for(i = 0; i < 7; i++) {
 590         env->gregs[i] = tswapl(registers[i]);
 591     }
 592     /* fill in register window */
 593     for(i = 0; i < 24; i++) {
 594         env->regwptr[i] = tswapl(registers[i + 8]);
 595     }
 596 #ifndef TARGET_SPARC64
 597     /* fill in fprs */
 598     for (i = 0; i < 32; i++) {
 599         *((uint32_t *)&env->fpr[i]) = tswapl(registers[i + 32]);
 600     }
 601     /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
 602     env->y = tswapl(registers[64]);
 603     PUT_PSR(env, tswapl(registers[65]));
 604     env->wim = tswapl(registers[66]);
 605     env->tbr = tswapl(registers[67]);
 606     env->pc = tswapl(registers[68]);
 607     env->npc = tswapl(registers[69]);
 608     env->fsr = tswapl(registers[70]);
 609 #else
 610     for (i = 0; i < 64; i += 2) {
 611         uint64_t tmp;
 612
 613         tmp = tswap64(registers[i / 2 + 32]);
 614         *((uint32_t *)&env->fpr[i]) = tmp >> 32;
 615         *((uint32_t *)&env->fpr[i + 1]) = tmp & 0xffffffff;
 616     }
 617     env->pc = tswapl(registers[64]);
 618     env->npc = tswapl(registers[65]);
 619     {
 620         uint64_t tmp = tswapl(registers[66]);
 621
 622         PUT_CCR(env, tmp >> 32);
 623         env->asi = (tmp >> 24) & 0xff;
 624         env->pstate = (tmp >> 8) & 0xfff;
 625         PUT_CWP64(env, tmp & 0xff);
 626     }
 627     env->fsr = tswapl(registers[67]);
 628     env->fprs = tswapl(registers[68]);
 629     env->y = tswapl(registers[69]);
 630 #endif
 631 }
 632 #elif defined (TARGET_ARM)
 633 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 634 {
 635     int i;
 636     uint8_t *ptr;
 637
 638     ptr = mem_buf;
 639     /* 16 core integer registers (4 bytes each).  */
 640     for (i = 0; i < 16; i++)
 641       {
 642         *(uint32_t *)ptr = tswapl(env->regs[i]);
 643         ptr += 4;
 644       }
 645     /* 8 FPA registers (12 bytes each), FPS (4 bytes).
 646        Not yet implemented.  */
 647     memset (ptr, 0, 8 * 12 + 4);
 648     ptr += 8 * 12 + 4;
 649     /* CPSR (4 bytes).  */
 650     *(uint32_t *)ptr = tswapl (cpsr_read(env));
 651     ptr += 4;
 652
 653     return ptr - mem_buf;
 654 }
 655
 656 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 657 {
 658     int i;
 659     uint8_t *ptr;
 660
 661     ptr = mem_buf;
 662     /* Core integer registers.  */
 663     for (i = 0; i < 16; i++)
 664       {
 665         env->regs[i] = tswapl(*(uint32_t *)ptr);
 666         ptr += 4;
 667       }
 668     /* Ignore FPA regs and scr.  */
 669     ptr += 8 * 12 + 4;
 670     cpsr_write (env, tswapl(*(uint32_t *)ptr), 0xffffffff);
 671 }
 672 #elif defined (TARGET_M68K)
 673 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 674 {
 675     int i;
 676     uint8_t *ptr;
 677     CPU_DoubleU u;
 678
 679     ptr = mem_buf;
 680     /* D0-D7 */
 681     for (i = 0; i < 8; i++) {
 682         *(uint32_t *)ptr = tswapl(env->dregs[i]);
 683         ptr += 4;
 684     }
 685     /* A0-A7 */
 686     for (i = 0; i < 8; i++) {
 687         *(uint32_t *)ptr = tswapl(env->aregs[i]);
 688         ptr += 4;
 689     }
 690     *(uint32_t *)ptr = tswapl(env->sr);
 691     ptr += 4;
 692     *(uint32_t *)ptr = tswapl(env->pc);
 693     ptr += 4;
 694     /* F0-F7.  The 68881/68040 have 12-bit extended precision registers.
 695        ColdFire has 8-bit double precision registers.  */
 696     for (i = 0; i < 8; i++) {
 697         u.d = env->fregs[i];
 698         *(uint32_t *)ptr = tswap32(u.l.upper);
 699         *(uint32_t *)ptr = tswap32(u.l.lower);
 700     }
 701     /* FP control regs (not implemented).  */
 702     memset (ptr, 0, 3 * 4);
 703     ptr += 3 * 4;
 704
 705     return ptr - mem_buf;
 706 }
 707
 708 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 709 {
 710     int i;
 711     uint8_t *ptr;
 712     CPU_DoubleU u;
 713
 714     ptr = mem_buf;
 715     /* D0-D7 */
 716     for (i = 0; i < 8; i++) {
 717         env->dregs[i] = tswapl(*(uint32_t *)ptr);
 718         ptr += 4;
 719     }
 720     /* A0-A7 */
 721     for (i = 0; i < 8; i++) {
 722         env->aregs[i] = tswapl(*(uint32_t *)ptr);
 723         ptr += 4;
 724     }
 725     env->sr = tswapl(*(uint32_t *)ptr);
 726     ptr += 4;
 727     env->pc = tswapl(*(uint32_t *)ptr);
 728     ptr += 4;
 729     /* F0-F7.  The 68881/68040 have 12-bit extended precision registers.
 730        ColdFire has 8-bit double precision registers.  */
 731     for (i = 0; i < 8; i++) {
 732         u.l.upper = tswap32(*(uint32_t *)ptr);
 733         u.l.lower = tswap32(*(uint32_t *)ptr);
 734         env->fregs[i] = u.d;
 735     }
 736     /* FP control regs (not implemented).  */
 737     ptr += 3 * 4;
 738 }
 739 #elif defined (TARGET_MIPS)
 740 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 741 {
 742     int i;
 743     uint8_t *ptr;
 744
 745     ptr = mem_buf;
 746     for (i = 0; i < 32; i++)
 747       {
 748         *(target_ulong *)ptr = tswapl(env->gpr[i][env->current_tc]);
 749         ptr += sizeof(target_ulong);
 750       }
 751
 752     *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_Status);
 753     ptr += sizeof(target_ulong);
 754
 755     *(target_ulong *)ptr = tswapl(env->LO[0][env->current_tc]);
 756     ptr += sizeof(target_ulong);
 757
 758     *(target_ulong *)ptr = tswapl(env->HI[0][env->current_tc]);
 759     ptr += sizeof(target_ulong);
 760
 761     *(target_ulong *)ptr = tswapl(env->CP0_BadVAddr);
 762     ptr += sizeof(target_ulong);
 763
 764     *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_Cause);
 765     ptr += sizeof(target_ulong);
 766
 767     *(target_ulong *)ptr = tswapl(env->PC[env->current_tc]);
 768     ptr += sizeof(target_ulong);
 769
 770     if (env->CP0_Config1 & (1 << CP0C1_FP))
 771       {
 772         for (i = 0; i < 32; i++)
 773           {
 774             if (env->CP0_Status & (1 << CP0St_FR))
 775               *(target_ulong *)ptr = tswapl(env->fpu->fpr[i].d);
 776             else
 777               *(target_ulong *)ptr = tswap32(env->fpu->fpr[i].w[FP_ENDIAN_IDX]);
 778             ptr += sizeof(target_ulong);
 779           }
 780
 781         *(target_ulong *)ptr = (int32_t)tswap32(env->fpu->fcr31);
 782         ptr += sizeof(target_ulong);
 783
 784         *(target_ulong *)ptr = (int32_t)tswap32(env->fpu->fcr0);
 785         ptr += sizeof(target_ulong);
 786       }
 787
 788     /* "fp", pseudo frame pointer. Not yet implemented in gdb. */
 789     *(target_ulong *)ptr = 0;
 790     ptr += sizeof(target_ulong);
 791
 792     /* Registers for embedded use, we just pad them. */
 793     for (i = 0; i < 16; i++)
 794       {
 795         *(target_ulong *)ptr = 0;
 796         ptr += sizeof(target_ulong);
 797       }
 798
 799     /* Processor ID. */
 800     *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_PRid);
 801     ptr += sizeof(target_ulong);
 802
 803     return ptr - mem_buf;
 804 }
 805
 806 /* convert MIPS rounding mode in FCR31 to IEEE library */
 807 static unsigned int ieee_rm[] =
 808   {
 809     float_round_nearest_even,
 810     float_round_to_zero,
 811     float_round_up,
 812     float_round_down
 813   };
 814 #define RESTORE_ROUNDING_MODE \
 815     set_float_rounding_mode(ieee_rm[env->fpu->fcr31 & 3], &env->fpu->fp_status)
 816
 817 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 818 {
 819     int i;
 820     uint8_t *ptr;
 821
 822     ptr = mem_buf;
 823     for (i = 0; i < 32; i++)
 824       {
 825         env->gpr[i][env->current_tc] = tswapl(*(target_ulong *)ptr);
 826         ptr += sizeof(target_ulong);
 827       }
 828
 829     env->CP0_Status = tswapl(*(target_ulong *)ptr);
 830     ptr += sizeof(target_ulong);
 831
 832     env->LO[0][env->current_tc] = tswapl(*(target_ulong *)ptr);
 833     ptr += sizeof(target_ulong);
 834
 835     env->HI[0][env->current_tc] = tswapl(*(target_ulong *)ptr);
 836     ptr += sizeof(target_ulong);
 837
 838     env->CP0_BadVAddr = tswapl(*(target_ulong *)ptr);
 839     ptr += sizeof(target_ulong);
 840
 841     env->CP0_Cause = tswapl(*(target_ulong *)ptr);
 842     ptr += sizeof(target_ulong);
 843
 844     env->PC[env->current_tc] = tswapl(*(target_ulong *)ptr);
 845     ptr += sizeof(target_ulong);
 846
 847     if (env->CP0_Config1 & (1 << CP0C1_FP))
 848       {
 849         for (i = 0; i < 32; i++)
 850           {
 851             if (env->CP0_Status & (1 << CP0St_FR))
 852               env->fpu->fpr[i].d = tswapl(*(target_ulong *)ptr);
 853             else
 854               env->fpu->fpr[i].w[FP_ENDIAN_IDX] = tswapl(*(target_ulong *)ptr);
 855             ptr += sizeof(target_ulong);
 856           }
 857
 858         env->fpu->fcr31 = tswapl(*(target_ulong *)ptr) & 0xFF83FFFF;
 859         ptr += sizeof(target_ulong);
 860
 861         /* The remaining registers are assumed to be read-only. */
 862
 863         /* set rounding mode */
 864         RESTORE_ROUNDING_MODE;
 865
 866 #ifndef CONFIG_SOFTFLOAT
 867         /* no floating point exception for native float */
 868         SET_FP_ENABLE(env->fcr31, 0);
 869 #endif
 870       }
 871 }
 872 #elif defined (TARGET_SH4)
 873
 874 /* Hint: Use "set architecture sh4" in GDB to see fpu registers */
 875
 876 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 877 {
 878   uint32_t *ptr = (uint32_t *)mem_buf;
 879   int i;
 880
 881 #define SAVE(x) *ptr++=tswapl(x)
 882   if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
 883       for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
 884   } else {
 885       for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
 886   }
 887   for (i = 8; i < 16; i++) SAVE(env->gregs[i]);
 888   SAVE (env->pc);
 889   SAVE (env->pr);
 890   SAVE (env->gbr);
 891   SAVE (env->vbr);
 892   SAVE (env->mach);
 893   SAVE (env->macl);
 894   SAVE (env->sr);
 895   SAVE (env->fpul);
 896   SAVE (env->fpscr);
 897   for (i = 0; i < 16; i++)
 898       SAVE(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
 899   SAVE (env->ssr);
 900   SAVE (env->spc);
 901   for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
 902   for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
 903   return ((uint8_t *)ptr - mem_buf);
 904 }
 905
 906 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 907 {
 908   uint32_t *ptr = (uint32_t *)mem_buf;
 909   int i;
 910
 911 #define LOAD(x) (x)=*ptr++;
 912   if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
 913       for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
 914   } else {
 915       for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
 916   }
 917   for (i = 8; i < 16; i++) LOAD(env->gregs[i]);
 918   LOAD (env->pc);
 919   LOAD (env->pr);
 920   LOAD (env->gbr);
 921   LOAD (env->vbr);
 922   LOAD (env->mach);
 923   LOAD (env->macl);
 924   LOAD (env->sr);
 925   LOAD (env->fpul);
 926   LOAD (env->fpscr);
 927   for (i = 0; i < 16; i++)
 928       LOAD(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
 929   LOAD (env->ssr);
 930   LOAD (env->spc);
 931   for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
 932   for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
 933 }
 934 #elif defined (TARGET_CRIS)
 935
 936 static int cris_save_32 (unsigned char *d, uint32_t value)
 937 {
 938         *d++ = (value);
 939         *d++ = (value >>= 8);
 940         *d++ = (value >>= 8);
 941         *d++ = (value >>= 8);
 942         return 4;
 943 }
 944 static int cris_save_16 (unsigned char *d, uint32_t value)
 945 {
 946         *d++ = (value);
 947         *d++ = (value >>= 8);
 948         return 2;
 949 }
 950 static int cris_save_8 (unsigned char *d, uint32_t value)
 951 {
 952         *d++ = (value);
 953         return 1;
 954 }
 955
 956 /* FIXME: this will bug on archs not supporting unaligned word accesses.  */
 957 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 958 {
 959   uint8_t *ptr = mem_buf;
 960   uint8_t srs;
 961   int i;
 962
 963   for (i = 0; i < 16; i++)
 964           ptr += cris_save_32 (ptr, env->regs[i]);
 965
 966   srs = env->pregs[SR_SRS];
 967
 968   ptr += cris_save_8 (ptr, env->pregs[0]);
 969   ptr += cris_save_8 (ptr, env->pregs[1]);
 970   ptr += cris_save_32 (ptr, env->pregs[2]);
 971   ptr += cris_save_8 (ptr, srs);
 972   ptr += cris_save_16 (ptr, env->pregs[4]);
 973
 974   for (i = 5; i < 16; i++)
 975           ptr += cris_save_32 (ptr, env->pregs[i]);
 976
 977   ptr += cris_save_32 (ptr, env->pc);
 978
 979   for (i = 0; i < 16; i++)
 980           ptr += cris_save_32 (ptr, env->sregs[srs][i]);
 981
 982   return ((uint8_t *)ptr - mem_buf);
 983 }
 984
 985 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 986 {
 987   uint32_t *ptr = (uint32_t *)mem_buf;
 988   int i;
 989
 990 #define LOAD(x) (x)=*ptr++;
 991   for (i = 0; i < 16; i++) LOAD(env->regs[i]);
 992   LOAD (env->pc);
 993 }
 994 #else
 995 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 996 {
 997     return 0;
 998 }
 999
1000 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
1001 {
1002 }
1003
1004 #endif
1005
1006 static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf)
1007 {
1008     const char *p;
1009     int ch, reg_size, type;
1010     char buf[4096];
1011     uint8_t mem_buf[4096];
1012     uint32_t *registers;
1013     target_ulong addr, len;
1014
1015 #ifdef DEBUG_GDB
1016     printf("command='%s'\n", line_buf);
1017 #endif
1018     p = line_buf;
1019     ch = *p++;
1020     switch(ch) {
1021     case '?':
1022         /* TODO: Make this return the correct value for user-mode.  */
1023         snprintf(buf, sizeof(buf), "S%02x", SIGTRAP);
1024         put_packet(s, buf);
1025         break;
1026     case 'c':
1027         if (*p != '\0') {
1028             addr = strtoull(p, (char **)&p, 16);
1029 #if defined(TARGET_I386)
1030             env->eip = addr;
1031 #ifdef USE_KVM
1032             kvm_load_registers(env);
1033 #endif
1034 #elif defined (TARGET_PPC)
1035             env->nip = addr;
1036 #elif defined (TARGET_SPARC)
1037             env->pc = addr;
1038             env->npc = addr + 4;
1039 #elif defined (TARGET_ARM)
1040             env->regs[15] = addr;
1041 #elif defined (TARGET_SH4)
1042             env->pc = addr;
1043 #elif defined (TARGET_MIPS)
1044             env->PC[env->current_tc] = addr;
1045 #elif defined (TARGET_CRIS)
1046             env->pc = addr;
1047 #endif
1048         }
1049 #ifdef CONFIG_USER_ONLY
1050         s->running_state = 1;
1051 #else
1052         vm_start();
1053 #endif
1054         return RS_IDLE;
1055     case 's':
1056         if (*p != '\0') {
1057             addr = strtoull(p, (char **)&p, 16);
1058 #if defined(TARGET_I386)
1059             env->eip = addr;
1060 #ifdef USE_KVM
1061             kvm_load_registers(env);
1062 #endif
1063 #elif defined (TARGET_PPC)
1064             env->nip = addr;
1065 #elif defined (TARGET_SPARC)
1066             env->pc = addr;
1067             env->npc = addr + 4;
1068 #elif defined (TARGET_ARM)
1069             env->regs[15] = addr;
1070 #elif defined (TARGET_SH4)
1071             env->pc = addr;
1072 #elif defined (TARGET_MIPS)
1073             env->PC[env->current_tc] = addr;
1074 #elif defined (TARGET_CRIS)
1075             env->pc = addr;
1076 #endif
1077         }
1078         cpu_single_step(env, 1);
1079 #ifdef CONFIG_USER_ONLY
1080         s->running_state = 1;
1081 #else
1082         vm_start();
1083 #endif
1084         return RS_IDLE;
1085     case 'F':
1086         {
1087             target_ulong ret;
1088             target_ulong err;
1089
1090             ret = strtoull(p, (char **)&p, 16);
1091             if (*p == ',') {
1092                 p++;
1093                 err = strtoull(p, (char **)&p, 16);
1094             } else {
1095                 err = 0;
1096             }
1097             if (*p == ',')
1098                 p++;
1099             type = *p;
1100             if (gdb_current_syscall_cb)
1101                 gdb_current_syscall_cb(s->env, ret, err);
1102             if (type == 'C') {
1103                 put_packet(s, "T02");
1104             } else {
1105 #ifdef CONFIG_USER_ONLY
1106                 s->running_state = 1;
1107 #else
1108                 vm_start();
1109 #endif
1110             }
1111         }
1112         break;
1113     case 'g':
1114 #ifdef USE_KVM
1115         kvm_save_registers(env);
1116 #endif
1117         reg_size = cpu_gdb_read_registers(env, mem_buf);
1118         memtohex(buf, mem_buf, reg_size);
1119         put_packet(s, buf);
1120         break;
1121     case 'G':
1122         registers = (void *)mem_buf;
1123         len = strlen(p) / 2;
1124         hextomem((uint8_t *)registers, p, len);
1125         cpu_gdb_write_registers(env, mem_buf, len);
1126 #ifdef USE_KVM
1127         kvm_load_registers(env);
1128 #endif
1129         put_packet(s, "OK");
1130         break;
1131     case 'm':
1132         addr = strtoull(p, (char **)&p, 16);
1133         if (*p == ',')
1134             p++;
1135         len = strtoull(p, NULL, 16);
1136         if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) {
1137             put_packet (s, "E14");
1138         } else {
1139             memtohex(buf, mem_buf, len);
1140             put_packet(s, buf);
1141         }
1142         break;
1143     case 'M':
1144         addr = strtoull(p, (char **)&p, 16);
1145         if (*p == ',')
1146             p++;
1147         len = strtoull(p, (char **)&p, 16);
1148         if (*p == ':')
1149             p++;
1150         hextomem(mem_buf, p, len);
1151         if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0)
1152             put_packet(s, "E14");
1153         else
1154             put_packet(s, "OK");
1155         break;
1156     case 'Z':
1157         type = strtoul(p, (char **)&p, 16);
1158         if (*p == ',')
1159             p++;
1160         addr = strtoull(p, (char **)&p, 16);
1161         if (*p == ',')
1162             p++;
1163         len = strtoull(p, (char **)&p, 16);
1164         if (type == 0 || type == 1) {
1165             if (cpu_breakpoint_insert(env, addr) < 0)
1166                 goto breakpoint_error;
1167             put_packet(s, "OK");
1168 #ifndef CONFIG_USER_ONLY
1169         } else if (type == 2) {
1170             if (cpu_watchpoint_insert(env, addr) < 0)
1171                 goto breakpoint_error;
1172             put_packet(s, "OK");
1173 #endif
1174         } else {
1175         breakpoint_error:
1176             put_packet(s, "E22");
1177         }
1178         break;
1179     case 'z':
1180         type = strtoul(p, (char **)&p, 16);
1181         if (*p == ',')
1182             p++;
1183         addr = strtoull(p, (char **)&p, 16);
1184         if (*p == ',')
1185             p++;
1186         len = strtoull(p, (char **)&p, 16);
1187         if (type == 0 || type == 1) {
1188             cpu_breakpoint_remove(env, addr);
1189             put_packet(s, "OK");
1190 #ifndef CONFIG_USER_ONLY
1191         } else if (type == 2) {
1192             cpu_watchpoint_remove(env, addr);
1193             put_packet(s, "OK");
1194 #endif
1195         } else {
1196             goto breakpoint_error;
1197         }
1198         break;
1199 #ifdef CONFIG_LINUX_USER
1200     case 'q':
1201         if (strncmp(p, "Offsets", 7) == 0) {
1202             TaskState *ts = env->opaque;
1203
1204             sprintf(buf,
1205                     "Text=" TARGET_ABI_FMT_lx ";Data=" TARGET_ABI_FMT_lx
1206                     ";Bss=" TARGET_ABI_FMT_lx,
1207                     ts->info->code_offset,
1208                     ts->info->data_offset,
1209                     ts->info->data_offset);
1210             put_packet(s, buf);
1211             break;
1212         }
1213         /* Fall through.  */
1214 #endif
1215     default:
1216         //        unknown_command:
1217         /* put empty packet */
1218         buf[0] = '\0';
1219         put_packet(s, buf);
1220         break;
1221     }
1222     return RS_IDLE;
1223 }
1224
1225 extern void tb_flush(CPUState *env);
1226
1227 #ifndef CONFIG_USER_ONLY
1228 static void gdb_vm_stopped(void *opaque, int reason)
1229 {
1230     GDBState *s = opaque;
1231     char buf[256];
1232     int ret;
1233
1234     if (s->state == RS_SYSCALL)
1235         return;
1236
1237     /* disable single step if it was enable */
1238     cpu_single_step(s->env, 0);
1239
1240     if (reason == EXCP_DEBUG) {
1241         if (s->env->watchpoint_hit) {
1242             snprintf(buf, sizeof(buf), "T%02xwatch:" TARGET_FMT_lx ";",
1243                      SIGTRAP,
1244                      s->env->watchpoint[s->env->watchpoint_hit - 1].vaddr);
1245             put_packet(s, buf);
1246             s->env->watchpoint_hit = 0;
1247             return;
1248         }
1249         tb_flush(s->env);
1250         ret = SIGTRAP;
1251     } else if (reason == EXCP_INTERRUPT) {
1252         ret = SIGINT;
1253     } else {
1254         ret = 0;
1255     }
1256     snprintf(buf, sizeof(buf), "S%02x", ret);
1257     put_packet(s, buf);
1258 }
1259 #endif
1260
1261 /* Send a gdb syscall request.
1262    This accepts limited printf-style format specifiers, specifically:
1263     %x  - target_ulong argument printed in hex.
1264     %lx - 64-bit argument printed in hex.
1265     %s  - string pointer (target_ulong) and length (int) pair.  */
1266 void gdb_do_syscall(gdb_syscall_complete_cb cb, char *fmt, ...)
1267 {
1268     va_list va;
1269     char buf[256];
1270     char *p;
1271     target_ulong addr;
1272     uint64_t i64;
1273     GDBState *s;
1274
1275     s = gdb_syscall_state;
1276     if (!s)
1277         return;
1278     gdb_current_syscall_cb = cb;
1279     s->state = RS_SYSCALL;
1280 #ifndef CONFIG_USER_ONLY
1281     vm_stop(EXCP_DEBUG);
1282 #endif
1283     s->state = RS_IDLE;
1284     va_start(va, fmt);
1285     p = buf;
1286     *(p++) = 'F';
1287     while (*fmt) {
1288         if (*fmt == '%') {
1289             fmt++;
1290             switch (*fmt++) {
1291             case 'x':
1292                 addr = va_arg(va, target_ulong);
1293                 p += sprintf(p, TARGET_FMT_lx, addr);
1294                 break;
1295             case 'l':
1296                 if (*(fmt++) != 'x')
1297                     goto bad_format;
1298                 i64 = va_arg(va, uint64_t);
1299                 p += sprintf(p, "%" PRIx64, i64);
1300                 break;
1301             case 's':
1302                 addr = va_arg(va, target_ulong);
1303                 p += sprintf(p, TARGET_FMT_lx "/%x", addr, va_arg(va, int));
1304                 break;
1305             default:
1306             bad_format:
1307                 fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
1308                         fmt - 1);
1309                 break;
1310             }
1311         } else {
1312             *(p++) = *(fmt++);
1313         }
1314     }
1315     *p = 0;
1316     va_end(va);
1317     put_packet(s, buf);
1318 #ifdef CONFIG_USER_ONLY
1319     gdb_handlesig(s->env, 0);
1320 #else
1321     cpu_interrupt(s->env, CPU_INTERRUPT_EXIT);
1322 #endif
1323 }
1324
1325 static void gdb_read_byte(GDBState *s, int ch)
1326 {
1327     CPUState *env = s->env;
1328     int i, csum;
1329     uint8_t reply;
1330
1331 #ifndef CONFIG_USER_ONLY
1332     if (s->last_packet_len) {
1333         /* Waiting for a response to the last packet.  If we see the start
1334            of a new command then abandon the previous response.  */
1335         if (ch == '-') {
1336 #ifdef DEBUG_GDB
1337             printf("Got NACK, retransmitting\n");
1338 #endif
1339             put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
1340         }
1341 #ifdef DEBUG_GDB
1342         else if (ch == '+')
1343             printf("Got ACK\n");
1344         else
1345             printf("Got '%c' when expecting ACK/NACK\n", ch);
1346 #endif
1347         if (ch == '+' || ch == '$')
1348             s->last_packet_len = 0;
1349         if (ch != '$')
1350             return;
1351     }
1352     if (vm_running) {
1353         /* when the CPU is running, we cannot do anything except stop
1354            it when receiving a char */
1355         vm_stop(EXCP_INTERRUPT);
1356     } else
1357 #endif
1358     {
1359         switch(s->state) {
1360         case RS_IDLE:
1361             if (ch == '$') {
1362                 s->line_buf_index = 0;
1363                 s->state = RS_GETLINE;
1364             }
1365             break;
1366         case RS_GETLINE:
1367             if (ch == '#') {
1368             s->state = RS_CHKSUM1;
1369             } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
1370                 s->state = RS_IDLE;
1371             } else {
1372             s->line_buf[s->line_buf_index++] = ch;
1373             }
1374             break;
1375         case RS_CHKSUM1:
1376             s->line_buf[s->line_buf_index] = '\0';
1377             s->line_csum = fromhex(ch) << 4;
1378             s->state = RS_CHKSUM2;
1379             break;
1380         case RS_CHKSUM2:
1381             s->line_csum |= fromhex(ch);
1382             csum = 0;
1383             for(i = 0; i < s->line_buf_index; i++) {
1384                 csum += s->line_buf[i];
1385             }
1386             if (s->line_csum != (csum & 0xff)) {
1387                 reply = '-';
1388                 put_buffer(s, &reply, 1);
1389                 s->state = RS_IDLE;
1390             } else {
1391                 reply = '+';
1392                 put_buffer(s, &reply, 1);
1393                 s->state = gdb_handle_packet(s, env, s->line_buf);
1394             }
1395             break;
1396         default:
1397             abort();
1398         }
1399     }
1400 }
1401
1402 #ifdef CONFIG_USER_ONLY
1403 int
1404 gdb_handlesig (CPUState *env, int sig)
1405 {
1406   GDBState *s;
1407   char buf[256];
1408   int n;
1409
1410   if (gdbserver_fd < 0)
1411     return sig;
1412
1413   s = &gdbserver_state;
1414
1415   /* disable single step if it was enabled */
1416   cpu_single_step(env, 0);
1417   tb_flush(env);
1418
1419   if (sig != 0)
1420     {
1421       snprintf(buf, sizeof(buf), "S%02x", sig);
1422       put_packet(s, buf);
1423     }
1424
1425   sig = 0;
1426   s->state = RS_IDLE;
1427   s->running_state = 0;
1428   while (s->running_state == 0) {
1429       n = read (s->fd, buf, 256);
1430       if (n > 0)
1431         {
1432           int i;
1433
1434           for (i = 0; i < n; i++)
1435             gdb_read_byte (s, buf[i]);
1436         }
1437       else if (n == 0 || errno != EAGAIN)
1438         {
1439           /* XXX: Connection closed.  Should probably wait for annother
1440              connection before continuing.  */
1441           return sig;
1442         }
1443   }
1444   return sig;
1445 }
1446
1447 /* Tell the remote gdb that the process has exited.  */
1448 void gdb_exit(CPUState *env, int code)
1449 {
1450   GDBState *s;
1451   char buf[4];
1452
1453   if (gdbserver_fd < 0)
1454     return;
1455
1456   s = &gdbserver_state;
1457
1458   snprintf(buf, sizeof(buf), "W%02x", code);
1459   put_packet(s, buf);
1460 }
1461
1462
1463 static void gdb_accept(void *opaque)
1464 {
1465     GDBState *s;
1466     struct sockaddr_in sockaddr;
1467     socklen_t len;
1468     int val, fd;
1469
1470     for(;;) {
1471         len = sizeof(sockaddr);
1472         fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
1473         if (fd < 0 && errno != EINTR) {
1474             perror("accept");
1475             return;
1476         } else if (fd >= 0) {
1477             break;
1478         }
1479     }
1480
1481     /* set short latency */
1482     val = 1;
1483     setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val));
1484
1485     s = &gdbserver_state;
1486     memset (s, 0, sizeof (GDBState));
1487     s->env = first_cpu; /* XXX: allow to change CPU */
1488     s->fd = fd;
1489
1490     gdb_syscall_state = s;
1491
1492     fcntl(fd, F_SETFL, O_NONBLOCK);
1493 }
1494
1495 static int gdbserver_open(int port)
1496 {
1497     struct sockaddr_in sockaddr;
1498     int fd, val, ret;
1499
1500     fd = socket(PF_INET, SOCK_STREAM, 0);
1501     if (fd < 0) {
1502         perror("socket");
1503         return -1;
1504     }
1505
1506     /* allow fast reuse */
1507     val = 1;
1508     setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val));
1509
1510     sockaddr.sin_family = AF_INET;
1511     sockaddr.sin_port = htons(port);
1512     sockaddr.sin_addr.s_addr = 0;
1513     ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
1514     if (ret < 0) {
1515         perror("bind");
1516         return -1;
1517     }
1518     ret = listen(fd, 0);
1519     if (ret < 0) {
1520         perror("listen");
1521         return -1;
1522     }
1523     return fd;
1524 }
1525
1526 int gdbserver_start(int port)
1527 {
1528     gdbserver_fd = gdbserver_open(port);
1529     if (gdbserver_fd < 0)
1530         return -1;
1531     /* accept connections */
1532     gdb_accept (NULL);
1533     return 0;
1534 }
1535 #else
1536 static int gdb_chr_can_receive(void *opaque)
1537 {
1538   return 1;
1539 }
1540
1541 static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size)
1542 {
1543     GDBState *s = opaque;
1544     int i;
1545
1546     for (i = 0; i < size; i++) {
1547         gdb_read_byte(s, buf[i]);
1548     }
1549 }
1550
1551 static void gdb_chr_event(void *opaque, int event)
1552 {
1553     switch (event) {
1554     case CHR_EVENT_RESET:
1555         vm_stop(EXCP_INTERRUPT);
1556         gdb_syscall_state = opaque;
1557         break;
1558     default:
1559         break;
1560     }
1561 }
1562
1563 int gdbserver_start(const char *port)
1564 {
1565     GDBState *s;
1566     char gdbstub_port_name[128];
1567     int port_num;
1568     char *p;
1569     CharDriverState *chr;
1570
1571     if (!port || !*port)
1572       return -1;
1573
1574     port_num = strtol(port, &p, 10);
1575     if (*p == 0) {
1576         /* A numeric value is interpreted as a port number.  */
1577         snprintf(gdbstub_port_name, sizeof(gdbstub_port_name),
1578                  "tcp::%d,nowait,nodelay,server", port_num);
1579         port = gdbstub_port_name;
1580     }
1581
1582     chr = qemu_chr_open(port);
1583     if (!chr)
1584         return -1;
1585
1586     s = qemu_mallocz(sizeof(GDBState));
1587     if (!s) {
1588         return -1;
1589     }
1590     s->env = first_cpu; /* XXX: allow to change CPU */
1591     s->chr = chr;
1592     qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive,
1593                           gdb_chr_event, s);
1594     qemu_add_vm_stop_handler(gdb_vm_stopped, s);
1595     return 0;
1596 }
1597 #endif