4 * Copyright (c) 2003-2005 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 #ifdef CONFIG_USER_ONLY
32 #include "qemu-common.h"
33 #include "qemu-char.h"
39 #include "qemu_socket.h"
41 /* XXX: these constants may be independent of the host ones even for Unix */
61 typedef struct GDBState
{
62 CPUState
*env
; /* current CPU */
63 enum RSState state
; /* parsing state */
67 uint8_t last_packet
[4100];
70 #ifdef CONFIG_USER_ONLY
78 /* By default use no IRQs and no timers while single stepping so as to
79 * make single stepping like an ICE HW step.
81 static int sstep_flags
= SSTEP_ENABLE
|SSTEP_NOIRQ
|SSTEP_NOTIMER
;
83 #ifdef CONFIG_USER_ONLY
84 /* XXX: This is not thread safe. Do we care? */
85 static int gdbserver_fd
= -1;
87 /* XXX: remove this hack. */
88 static GDBState gdbserver_state
;
90 static int get_char(GDBState
*s
)
96 ret
= recv(s
->fd
, &ch
, 1, 0);
98 if (errno
== ECONNRESET
)
100 if (errno
!= EINTR
&& errno
!= EAGAIN
)
102 } else if (ret
== 0) {
114 /* GDB stub state for use by semihosting syscalls. */
115 static GDBState
*gdb_syscall_state
;
116 static gdb_syscall_complete_cb gdb_current_syscall_cb
;
124 /* If gdb is connected when the first semihosting syscall occurs then use
125 remote gdb syscalls. Otherwise use native file IO. */
126 int use_gdb_syscalls(void)
128 if (gdb_syscall_mode
== GDB_SYS_UNKNOWN
) {
129 gdb_syscall_mode
= (gdb_syscall_state
? GDB_SYS_ENABLED
132 return gdb_syscall_mode
== GDB_SYS_ENABLED
;
135 /* Resume execution. */
136 static inline void gdb_continue(GDBState
*s
)
138 #ifdef CONFIG_USER_ONLY
139 s
->running_state
= 1;
145 static void put_buffer(GDBState
*s
, const uint8_t *buf
, int len
)
147 #ifdef CONFIG_USER_ONLY
151 ret
= send(s
->fd
, buf
, len
, 0);
153 if (errno
!= EINTR
&& errno
!= EAGAIN
)
161 qemu_chr_write(s
->chr
, buf
, len
);
165 static inline int fromhex(int v
)
167 if (v
>= '0' && v
<= '9')
169 else if (v
>= 'A' && v
<= 'F')
171 else if (v
>= 'a' && v
<= 'f')
177 static inline int tohex(int v
)
185 static void memtohex(char *buf
, const uint8_t *mem
, int len
)
190 for(i
= 0; i
< len
; i
++) {
192 *q
++ = tohex(c
>> 4);
193 *q
++ = tohex(c
& 0xf);
198 static void hextomem(uint8_t *mem
, const char *buf
, int len
)
202 for(i
= 0; i
< len
; i
++) {
203 mem
[i
] = (fromhex(buf
[0]) << 4) | fromhex(buf
[1]);
208 /* return -1 if error, 0 if OK */
209 static int put_packet(GDBState
*s
, char *buf
)
215 printf("reply='%s'\n", buf
);
225 for(i
= 0; i
< len
; i
++) {
229 *(p
++) = tohex((csum
>> 4) & 0xf);
230 *(p
++) = tohex((csum
) & 0xf);
232 s
->last_packet_len
= p
- s
->last_packet
;
233 put_buffer(s
, (uint8_t *)s
->last_packet
, s
->last_packet_len
);
235 #ifdef CONFIG_USER_ONLY
248 #if defined(TARGET_I386)
251 static const uint8_t gdb_x86_64_regs
[16] = {
252 R_EAX
, R_EBX
, R_ECX
, R_EDX
, R_ESI
, R_EDI
, R_EBP
, R_ESP
,
253 8, 9, 10, 11, 12, 13, 14, 15,
257 static int cpu_gdb_read_registers(CPUState
*env
, uint8_t *mem_buf
)
259 int i
, fpus
, nb_regs
;
264 if (env
->hflags
& HF_CS64_MASK
) {
266 for(i
= 0; i
< 16; i
++) {
267 *(uint64_t *)p
= tswap64(env
->regs
[gdb_x86_64_regs
[i
]]);
270 *(uint64_t *)p
= tswap64(env
->eip
);
276 for(i
= 0; i
< 8; i
++) {
277 *(uint32_t *)p
= tswap32(env
->regs
[i
]);
280 *(uint32_t *)p
= tswap32(env
->eip
);
284 *(uint32_t *)p
= tswap32(env
->eflags
);
286 *(uint32_t *)p
= tswap32(env
->segs
[R_CS
].selector
);
288 *(uint32_t *)p
= tswap32(env
->segs
[R_SS
].selector
);
290 *(uint32_t *)p
= tswap32(env
->segs
[R_DS
].selector
);
292 *(uint32_t *)p
= tswap32(env
->segs
[R_ES
].selector
);
294 *(uint32_t *)p
= tswap32(env
->segs
[R_FS
].selector
);
296 *(uint32_t *)p
= tswap32(env
->segs
[R_GS
].selector
);
298 for(i
= 0; i
< 8; i
++) {
299 /* XXX: convert floats */
300 #ifdef USE_X86LDOUBLE
301 memcpy(p
, &env
->fpregs
[i
], 10);
307 *(uint32_t *)p
= tswap32(env
->fpuc
); /* fctrl */
309 fpus
= (env
->fpus
& ~0x3800) | (env
->fpstt
& 0x7) << 11;
310 *(uint32_t *)p
= tswap32(fpus
); /* fstat */
312 *(uint32_t *)p
= 0; /* ftag */
314 *(uint32_t *)p
= 0; /* fiseg */
316 *(uint32_t *)p
= 0; /* fioff */
318 *(uint32_t *)p
= 0; /* foseg */
320 *(uint32_t *)p
= 0; /* fooff */
322 *(uint32_t *)p
= 0; /* fop */
324 for(i
= 0; i
< nb_regs
; i
++) {
325 *(uint64_t *)p
= tswap64(env
->xmm_regs
[i
].XMM_Q(0));
327 *(uint64_t *)p
= tswap64(env
->xmm_regs
[i
].XMM_Q(1));
330 *(uint32_t *)p
= tswap32(env
->mxcsr
);
335 static inline void cpu_gdb_load_seg(CPUState
*env
, const uint8_t **pp
,
341 sel
= tswap32(*(uint32_t *)p
);
343 if (sel
!= env
->segs
[sreg
].selector
) {
344 #if defined(CONFIG_USER_ONLY)
345 cpu_x86_load_seg(env
, sreg
, sel
);
347 /* XXX: do it with a debug function which does not raise an
354 static void cpu_gdb_write_registers(CPUState
*env
, uint8_t *mem_buf
, int size
)
356 const uint8_t *p
= mem_buf
;
361 if (env
->hflags
& HF_CS64_MASK
) {
363 for(i
= 0; i
< 16; i
++) {
364 env
->regs
[gdb_x86_64_regs
[i
]] = tswap64(*(uint64_t *)p
);
367 env
->eip
= tswap64(*(uint64_t *)p
);
373 for(i
= 0; i
< 8; i
++) {
374 env
->regs
[i
] = tswap32(*(uint32_t *)p
);
377 env
->eip
= tswap32(*(uint32_t *)p
);
380 env
->eflags
= tswap32(*(uint32_t *)p
);
382 cpu_gdb_load_seg(env
, &p
, R_CS
);
383 cpu_gdb_load_seg(env
, &p
, R_SS
);
384 cpu_gdb_load_seg(env
, &p
, R_DS
);
385 cpu_gdb_load_seg(env
, &p
, R_ES
);
386 cpu_gdb_load_seg(env
, &p
, R_FS
);
387 cpu_gdb_load_seg(env
, &p
, R_GS
);
390 for(i
= 0; i
< 8; i
++) {
391 /* XXX: convert floats */
392 #ifdef USE_X86LDOUBLE
393 memcpy(&env
->fpregs
[i
], p
, 10);
397 env
->fpuc
= tswap32(*(uint32_t *)p
); /* fctrl */
399 fpus
= tswap32(*(uint32_t *)p
);
401 env
->fpstt
= (fpus
>> 11) & 7;
402 env
->fpus
= fpus
& ~0x3800;
405 if (size
>= ((p
- mem_buf
) + 16 * nb_regs
+ 4)) {
407 for(i
= 0; i
< nb_regs
; i
++) {
408 env
->xmm_regs
[i
].XMM_Q(0) = tswap64(*(uint64_t *)p
);
410 env
->xmm_regs
[i
].XMM_Q(1) = tswap64(*(uint64_t *)p
);
413 env
->mxcsr
= tswap32(*(uint32_t *)p
);
418 #elif defined (TARGET_PPC)
419 static int cpu_gdb_read_registers(CPUState
*env
, uint8_t *mem_buf
)
421 uint32_t *registers
= (uint32_t *)mem_buf
, tmp
;
425 for(i
= 0; i
< 32; i
++) {
426 registers
[i
] = tswapl(env
->gpr
[i
]);
429 for (i
= 0; i
< 32; i
++) {
430 registers
[(i
* 2) + 32] = tswapl(*((uint32_t *)&env
->fpr
[i
]));
431 registers
[(i
* 2) + 33] = tswapl(*((uint32_t *)&env
->fpr
[i
] + 1));
433 /* nip, msr, ccr, lnk, ctr, xer, mq */
434 registers
[96] = tswapl(env
->nip
);
435 registers
[97] = tswapl(env
->msr
);
437 for (i
= 0; i
< 8; i
++)
438 tmp
|= env
->crf
[i
] << (32 - ((i
+ 1) * 4));
439 registers
[98] = tswapl(tmp
);
440 registers
[99] = tswapl(env
->lr
);
441 registers
[100] = tswapl(env
->ctr
);
442 registers
[101] = tswapl(ppc_load_xer(env
));
448 static void cpu_gdb_write_registers(CPUState
*env
, uint8_t *mem_buf
, int size
)
450 uint32_t *registers
= (uint32_t *)mem_buf
;
454 for (i
= 0; i
< 32; i
++) {
455 env
->gpr
[i
] = tswapl(registers
[i
]);
458 for (i
= 0; i
< 32; i
++) {
459 *((uint32_t *)&env
->fpr
[i
]) = tswapl(registers
[(i
* 2) + 32]);
460 *((uint32_t *)&env
->fpr
[i
] + 1) = tswapl(registers
[(i
* 2) + 33]);
462 /* nip, msr, ccr, lnk, ctr, xer, mq */
463 env
->nip
= tswapl(registers
[96]);
464 ppc_store_msr(env
, tswapl(registers
[97]));
465 registers
[98] = tswapl(registers
[98]);
466 for (i
= 0; i
< 8; i
++)
467 env
->crf
[i
] = (registers
[98] >> (32 - ((i
+ 1) * 4))) & 0xF;
468 env
->lr
= tswapl(registers
[99]);
469 env
->ctr
= tswapl(registers
[100]);
470 ppc_store_xer(env
, tswapl(registers
[101]));
472 #elif defined (TARGET_SPARC)
473 static int cpu_gdb_read_registers(CPUState
*env
, uint8_t *mem_buf
)
475 target_ulong
*registers
= (target_ulong
*)mem_buf
;
479 for(i
= 0; i
< 8; i
++) {
480 registers
[i
] = tswapl(env
->gregs
[i
]);
482 /* fill in register window */
483 for(i
= 0; i
< 24; i
++) {
484 registers
[i
+ 8] = tswapl(env
->regwptr
[i
]);
486 #ifndef TARGET_SPARC64
488 for (i
= 0; i
< 32; i
++) {
489 registers
[i
+ 32] = tswapl(*((uint32_t *)&env
->fpr
[i
]));
491 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
492 registers
[64] = tswapl(env
->y
);
497 registers
[65] = tswapl(tmp
);
499 registers
[66] = tswapl(env
->wim
);
500 registers
[67] = tswapl(env
->tbr
);
501 registers
[68] = tswapl(env
->pc
);
502 registers
[69] = tswapl(env
->npc
);
503 registers
[70] = tswapl(env
->fsr
);
504 registers
[71] = 0; /* csr */
506 return 73 * sizeof(target_ulong
);
509 for (i
= 0; i
< 64; i
+= 2) {
512 tmp
= ((uint64_t)*(uint32_t *)&env
->fpr
[i
]) << 32;
513 tmp
|= *(uint32_t *)&env
->fpr
[i
+ 1];
514 registers
[i
/ 2 + 32] = tswap64(tmp
);
516 registers
[64] = tswapl(env
->pc
);
517 registers
[65] = tswapl(env
->npc
);
518 registers
[66] = tswapl(((uint64_t)GET_CCR(env
) << 32) |
519 ((env
->asi
& 0xff) << 24) |
520 ((env
->pstate
& 0xfff) << 8) |
522 registers
[67] = tswapl(env
->fsr
);
523 registers
[68] = tswapl(env
->fprs
);
524 registers
[69] = tswapl(env
->y
);
525 return 70 * sizeof(target_ulong
);
529 static void cpu_gdb_write_registers(CPUState
*env
, uint8_t *mem_buf
, int size
)
531 target_ulong
*registers
= (target_ulong
*)mem_buf
;
535 for(i
= 0; i
< 7; i
++) {
536 env
->gregs
[i
] = tswapl(registers
[i
]);
538 /* fill in register window */
539 for(i
= 0; i
< 24; i
++) {
540 env
->regwptr
[i
] = tswapl(registers
[i
+ 8]);
542 #ifndef TARGET_SPARC64
544 for (i
= 0; i
< 32; i
++) {
545 *((uint32_t *)&env
->fpr
[i
]) = tswapl(registers
[i
+ 32]);
547 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
548 env
->y
= tswapl(registers
[64]);
549 PUT_PSR(env
, tswapl(registers
[65]));
550 env
->wim
= tswapl(registers
[66]);
551 env
->tbr
= tswapl(registers
[67]);
552 env
->pc
= tswapl(registers
[68]);
553 env
->npc
= tswapl(registers
[69]);
554 env
->fsr
= tswapl(registers
[70]);
556 for (i
= 0; i
< 64; i
+= 2) {
559 tmp
= tswap64(registers
[i
/ 2 + 32]);
560 *((uint32_t *)&env
->fpr
[i
]) = tmp
>> 32;
561 *((uint32_t *)&env
->fpr
[i
+ 1]) = tmp
& 0xffffffff;
563 env
->pc
= tswapl(registers
[64]);
564 env
->npc
= tswapl(registers
[65]);
566 uint64_t tmp
= tswapl(registers
[66]);
568 PUT_CCR(env
, tmp
>> 32);
569 env
->asi
= (tmp
>> 24) & 0xff;
570 env
->pstate
= (tmp
>> 8) & 0xfff;
571 PUT_CWP64(env
, tmp
& 0xff);
573 env
->fsr
= tswapl(registers
[67]);
574 env
->fprs
= tswapl(registers
[68]);
575 env
->y
= tswapl(registers
[69]);
578 #elif defined (TARGET_ARM)
579 static int cpu_gdb_read_registers(CPUState
*env
, uint8_t *mem_buf
)
585 /* 16 core integer registers (4 bytes each). */
586 for (i
= 0; i
< 16; i
++)
588 *(uint32_t *)ptr
= tswapl(env
->regs
[i
]);
591 /* 8 FPA registers (12 bytes each), FPS (4 bytes).
592 Not yet implemented. */
593 memset (ptr
, 0, 8 * 12 + 4);
595 /* CPSR (4 bytes). */
596 *(uint32_t *)ptr
= tswapl (cpsr_read(env
));
599 return ptr
- mem_buf
;
602 static void cpu_gdb_write_registers(CPUState
*env
, uint8_t *mem_buf
, int size
)
608 /* Core integer registers. */
609 for (i
= 0; i
< 16; i
++)
611 env
->regs
[i
] = tswapl(*(uint32_t *)ptr
);
614 /* Ignore FPA regs and scr. */
616 cpsr_write (env
, tswapl(*(uint32_t *)ptr
), 0xffffffff);
618 #elif defined (TARGET_M68K)
619 static int cpu_gdb_read_registers(CPUState
*env
, uint8_t *mem_buf
)
627 for (i
= 0; i
< 8; i
++) {
628 *(uint32_t *)ptr
= tswapl(env
->dregs
[i
]);
632 for (i
= 0; i
< 8; i
++) {
633 *(uint32_t *)ptr
= tswapl(env
->aregs
[i
]);
636 *(uint32_t *)ptr
= tswapl(env
->sr
);
638 *(uint32_t *)ptr
= tswapl(env
->pc
);
640 /* F0-F7. The 68881/68040 have 12-bit extended precision registers.
641 ColdFire has 8-bit double precision registers. */
642 for (i
= 0; i
< 8; i
++) {
644 *(uint32_t *)ptr
= tswap32(u
.l
.upper
);
645 *(uint32_t *)ptr
= tswap32(u
.l
.lower
);
647 /* FP control regs (not implemented). */
648 memset (ptr
, 0, 3 * 4);
651 return ptr
- mem_buf
;
654 static void cpu_gdb_write_registers(CPUState
*env
, uint8_t *mem_buf
, int size
)
662 for (i
= 0; i
< 8; i
++) {
663 env
->dregs
[i
] = tswapl(*(uint32_t *)ptr
);
667 for (i
= 0; i
< 8; i
++) {
668 env
->aregs
[i
] = tswapl(*(uint32_t *)ptr
);
671 env
->sr
= tswapl(*(uint32_t *)ptr
);
673 env
->pc
= tswapl(*(uint32_t *)ptr
);
675 /* F0-F7. The 68881/68040 have 12-bit extended precision registers.
676 ColdFire has 8-bit double precision registers. */
677 for (i
= 0; i
< 8; i
++) {
678 u
.l
.upper
= tswap32(*(uint32_t *)ptr
);
679 u
.l
.lower
= tswap32(*(uint32_t *)ptr
);
682 /* FP control regs (not implemented). */
685 #elif defined (TARGET_MIPS)
686 static int cpu_gdb_read_registers(CPUState
*env
, uint8_t *mem_buf
)
692 for (i
= 0; i
< 32; i
++)
694 *(target_ulong
*)ptr
= tswapl(env
->gpr
[env
->current_tc
][i
]);
695 ptr
+= sizeof(target_ulong
);
698 *(target_ulong
*)ptr
= (int32_t)tswap32(env
->CP0_Status
);
699 ptr
+= sizeof(target_ulong
);
701 *(target_ulong
*)ptr
= tswapl(env
->LO
[env
->current_tc
][0]);
702 ptr
+= sizeof(target_ulong
);
704 *(target_ulong
*)ptr
= tswapl(env
->HI
[env
->current_tc
][0]);
705 ptr
+= sizeof(target_ulong
);
707 *(target_ulong
*)ptr
= tswapl(env
->CP0_BadVAddr
);
708 ptr
+= sizeof(target_ulong
);
710 *(target_ulong
*)ptr
= (int32_t)tswap32(env
->CP0_Cause
);
711 ptr
+= sizeof(target_ulong
);
713 *(target_ulong
*)ptr
= tswapl(env
->PC
[env
->current_tc
]);
714 ptr
+= sizeof(target_ulong
);
716 if (env
->CP0_Config1
& (1 << CP0C1_FP
))
718 for (i
= 0; i
< 32; i
++)
720 if (env
->CP0_Status
& (1 << CP0St_FR
))
721 *(target_ulong
*)ptr
= tswapl(env
->fpu
->fpr
[i
].d
);
723 *(target_ulong
*)ptr
= tswap32(env
->fpu
->fpr
[i
].w
[FP_ENDIAN_IDX
]);
724 ptr
+= sizeof(target_ulong
);
727 *(target_ulong
*)ptr
= (int32_t)tswap32(env
->fpu
->fcr31
);
728 ptr
+= sizeof(target_ulong
);
730 *(target_ulong
*)ptr
= (int32_t)tswap32(env
->fpu
->fcr0
);
731 ptr
+= sizeof(target_ulong
);
734 /* "fp", pseudo frame pointer. Not yet implemented in gdb. */
735 *(target_ulong
*)ptr
= 0;
736 ptr
+= sizeof(target_ulong
);
738 /* Registers for embedded use, we just pad them. */
739 for (i
= 0; i
< 16; i
++)
741 *(target_ulong
*)ptr
= 0;
742 ptr
+= sizeof(target_ulong
);
746 *(target_ulong
*)ptr
= (int32_t)tswap32(env
->CP0_PRid
);
747 ptr
+= sizeof(target_ulong
);
749 return ptr
- mem_buf
;
752 /* convert MIPS rounding mode in FCR31 to IEEE library */
753 static unsigned int ieee_rm
[] =
755 float_round_nearest_even
,
760 #define RESTORE_ROUNDING_MODE \
761 set_float_rounding_mode(ieee_rm[env->fpu->fcr31 & 3], &env->fpu->fp_status)
763 static void cpu_gdb_write_registers(CPUState
*env
, uint8_t *mem_buf
, int size
)
769 for (i
= 0; i
< 32; i
++)
771 env
->gpr
[env
->current_tc
][i
] = tswapl(*(target_ulong
*)ptr
);
772 ptr
+= sizeof(target_ulong
);
775 env
->CP0_Status
= tswapl(*(target_ulong
*)ptr
);
776 ptr
+= sizeof(target_ulong
);
778 env
->LO
[env
->current_tc
][0] = tswapl(*(target_ulong
*)ptr
);
779 ptr
+= sizeof(target_ulong
);
781 env
->HI
[env
->current_tc
][0] = tswapl(*(target_ulong
*)ptr
);
782 ptr
+= sizeof(target_ulong
);
784 env
->CP0_BadVAddr
= tswapl(*(target_ulong
*)ptr
);
785 ptr
+= sizeof(target_ulong
);
787 env
->CP0_Cause
= tswapl(*(target_ulong
*)ptr
);
788 ptr
+= sizeof(target_ulong
);
790 env
->PC
[env
->current_tc
] = tswapl(*(target_ulong
*)ptr
);
791 ptr
+= sizeof(target_ulong
);
793 if (env
->CP0_Config1
& (1 << CP0C1_FP
))
795 for (i
= 0; i
< 32; i
++)
797 if (env
->CP0_Status
& (1 << CP0St_FR
))
798 env
->fpu
->fpr
[i
].d
= tswapl(*(target_ulong
*)ptr
);
800 env
->fpu
->fpr
[i
].w
[FP_ENDIAN_IDX
] = tswapl(*(target_ulong
*)ptr
);
801 ptr
+= sizeof(target_ulong
);
804 env
->fpu
->fcr31
= tswapl(*(target_ulong
*)ptr
) & 0xFF83FFFF;
805 ptr
+= sizeof(target_ulong
);
807 /* The remaining registers are assumed to be read-only. */
809 /* set rounding mode */
810 RESTORE_ROUNDING_MODE
;
812 #ifndef CONFIG_SOFTFLOAT
813 /* no floating point exception for native float */
814 SET_FP_ENABLE(env
->fcr31
, 0);
818 #elif defined (TARGET_SH4)
820 /* Hint: Use "set architecture sh4" in GDB to see fpu registers */
822 static int cpu_gdb_read_registers(CPUState
*env
, uint8_t *mem_buf
)
824 uint32_t *ptr
= (uint32_t *)mem_buf
;
827 #define SAVE(x) *ptr++=tswapl(x)
828 if ((env
->sr
& (SR_MD
| SR_RB
)) == (SR_MD
| SR_RB
)) {
829 for (i
= 0; i
< 8; i
++) SAVE(env
->gregs
[i
+ 16]);
831 for (i
= 0; i
< 8; i
++) SAVE(env
->gregs
[i
]);
833 for (i
= 8; i
< 16; i
++) SAVE(env
->gregs
[i
]);
843 for (i
= 0; i
< 16; i
++)
844 SAVE(env
->fregs
[i
+ ((env
->fpscr
& FPSCR_FR
) ? 16 : 0)]);
847 for (i
= 0; i
< 8; i
++) SAVE(env
->gregs
[i
]);
848 for (i
= 0; i
< 8; i
++) SAVE(env
->gregs
[i
+ 16]);
849 return ((uint8_t *)ptr
- mem_buf
);
852 static void cpu_gdb_write_registers(CPUState
*env
, uint8_t *mem_buf
, int size
)
854 uint32_t *ptr
= (uint32_t *)mem_buf
;
857 #define LOAD(x) (x)=*ptr++;
858 if ((env
->sr
& (SR_MD
| SR_RB
)) == (SR_MD
| SR_RB
)) {
859 for (i
= 0; i
< 8; i
++) LOAD(env
->gregs
[i
+ 16]);
861 for (i
= 0; i
< 8; i
++) LOAD(env
->gregs
[i
]);
863 for (i
= 8; i
< 16; i
++) LOAD(env
->gregs
[i
]);
873 for (i
= 0; i
< 16; i
++)
874 LOAD(env
->fregs
[i
+ ((env
->fpscr
& FPSCR_FR
) ? 16 : 0)]);
877 for (i
= 0; i
< 8; i
++) LOAD(env
->gregs
[i
]);
878 for (i
= 0; i
< 8; i
++) LOAD(env
->gregs
[i
+ 16]);
880 #elif defined (TARGET_CRIS)
882 static int cris_save_32 (unsigned char *d
, uint32_t value
)
885 *d
++ = (value
>>= 8);
886 *d
++ = (value
>>= 8);
887 *d
++ = (value
>>= 8);
890 static int cris_save_16 (unsigned char *d
, uint32_t value
)
893 *d
++ = (value
>>= 8);
896 static int cris_save_8 (unsigned char *d
, uint32_t value
)
902 /* FIXME: this will bug on archs not supporting unaligned word accesses. */
903 static int cpu_gdb_read_registers(CPUState
*env
, uint8_t *mem_buf
)
905 uint8_t *ptr
= mem_buf
;
909 for (i
= 0; i
< 16; i
++)
910 ptr
+= cris_save_32 (ptr
, env
->regs
[i
]);
912 srs
= env
->pregs
[PR_SRS
];
914 ptr
+= cris_save_8 (ptr
, env
->pregs
[0]);
915 ptr
+= cris_save_8 (ptr
, env
->pregs
[1]);
916 ptr
+= cris_save_32 (ptr
, env
->pregs
[2]);
917 ptr
+= cris_save_8 (ptr
, srs
);
918 ptr
+= cris_save_16 (ptr
, env
->pregs
[4]);
920 for (i
= 5; i
< 16; i
++)
921 ptr
+= cris_save_32 (ptr
, env
->pregs
[i
]);
923 ptr
+= cris_save_32 (ptr
, env
->pc
);
925 for (i
= 0; i
< 16; i
++)
926 ptr
+= cris_save_32 (ptr
, env
->sregs
[srs
][i
]);
928 return ((uint8_t *)ptr
- mem_buf
);
931 static void cpu_gdb_write_registers(CPUState
*env
, uint8_t *mem_buf
, int size
)
933 uint32_t *ptr
= (uint32_t *)mem_buf
;
936 #define LOAD(x) (x)=*ptr++;
937 for (i
= 0; i
< 16; i
++) LOAD(env
->regs
[i
]);
941 static int cpu_gdb_read_registers(CPUState
*env
, uint8_t *mem_buf
)
946 static void cpu_gdb_write_registers(CPUState
*env
, uint8_t *mem_buf
, int size
)
952 static int gdb_handle_packet(GDBState
*s
, CPUState
*env
, const char *line_buf
)
955 int ch
, reg_size
, type
;
957 uint8_t mem_buf
[4096];
959 target_ulong addr
, len
;
962 printf("command='%s'\n", line_buf
);
968 /* TODO: Make this return the correct value for user-mode. */
969 snprintf(buf
, sizeof(buf
), "S%02x", SIGTRAP
);
971 /* Remove all the breakpoints when this query is issued,
972 * because gdb is doing and initial connect and the state
973 * should be cleaned up.
975 cpu_breakpoint_remove_all(env
);
976 cpu_watchpoint_remove_all(env
);
980 addr
= strtoull(p
, (char **)&p
, 16);
981 #if defined(TARGET_I386)
983 kvm_load_registers(env
);
984 #elif defined (TARGET_PPC)
986 #elif defined (TARGET_SPARC)
989 #elif defined (TARGET_ARM)
990 env
->regs
[15] = addr
;
991 #elif defined (TARGET_SH4)
993 #elif defined (TARGET_MIPS)
994 env
->PC
[env
->current_tc
] = addr
;
995 #elif defined (TARGET_CRIS)
1002 s
->signal
= strtoul(p
, (char **)&p
, 16);
1006 /* Kill the target */
1007 fprintf(stderr
, "\nQEMU: Terminated via GDBstub\n");
1011 cpu_breakpoint_remove_all(env
);
1012 cpu_watchpoint_remove_all(env
);
1014 put_packet(s
, "OK");
1018 addr
= strtoull(p
, (char **)&p
, 16);
1019 #if defined(TARGET_I386)
1021 kvm_load_registers(env
);
1022 #elif defined (TARGET_PPC)
1024 #elif defined (TARGET_SPARC)
1026 env
->npc
= addr
+ 4;
1027 #elif defined (TARGET_ARM)
1028 env
->regs
[15] = addr
;
1029 #elif defined (TARGET_SH4)
1031 #elif defined (TARGET_MIPS)
1032 env
->PC
[env
->current_tc
] = addr
;
1033 #elif defined (TARGET_CRIS)
1037 cpu_single_step(env
, sstep_flags
);
1045 ret
= strtoull(p
, (char **)&p
, 16);
1048 err
= strtoull(p
, (char **)&p
, 16);
1055 if (gdb_current_syscall_cb
)
1056 gdb_current_syscall_cb(s
->env
, ret
, err
);
1058 put_packet(s
, "T02");
1065 kvm_save_registers(env
);
1066 reg_size
= cpu_gdb_read_registers(env
, mem_buf
);
1067 memtohex(buf
, mem_buf
, reg_size
);
1071 registers
= (void *)mem_buf
;
1072 len
= strlen(p
) / 2;
1073 hextomem((uint8_t *)registers
, p
, len
);
1074 cpu_gdb_write_registers(env
, mem_buf
, len
);
1075 kvm_load_registers(env
);
1076 put_packet(s
, "OK");
1079 addr
= strtoull(p
, (char **)&p
, 16);
1082 len
= strtoull(p
, NULL
, 16);
1083 if (cpu_memory_rw_debug(env
, addr
, mem_buf
, len
, 0) != 0) {
1084 put_packet (s
, "E14");
1086 memtohex(buf
, mem_buf
, len
);
1091 addr
= strtoull(p
, (char **)&p
, 16);
1094 len
= strtoull(p
, (char **)&p
, 16);
1097 hextomem(mem_buf
, p
, len
);
1098 if (cpu_memory_rw_debug(env
, addr
, mem_buf
, len
, 1) != 0)
1099 put_packet(s
, "E14");
1101 put_packet(s
, "OK");
1104 type
= strtoul(p
, (char **)&p
, 16);
1107 addr
= strtoull(p
, (char **)&p
, 16);
1110 len
= strtoull(p
, (char **)&p
, 16);
1111 if (type
== 0 || type
== 1) {
1112 if (cpu_breakpoint_insert(env
, addr
) < 0)
1113 goto breakpoint_error
;
1114 put_packet(s
, "OK");
1115 #ifndef CONFIG_USER_ONLY
1116 } else if (type
== 2) {
1117 if (cpu_watchpoint_insert(env
, addr
) < 0)
1118 goto breakpoint_error
;
1119 put_packet(s
, "OK");
1123 put_packet(s
, "E22");
1127 type
= strtoul(p
, (char **)&p
, 16);
1130 addr
= strtoull(p
, (char **)&p
, 16);
1133 len
= strtoull(p
, (char **)&p
, 16);
1134 if (type
== 0 || type
== 1) {
1135 cpu_breakpoint_remove(env
, addr
);
1136 put_packet(s
, "OK");
1137 #ifndef CONFIG_USER_ONLY
1138 } else if (type
== 2) {
1139 cpu_watchpoint_remove(env
, addr
);
1140 put_packet(s
, "OK");
1143 goto breakpoint_error
;
1148 /* parse any 'q' packets here */
1149 if (!strcmp(p
,"qemu.sstepbits")) {
1150 /* Query Breakpoint bit definitions */
1151 sprintf(buf
,"ENABLE=%x,NOIRQ=%x,NOTIMER=%x",
1157 } else if (strncmp(p
,"qemu.sstep",10) == 0) {
1158 /* Display or change the sstep_flags */
1161 /* Display current setting */
1162 sprintf(buf
,"0x%x", sstep_flags
);
1167 type
= strtoul(p
, (char **)&p
, 16);
1169 put_packet(s
, "OK");
1172 #ifdef CONFIG_LINUX_USER
1173 else if (strncmp(p
, "Offsets", 7) == 0) {
1174 TaskState
*ts
= env
->opaque
;
1177 "Text=" TARGET_ABI_FMT_lx
";Data=" TARGET_ABI_FMT_lx
1178 ";Bss=" TARGET_ABI_FMT_lx
,
1179 ts
->info
->code_offset
,
1180 ts
->info
->data_offset
,
1181 ts
->info
->data_offset
);
1188 /* put empty packet */
1196 extern void tb_flush(CPUState
*env
);
1198 #ifndef CONFIG_USER_ONLY
1199 static void gdb_vm_stopped(void *opaque
, int reason
)
1201 GDBState
*s
= opaque
;
1205 if (s
->state
== RS_SYSCALL
)
1208 /* disable single step if it was enable */
1209 cpu_single_step(s
->env
, 0);
1211 if (reason
== EXCP_DEBUG
) {
1212 if (s
->env
->watchpoint_hit
) {
1213 snprintf(buf
, sizeof(buf
), "T%02xwatch:" TARGET_FMT_lx
";",
1215 s
->env
->watchpoint
[s
->env
->watchpoint_hit
- 1].vaddr
);
1217 s
->env
->watchpoint_hit
= 0;
1222 } else if (reason
== EXCP_INTERRUPT
) {
1227 snprintf(buf
, sizeof(buf
), "S%02x", ret
);
1232 /* Send a gdb syscall request.
1233 This accepts limited printf-style format specifiers, specifically:
1234 %x - target_ulong argument printed in hex.
1235 %lx - 64-bit argument printed in hex.
1236 %s - string pointer (target_ulong) and length (int) pair. */
1237 void gdb_do_syscall(gdb_syscall_complete_cb cb
, char *fmt
, ...)
1246 s
= gdb_syscall_state
;
1249 gdb_current_syscall_cb
= cb
;
1250 s
->state
= RS_SYSCALL
;
1251 #ifndef CONFIG_USER_ONLY
1252 vm_stop(EXCP_DEBUG
);
1263 addr
= va_arg(va
, target_ulong
);
1264 p
+= sprintf(p
, TARGET_FMT_lx
, addr
);
1267 if (*(fmt
++) != 'x')
1269 i64
= va_arg(va
, uint64_t);
1270 p
+= sprintf(p
, "%" PRIx64
, i64
);
1273 addr
= va_arg(va
, target_ulong
);
1274 p
+= sprintf(p
, TARGET_FMT_lx
"/%x", addr
, va_arg(va
, int));
1278 fprintf(stderr
, "gdbstub: Bad syscall format string '%s'\n",
1289 #ifdef CONFIG_USER_ONLY
1290 gdb_handlesig(s
->env
, 0);
1292 cpu_interrupt(s
->env
, CPU_INTERRUPT_EXIT
);
1296 static void gdb_read_byte(GDBState
*s
, int ch
)
1298 CPUState
*env
= s
->env
;
1302 #ifndef CONFIG_USER_ONLY
1303 if (s
->last_packet_len
) {
1304 /* Waiting for a response to the last packet. If we see the start
1305 of a new command then abandon the previous response. */
1308 printf("Got NACK, retransmitting\n");
1310 put_buffer(s
, (uint8_t *)s
->last_packet
, s
->last_packet_len
);
1314 printf("Got ACK\n");
1316 printf("Got '%c' when expecting ACK/NACK\n", ch
);
1318 if (ch
== '+' || ch
== '$')
1319 s
->last_packet_len
= 0;
1324 /* when the CPU is running, we cannot do anything except stop
1325 it when receiving a char */
1326 vm_stop(EXCP_INTERRUPT
);
1333 s
->line_buf_index
= 0;
1334 s
->state
= RS_GETLINE
;
1339 s
->state
= RS_CHKSUM1
;
1340 } else if (s
->line_buf_index
>= sizeof(s
->line_buf
) - 1) {
1343 s
->line_buf
[s
->line_buf_index
++] = ch
;
1347 s
->line_buf
[s
->line_buf_index
] = '\0';
1348 s
->line_csum
= fromhex(ch
) << 4;
1349 s
->state
= RS_CHKSUM2
;
1352 s
->line_csum
|= fromhex(ch
);
1354 for(i
= 0; i
< s
->line_buf_index
; i
++) {
1355 csum
+= s
->line_buf
[i
];
1357 if (s
->line_csum
!= (csum
& 0xff)) {
1359 put_buffer(s
, &reply
, 1);
1363 put_buffer(s
, &reply
, 1);
1364 s
->state
= gdb_handle_packet(s
, env
, s
->line_buf
);
1373 #ifdef CONFIG_USER_ONLY
1375 gdb_handlesig (CPUState
*env
, int sig
)
1381 s
= &gdbserver_state
;
1382 if (gdbserver_fd
< 0 || s
->fd
< 0)
1385 /* disable single step if it was enabled */
1386 cpu_single_step(env
, 0);
1391 snprintf(buf
, sizeof(buf
), "S%02x", sig
);
1394 /* put_packet() might have detected that the peer terminated the
1401 s
->running_state
= 0;
1402 while (s
->running_state
== 0) {
1403 n
= read (s
->fd
, buf
, 256);
1408 for (i
= 0; i
< n
; i
++)
1409 gdb_read_byte (s
, buf
[i
]);
1411 else if (n
== 0 || errno
!= EAGAIN
)
1413 /* XXX: Connection closed. Should probably wait for annother
1414 connection before continuing. */
1423 /* Tell the remote gdb that the process has exited. */
1424 void gdb_exit(CPUState
*env
, int code
)
1429 s
= &gdbserver_state
;
1430 if (gdbserver_fd
< 0 || s
->fd
< 0)
1433 snprintf(buf
, sizeof(buf
), "W%02x", code
);
1438 static void gdb_accept(void *opaque
)
1441 struct sockaddr_in sockaddr
;
1446 len
= sizeof(sockaddr
);
1447 fd
= accept(gdbserver_fd
, (struct sockaddr
*)&sockaddr
, &len
);
1448 if (fd
< 0 && errno
!= EINTR
) {
1451 } else if (fd
>= 0) {
1456 /* set short latency */
1458 setsockopt(fd
, IPPROTO_TCP
, TCP_NODELAY
, (char *)&val
, sizeof(val
));
1460 s
= &gdbserver_state
;
1461 memset (s
, 0, sizeof (GDBState
));
1462 s
->env
= first_cpu
; /* XXX: allow to change CPU */
1465 gdb_syscall_state
= s
;
1467 fcntl(fd
, F_SETFL
, O_NONBLOCK
);
1470 static int gdbserver_open(int port
)
1472 struct sockaddr_in sockaddr
;
1475 fd
= socket(PF_INET
, SOCK_STREAM
, 0);
1481 /* allow fast reuse */
1483 setsockopt(fd
, SOL_SOCKET
, SO_REUSEADDR
, (char *)&val
, sizeof(val
));
1485 sockaddr
.sin_family
= AF_INET
;
1486 sockaddr
.sin_port
= htons(port
);
1487 sockaddr
.sin_addr
.s_addr
= 0;
1488 ret
= bind(fd
, (struct sockaddr
*)&sockaddr
, sizeof(sockaddr
));
1493 ret
= listen(fd
, 0);
1501 int gdbserver_start(int port
)
1503 gdbserver_fd
= gdbserver_open(port
);
1504 if (gdbserver_fd
< 0)
1506 /* accept connections */
1511 static int gdb_chr_can_receive(void *opaque
)
1516 static void gdb_chr_receive(void *opaque
, const uint8_t *buf
, int size
)
1518 GDBState
*s
= opaque
;
1521 for (i
= 0; i
< size
; i
++) {
1522 gdb_read_byte(s
, buf
[i
]);
1526 static void gdb_chr_event(void *opaque
, int event
)
1529 case CHR_EVENT_RESET
:
1530 vm_stop(EXCP_INTERRUPT
);
1531 gdb_syscall_state
= opaque
;
1538 int gdbserver_start(const char *port
)
1541 char gdbstub_port_name
[128];
1544 CharDriverState
*chr
;
1546 if (!port
|| !*port
)
1549 port_num
= strtol(port
, &p
, 10);
1551 /* A numeric value is interpreted as a port number. */
1552 snprintf(gdbstub_port_name
, sizeof(gdbstub_port_name
),
1553 "tcp::%d,nowait,nodelay,server", port_num
);
1554 port
= gdbstub_port_name
;
1557 chr
= qemu_chr_open(port
);
1561 s
= qemu_mallocz(sizeof(GDBState
));
1565 s
->env
= first_cpu
; /* XXX: allow to change CPU */
1567 qemu_chr_add_handlers(chr
, gdb_chr_can_receive
, gdb_chr_receive
,
1569 qemu_add_vm_stop_handler(gdb_vm_stopped
, s
);