qemu-kvm-powerpc.c

   1 /*
   2  * qemu-kvm-power.c
   3  *
   4  * Add KVM PowerPC specific calls for qemu.
   5  *
   6  * Copyright 2007 IBM Corporation.
   7  * Added by & Authors:
   8  *      Jerone Young <jyoung5@us.ibm.com>
   9  *      Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
  10  *
  11  * This work is licensed under the GNU GPL licence version 2 or later.
  12  *
  13  */
  14
  15 #include "config.h"
  16 #include "config-host.h"
  17
  18 #include <string.h>
  19 #include "hw/hw.h"
  20 #include "sysemu.h"
  21 #include "cpu.h"
  22 #include "exec-all.h"
  23 #include "helper_regs.h"
  24
  25 #include "qemu-kvm.h"
  26 #include <libkvm.h>
  27 #include <pthread.h>
  28 #include <sys/utsname.h>
  29
  30 extern kvm_context_t kvm_context;
  31
  32 void cpu_reset(CPUState *env)
  33 {
  34         cpu_ppc_reset(env);
  35 }
  36
  37
  38 int kvm_arch_qemu_create_context(void)
  39 {
  40         return 0;
  41 }
  42
  43 void kvm_arch_load_regs(CPUState *env)
  44 {
  45     struct kvm_regs regs;
  46     int rc,i;
  47
  48     rc = kvm_get_regs(kvm_context, env->cpu_index, &regs);
  49     if (rc == -1)
  50         perror("kvm_get_regs FAILED");
  51
  52     /* cr is untouched in qemu and not existant in CPUState fr ppr */
  53     /* hflags is a morphed to MSR on ppc, no need to sync that down to kvm */
  54
  55     regs.pc = env->nip;
  56
  57     regs.ctr = env->ctr;
  58     regs.lr  = env->lr;
  59     regs.xer = ppc_load_xer(env);
  60     regs.msr = env->msr;
  61
  62     regs.srr0 = env->spr[SPR_SRR0];
  63     regs.srr1 = env->spr[SPR_SRR1];
  64
  65     regs.sprg0 = env->spr[SPR_SPRG0];
  66     regs.sprg1 = env->spr[SPR_SPRG1];
  67     regs.sprg2 = env->spr[SPR_SPRG2];
  68     regs.sprg3 = env->spr[SPR_SPRG3];
  69     regs.sprg4 = env->spr[SPR_SPRG4];
  70     regs.sprg5 = env->spr[SPR_SPRG5];
  71     regs.sprg6 = env->spr[SPR_SPRG6];
  72     regs.sprg7 = env->spr[SPR_SPRG7];
  73
  74     for (i = 0;i < 32; i++){
  75         regs.gpr[i] = env->gpr[i];
  76     }
  77
  78     rc = kvm_set_regs(kvm_context, env->cpu_index, &regs);
  79     if (rc == -1)
  80         perror("kvm_set_regs FAILED");
  81 }
  82
  83
  84 void kvm_arch_save_regs(CPUState *env)
  85 {
  86     struct kvm_regs regs;
  87     uint32_t i, rc;
  88
  89     rc = kvm_get_regs(kvm_context, env->cpu_index, &regs);
  90     if (rc == -1)
  91         perror("kvm_get_regs FAILED");
  92
  93     env->ctr =regs.ctr;
  94     env->lr = regs.lr;
  95     ppc_store_xer(env,regs.xer);
  96     env->msr = regs.msr;
  97     /* calculate hflags based on the current msr using the ppc qemu helper */
  98     hreg_compute_hflags(env);
  99
 100     env->nip = regs.pc;
 101
 102     env->spr[SPR_SRR0] = regs.srr0;
 103     env->spr[SPR_SRR1] = regs.srr1;
 104
 105     env->spr[SPR_SPRG0] = regs.sprg0;
 106     env->spr[SPR_SPRG1] = regs.sprg1;
 107     env->spr[SPR_SPRG2] = regs.sprg2;
 108     env->spr[SPR_SPRG3] = regs.sprg3;
 109     env->spr[SPR_SPRG4] = regs.sprg4;
 110     env->spr[SPR_SPRG5] = regs.sprg5;
 111     env->spr[SPR_SPRG6] = regs.sprg6;
 112     env->spr[SPR_SPRG7] = regs.sprg7;
 113
 114     for (i = 0;i < 32; i++){
 115         env->gpr[i] = regs.gpr[i];
 116     }
 117
 118 }
 119
 120 int kvm_arch_qemu_init_env(CPUState *cenv)
 121 {
 122     if (cenv->cpu_index == 0) {
 123         /* load any registers set in env into
 124            kvm  for the first guest vcpu */
 125         kvm_load_registers(cenv);
 126     }
 127
 128     return 0;
 129 }
 130
 131 int kvm_arch_halt(void *opaque, int vcpu)
 132 {
 133     CPUState *env = cpu_single_env;
 134
 135     if (!(env->interrupt_request & CPU_INTERRUPT_HARD)
 136         && (msr_ee))
 137     {
 138             env->halted = 1;
 139             env->exception_index = EXCP_HLT;
 140     }
 141     return 1;
 142 }
 143
 144 void kvm_arch_pre_kvm_run(void *opaque, int vcpu)
 145 {
 146         return;
 147 }
 148
 149 void kvm_arch_post_kvm_run(void *opaque, int vcpu)
 150 {
 151     CPUState *env = qemu_kvm_cpu_env(vcpu);
 152     cpu_single_env = env;
 153     env->ready_for_interrupt_injection = \
 154         kvm_is_ready_for_interrupt_injection(kvm_context, vcpu);
 155 }
 156
 157 int kvm_arch_has_work(CPUState *env)
 158 {
 159     if ((env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXIT)) &&
 160         (msr_ee))
 161         return 1;
 162     return 0;
 163 }
 164
 165 int kvm_arch_try_push_interrupts(void *opaque)
 166 {
 167     CPUState *env = cpu_single_env;
 168     int r;
 169     unsigned irq;
 170
 171     /* PowerPC Qemu tracks the various core input pins (interrupt, critical
 172      * interrupt, reset, etc) in PPC-specific env->irq_input_state. */
 173     if (env->ready_for_interrupt_injection &&
 174         (env->irq_input_state & (1<<PPC40x_INPUT_INT)))
 175        {
 176             /* For now KVM disregards the 'irq' argument. However, in the
 177              * future KVM could cache it in-kernel to avoid a heavyweight exit
 178              * when reading the UIC.
 179              */
 180             irq = -1U;
 181
 182             r = kvm_inject_irq(kvm_context, env->cpu_index, irq);
 183             if (r < 0)
 184                 printf("cpu %d fail inject %x\n", env->cpu_index, irq);
 185     }
 186
 187     /* We don't know if there are more interrupts pending after this. However,
 188      * the guest will return to userspace in the course of handling this one
 189      * anyways, so we will get a chance to deliver the rest. */
 190     return 0;
 191 }
 192
 193 void kvm_arch_update_regs_for_sipi(CPUState *env)
 194 {
 195     printf("%s: no kvm-powerpc multi processor support yet!\n", __func__);
 196 }
 197
 198 /* map dcr access to existing qemu dcr emulation */
 199 int handle_powerpc_dcr_read(int vcpu, uint32_t dcrn, uint32_t *data)
 200 {
 201     CPUState *env = cpu_single_env;
 202     if (ppc_dcr_read(env->dcr_env, dcrn, data) < 0)
 203         fprintf(stderr, "Read to unhandled DCR (0x%x)\n", dcrn);
 204
 205     return 0; /* XXX ignore failed DCR ops */
 206 }
 207
 208 int handle_powerpc_dcr_write(int vcpu, uint32_t dcrn, uint32_t data)
 209 {
 210     CPUState *env = cpu_single_env;
 211     if (ppc_dcr_write(env->dcr_env, dcrn, data) < 0)
 212         fprintf(stderr, "Write to unhandled DCR (0x%x)\n", dcrn);
 213
 214     return 0; /* XXX ignore failed DCR ops */
 215 }