hw/zaurus.c

   1 /*
   2  * Copyright (c) 2006-2008 Openedhand Ltd.
   3  * Written by Andrzej Zaborowski <balrog@zabor.org>
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License as
   7  * published by the Free Software Foundation; either version 2 or
   8  * (at your option) version 3 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  18  * MA 02111-1307 USA
  19  */
  20 #include "hw.h"
  21 #include "pxa.h"
  22 #include "sharpsl.h"
  23
  24 #undef REG_FMT
  25 #if TARGET_PHYS_ADDR_BITS == 32
  26 #define REG_FMT                 "0x%02x"
  27 #else
  28 #define REG_FMT                 "0x%02lx"
  29 #endif
  30
  31 /* SCOOP devices */
  32
  33 struct scoop_info_s {
  34     target_phys_addr_t target_base;
  35     qemu_irq handler[16];
  36     qemu_irq *in;
  37     uint16_t status;
  38     uint16_t power;
  39     uint32_t gpio_level;
  40     uint32_t gpio_dir;
  41     uint32_t prev_level;
  42
  43     uint16_t mcr;
  44     uint16_t cdr;
  45     uint16_t ccr;
  46     uint16_t irr;
  47     uint16_t imr;
  48     uint16_t isr;
  49 };
  50
  51 #define SCOOP_MCR       0x00
  52 #define SCOOP_CDR       0x04
  53 #define SCOOP_CSR       0x08
  54 #define SCOOP_CPR       0x0c
  55 #define SCOOP_CCR       0x10
  56 #define SCOOP_IRR_IRM   0x14
  57 #define SCOOP_IMR       0x18
  58 #define SCOOP_ISR       0x1c
  59 #define SCOOP_GPCR      0x20
  60 #define SCOOP_GPWR      0x24
  61 #define SCOOP_GPRR      0x28
  62
  63 static inline void scoop_gpio_handler_update(struct scoop_info_s *s) {
  64     uint32_t level, diff;
  65     int bit;
  66     level = s->gpio_level & s->gpio_dir;
  67
  68     for (diff = s->prev_level ^ level; diff; diff ^= 1 << bit) {
  69         bit = ffs(diff) - 1;
  70         qemu_set_irq(s->handler[bit], (level >> bit) & 1);
  71     }
  72
  73     s->prev_level = level;
  74 }
  75
  76 static uint32_t scoop_readb(void *opaque, target_phys_addr_t addr)
  77 {
  78     struct scoop_info_s *s = (struct scoop_info_s *) opaque;
  79     addr -= s->target_base;
  80
  81     switch (addr) {
  82     case SCOOP_MCR:
  83         return s->mcr;
  84     case SCOOP_CDR:
  85         return s->cdr;
  86     case SCOOP_CSR:
  87         return s->status;
  88     case SCOOP_CPR:
  89         return s->power;
  90     case SCOOP_CCR:
  91         return s->ccr;
  92     case SCOOP_IRR_IRM:
  93         return s->irr;
  94     case SCOOP_IMR:
  95         return s->imr;
  96     case SCOOP_ISR:
  97         return s->isr;
  98     case SCOOP_GPCR:
  99         return s->gpio_dir;
 100     case SCOOP_GPWR:
 101     case SCOOP_GPRR:
 102         return s->gpio_level;
 103     default:
 104         zaurus_printf("Bad register offset " REG_FMT "\n", addr);
 105     }
 106
 107     return 0;
 108 }
 109
 110 static void scoop_writeb(void *opaque, target_phys_addr_t addr, uint32_t value)
 111 {
 112     struct scoop_info_s *s = (struct scoop_info_s *) opaque;
 113     addr -= s->target_base;
 114     value &= 0xffff;
 115
 116     switch (addr) {
 117     case SCOOP_MCR:
 118         s->mcr = value;
 119         break;
 120     case SCOOP_CDR:
 121         s->cdr = value;
 122         break;
 123     case SCOOP_CPR:
 124         s->power = value;
 125         if (value & 0x80)
 126             s->power |= 0x8040;
 127         break;
 128     case SCOOP_CCR:
 129         s->ccr = value;
 130         break;
 131     case SCOOP_IRR_IRM:
 132         s->irr = value;
 133         break;
 134     case SCOOP_IMR:
 135         s->imr = value;
 136         break;
 137     case SCOOP_ISR:
 138         s->isr = value;
 139         break;
 140     case SCOOP_GPCR:
 141         s->gpio_dir = value;
 142         scoop_gpio_handler_update(s);
 143         break;
 144     case SCOOP_GPWR:
 145     case SCOOP_GPRR:    /* GPRR is probably R/O in real HW */
 146         s->gpio_level = value & s->gpio_dir;
 147         scoop_gpio_handler_update(s);
 148         break;
 149     default:
 150         zaurus_printf("Bad register offset " REG_FMT "\n", addr);
 151     }
 152 }
 153
 154 static CPUReadMemoryFunc *scoop_readfn[] = {
 155     scoop_readb,
 156     scoop_readb,
 157     scoop_readb,
 158 };
 159 static CPUWriteMemoryFunc *scoop_writefn[] = {
 160     scoop_writeb,
 161     scoop_writeb,
 162     scoop_writeb,
 163 };
 164
 165 void scoop_gpio_set(void *opaque, int line, int level)
 166 {
 167     struct scoop_info_s *s = (struct scoop_info_s *) s;
 168
 169     if (level)
 170         s->gpio_level |= (1 << line);
 171     else
 172         s->gpio_level &= ~(1 << line);
 173 }
 174
 175 qemu_irq *scoop_gpio_in_get(struct scoop_info_s *s)
 176 {
 177     return s->in;
 178 }
 179
 180 void scoop_gpio_out_set(struct scoop_info_s *s, int line,
 181                 qemu_irq handler) {
 182     if (line >= 16) {
 183         fprintf(stderr, "No GPIO pin %i\n", line);
 184         exit(-1);
 185     }
 186
 187     s->handler[line] = handler;
 188 }
 189
 190 static void scoop_save(QEMUFile *f, void *opaque)
 191 {
 192     struct scoop_info_s *s = (struct scoop_info_s *) opaque;
 193     qemu_put_be16s(f, &s->status);
 194     qemu_put_be16s(f, &s->power);
 195     qemu_put_be32s(f, &s->gpio_level);
 196     qemu_put_be32s(f, &s->gpio_dir);
 197     qemu_put_be32s(f, &s->prev_level);
 198     qemu_put_be16s(f, &s->mcr);
 199     qemu_put_be16s(f, &s->cdr);
 200     qemu_put_be16s(f, &s->ccr);
 201     qemu_put_be16s(f, &s->irr);
 202     qemu_put_be16s(f, &s->imr);
 203     qemu_put_be16s(f, &s->isr);
 204 }
 205
 206 static int scoop_load(QEMUFile *f, void *opaque, int version_id)
 207 {
 208     uint16_t dummy;
 209     struct scoop_info_s *s = (struct scoop_info_s *) opaque;
 210     qemu_get_be16s(f, &s->status);
 211     qemu_get_be16s(f, &s->power);
 212     qemu_get_be32s(f, &s->gpio_level);
 213     qemu_get_be32s(f, &s->gpio_dir);
 214     qemu_get_be32s(f, &s->prev_level);
 215     qemu_get_be16s(f, &s->mcr);
 216     qemu_get_be16s(f, &s->cdr);
 217     qemu_get_be16s(f, &s->ccr);
 218     qemu_get_be16s(f, &s->irr);
 219     qemu_get_be16s(f, &s->imr);
 220     qemu_get_be16s(f, &s->isr);
 221     if (version_id < 1)
 222             qemu_get_be16s(f, &dummy);
 223
 224     return 0;
 225 }
 226
 227 struct scoop_info_s *scoop_init(struct pxa2xx_state_s *cpu,
 228                 int instance,
 229                 target_phys_addr_t target_base) {
 230     int iomemtype;
 231     struct scoop_info_s *s;
 232
 233     s = (struct scoop_info_s *)
 234             qemu_mallocz(sizeof(struct scoop_info_s));
 235     memset(s, 0, sizeof(struct scoop_info_s));
 236
 237     s->target_base = target_base;
 238     s->status = 0x02;
 239     s->in = qemu_allocate_irqs(scoop_gpio_set, s, 16);
 240     iomemtype = cpu_register_io_memory(0, scoop_readfn,
 241                     scoop_writefn, s);
 242     cpu_register_physical_memory(s->target_base, 0x1000, iomemtype);
 243     register_savevm("scoop", instance, 1, scoop_save, scoop_load, s);
 244
 245     return s;
 246 }
 247
 248 /* Write the bootloader parameters memory area.  */
 249
 250 #define MAGIC_CHG(a, b, c, d)   ((d << 24) | (c << 16) | (b << 8) | a)
 251
 252 static struct __attribute__ ((__packed__)) sl_param_info {
 253     uint32_t comadj_keyword;
 254     int32_t comadj;
 255
 256     uint32_t uuid_keyword;
 257     char uuid[16];
 258
 259     uint32_t touch_keyword;
 260     int32_t touch_xp;
 261     int32_t touch_yp;
 262     int32_t touch_xd;
 263     int32_t touch_yd;
 264
 265     uint32_t adadj_keyword;
 266     int32_t adadj;
 267
 268     uint32_t phad_keyword;
 269     int32_t phadadj;
 270 } zaurus_bootparam = {
 271     .comadj_keyword     = MAGIC_CHG('C', 'M', 'A', 'D'),
 272     .comadj             = 125,
 273     .uuid_keyword       = MAGIC_CHG('U', 'U', 'I', 'D'),
 274     .uuid               = { -1 },
 275     .touch_keyword      = MAGIC_CHG('T', 'U', 'C', 'H'),
 276     .touch_xp           = -1,
 277     .adadj_keyword      = MAGIC_CHG('B', 'V', 'A', 'D'),
 278     .adadj              = -1,
 279     .phad_keyword       = MAGIC_CHG('P', 'H', 'A', 'D'),
 280     .phadadj            = 0x01,
 281 };
 282
 283 void sl_bootparam_write(uint32_t ptr)
 284 {
 285     memcpy(phys_ram_base + ptr, &zaurus_bootparam,
 286                     sizeof(struct sl_param_info));
 287 }