hw/ipf.c

   1 /*
   2  * Itanium Platform Emulator derived from QEMU PC System Emulator
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  *
   6  * Copyright (c) 2007 Intel
   7  * Ported for IA64 Platform Zhang Xiantao <xiantao.zhang@intel.com>
   8  *
   9  * Permission is hereby granted, free of charge, to any person obtaining a copy
  10  * of this software and associated documentation files (the "Software"), to deal
  11  * in the Software without restriction, including without limitation the rights
  12  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  13  * copies of the Software, and to permit persons to whom the Software is
  14  * furnished to do so, subject to the following conditions:
  15  *
  16  * The above copyright notice and this permission notice shall be included in
  17  * all copies or substantial portions of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  22  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  23  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  24  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  25  * THE SOFTWARE.
  26  */
  27
  28 #include "hw.h"
  29 #include "pc.h"
  30 #include "fdc.h"
  31 #include "pci.h"
  32 #include "block.h"
  33 #include "sysemu.h"
  34 #include "audio/audio.h"
  35 #include "net.h"
  36 #include "smbus.h"
  37 #include "boards.h"
  38 #include "firmware.h"
  39 #include "ia64intrin.h"
  40 #include <unistd.h>
  41 #include "device-assignment.h"
  42
  43 #include "qemu-kvm.h"
  44
  45 #define FW_FILENAME "Flash.fd"
  46
  47 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables.  */
  48 #define ACPI_DATA_SIZE       0x10000
  49
  50 #define MAX_IDE_BUS 2
  51
  52 static fdctrl_t *floppy_controller;
  53 static RTCState *rtc_state;
  54 static PCIDevice *i440fx_state;
  55
  56 static uint32_t ipf_to_legacy_io(target_phys_addr_t addr)
  57 {
  58     return (uint32_t)(((addr&0x3ffffff) >> 12 << 2)|((addr) & 0x3));
  59 }
  60
  61 static void ipf_legacy_io_writeb(void *opaque, target_phys_addr_t addr,
  62                                  uint32_t val) {
  63     uint32_t port = ipf_to_legacy_io(addr);
  64
  65     cpu_outb(0, port, val);
  66 }
  67
  68 static void ipf_legacy_io_writew(void *opaque, target_phys_addr_t addr,
  69                                  uint32_t val) {
  70     uint32_t port = ipf_to_legacy_io(addr);
  71
  72     cpu_outw(0, port, val);
  73 }
  74
  75 static void ipf_legacy_io_writel(void *opaque, target_phys_addr_t addr,
  76                                  uint32_t val) {
  77     uint32_t port = ipf_to_legacy_io(addr);
  78
  79     cpu_outl(0, port, val);
  80 }
  81
  82 static uint32_t ipf_legacy_io_readb(void *opaque, target_phys_addr_t addr)
  83 {
  84     uint32_t port = ipf_to_legacy_io(addr);
  85
  86     return cpu_inb(0, port);
  87 }
  88
  89 static uint32_t ipf_legacy_io_readw(void *opaque, target_phys_addr_t addr)
  90 {
  91     uint32_t port = ipf_to_legacy_io(addr);
  92
  93     return cpu_inw(0, port);
  94 }
  95
  96 static uint32_t ipf_legacy_io_readl(void *opaque, target_phys_addr_t addr)
  97 {
  98     uint32_t port = ipf_to_legacy_io(addr);
  99
 100     return cpu_inl(0, port);
 101 }
 102
 103 static CPUReadMemoryFunc *ipf_legacy_io_read[3] = {
 104     ipf_legacy_io_readb,
 105     ipf_legacy_io_readw,
 106     ipf_legacy_io_readl,
 107 };
 108
 109 static CPUWriteMemoryFunc *ipf_legacy_io_write[3] = {
 110     ipf_legacy_io_writeb,
 111     ipf_legacy_io_writew,
 112     ipf_legacy_io_writel,
 113 };
 114
 115 static void pic_irq_request(void *opaque, int irq, int level)
 116 {
 117     fprintf(stderr,"pic_irq_request called!\n");
 118 }
 119
 120 /* PC cmos mappings */
 121
 122 #define REG_EQUIPMENT_BYTE          0x14
 123
 124 static int cmos_get_fd_drive_type(int fd0)
 125 {
 126     int val;
 127
 128     switch (fd0) {
 129     case 0:
 130         /* 1.44 Mb 3"5 drive */
 131         val = 4;
 132         break;
 133     case 1:
 134         /* 2.88 Mb 3"5 drive */
 135         val = 5;
 136         break;
 137     case 2:
 138         /* 1.2 Mb 5"5 drive */
 139         val = 2;
 140         break;
 141     default:
 142         val = 0;
 143         break;
 144     }
 145     return val;
 146 }
 147
 148 static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
 149 {
 150     RTCState *s = rtc_state;
 151     int cylinders, heads, sectors;
 152
 153     bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
 154     rtc_set_memory(s, type_ofs, 47);
 155     rtc_set_memory(s, info_ofs, cylinders);
 156     rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
 157     rtc_set_memory(s, info_ofs + 2, heads);
 158     rtc_set_memory(s, info_ofs + 3, 0xff);
 159     rtc_set_memory(s, info_ofs + 4, 0xff);
 160     rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
 161     rtc_set_memory(s, info_ofs + 6, cylinders);
 162     rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
 163     rtc_set_memory(s, info_ofs + 8, sectors);
 164 }
 165
 166 /* convert boot_device letter to something recognizable by the bios */
 167 static int boot_device2nibble(char boot_device)
 168 {
 169     switch(boot_device) {
 170     case 'a':
 171     case 'b':
 172         return 0x01; /* floppy boot */
 173     case 'c':
 174         return 0x02; /* hard drive boot */
 175     case 'd':
 176         return 0x03; /* CD-ROM boot */
 177     case 'n':
 178         return 0x04; /* Network boot */
 179     }
 180     return 0;
 181 }
 182
 183 /* hd_table must contain 4 block drivers */
 184 static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
 185                       const char *boot_device, BlockDriverState **hd_table)
 186 {
 187     RTCState *s = rtc_state;
 188     int nbds, bds[3] = { 0, };
 189     int val;
 190     int fd0, fd1, nb;
 191     int i;
 192
 193     /* various important CMOS locations needed by PC/Bochs bios */
 194
 195     /* memory size */
 196     val = 640; /* base memory in K */
 197     rtc_set_memory(s, 0x15, val);
 198     rtc_set_memory(s, 0x16, val >> 8);
 199
 200     val = (ram_size / 1024) - 1024;
 201     if (val > 65535)
 202         val = 65535;
 203     rtc_set_memory(s, 0x17, val);
 204     rtc_set_memory(s, 0x18, val >> 8);
 205     rtc_set_memory(s, 0x30, val);
 206     rtc_set_memory(s, 0x31, val >> 8);
 207
 208     if (above_4g_mem_size) {
 209         rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16);
 210         rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24);
 211         rtc_set_memory(s, 0x5d, above_4g_mem_size >> 32);
 212     }
 213     rtc_set_memory(s, 0x5f, smp_cpus - 1);
 214
 215     if (ram_size > (16 * 1024 * 1024))
 216         val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
 217     else
 218         val = 0;
 219     if (val > 65535)
 220         val = 65535;
 221     rtc_set_memory(s, 0x34, val);
 222     rtc_set_memory(s, 0x35, val >> 8);
 223
 224     /* set boot devices, and disable floppy signature check if requested */
 225 #define PC_MAX_BOOT_DEVICES 3
 226     nbds = strlen(boot_device);
 227
 228     if (nbds > PC_MAX_BOOT_DEVICES) {
 229         fprintf(stderr, "Too many boot devices for PC\n");
 230         exit(1);
 231     }
 232
 233     for (i = 0; i < nbds; i++) {
 234         bds[i] = boot_device2nibble(boot_device[i]);
 235         if (bds[i] == 0) {
 236             fprintf(stderr, "Invalid boot device for PC: '%c'\n",
 237                     boot_device[i]);
 238             exit(1);
 239         }
 240     }
 241
 242     rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
 243     rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ?  0x0 : 0x1));
 244
 245     /* floppy type */
 246
 247     fd0 = fdctrl_get_drive_type(floppy_controller, 0);
 248     fd1 = fdctrl_get_drive_type(floppy_controller, 1);
 249
 250     val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
 251     rtc_set_memory(s, 0x10, val);
 252
 253     val = 0;
 254     nb = 0;
 255     if (fd0 < 3)
 256         nb++;
 257     if (fd1 < 3)
 258         nb++;
 259
 260     switch (nb) {
 261     case 0:
 262         break;
 263     case 1:
 264         val |= 0x01; /* 1 drive, ready for boot */
 265         break;
 266     case 2:
 267         val |= 0x41; /* 2 drives, ready for boot */
 268         break;
 269     }
 270
 271     val |= 0x02; /* FPU is there */
 272     val |= 0x04; /* PS/2 mouse installed */
 273     rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
 274
 275     /* hard drives */
 276
 277     rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
 278     if (hd_table[0])
 279         cmos_init_hd(0x19, 0x1b, hd_table[0]);
 280     if (hd_table[1])
 281         cmos_init_hd(0x1a, 0x24, hd_table[1]);
 282
 283     val = 0;
 284     for (i = 0; i < 4; i++) {
 285         if (hd_table[i]) {
 286             int cylinders, heads, sectors, translation;
 287             /* NOTE: bdrv_get_geometry_hint() returns the physical
 288                geometry.  It is always such that: 1 <= sects <= 63, 1
 289                <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
 290                geometry can be different if a translation is done. */
 291             translation = bdrv_get_translation_hint(hd_table[i]);
 292             if (translation == BIOS_ATA_TRANSLATION_AUTO) {
 293                 bdrv_get_geometry_hint(hd_table[i], &cylinders,
 294                                        &heads, &sectors);
 295                 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
 296                     /* No translation. */
 297                     translation = 0;
 298                 } else {
 299                     /* LBA translation. */
 300                     translation = 1;
 301                 }
 302             } else {
 303                 translation--;
 304             }
 305             val |= translation << (i * 2);
 306         }
 307     }
 308     rtc_set_memory(s, 0x39, val);
 309 }
 310
 311 static void main_cpu_reset(void *opaque)
 312 {
 313     CPUState *env = opaque;
 314     cpu_reset(env);
 315 }
 316
 317 static const int ide_iobase[2] = { 0x1f0, 0x170 };
 318 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
 319 static const int ide_irq[2] = { 14, 15 };
 320
 321 #define NE2000_NB_MAX 6
 322
 323 static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340,
 324                                         0x360, 0x280, 0x380 };
 325 static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
 326
 327 static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
 328 static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
 329
 330 static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
 331 static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
 332
 333 #ifdef HAS_AUDIO
 334 static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
 335 {
 336     struct soundhw *c;
 337     int audio_enabled = 0;
 338
 339     for (c = soundhw; !audio_enabled && c->name; ++c) {
 340         audio_enabled = c->enabled;
 341     }
 342
 343     if (audio_enabled) {
 344         AudioState *s;
 345
 346         s = AUD_init ();
 347         if (s) {
 348             for (c = soundhw; c->name; ++c) {
 349                 if (c->enabled) {
 350                     if (c->isa) {
 351                         c->init.init_isa (s, pic);
 352                     } else {
 353                         if (pci_bus) {
 354                             c->init.init_pci (pci_bus, s);
 355                         }
 356                     }
 357                 }
 358             }
 359         }
 360     }
 361 }
 362 #endif
 363
 364 static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic)
 365 {
 366     static int nb_ne2k = 0;
 367
 368     if (nb_ne2k == NE2000_NB_MAX)
 369         return;
 370     isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd);
 371     nb_ne2k++;
 372 }
 373
 374 /* Itanium hardware initialisation */
 375 static void ipf_init1(ram_addr_t ram_size, int vga_ram_size,
 376                       const char *boot_device, DisplayState *ds,
 377                       const char *kernel_filename, const char *kernel_cmdline,
 378                       const char *initrd_filename,
 379                       int pci_enabled, const char *cpu_model)
 380 {
 381     char buf[1024];
 382     int i;
 383     ram_addr_t ram_addr, vga_ram_addr;
 384     ram_addr_t above_4g_mem_size = 0;
 385     PCIBus *pci_bus;
 386     int piix3_devfn = -1;
 387     CPUState *env;
 388     NICInfo *nd;
 389     qemu_irq *cpu_irq;
 390     qemu_irq *i8259;
 391     int page_size;
 392     int index;
 393     unsigned long ipf_legacy_io_base, ipf_legacy_io_mem;
 394     BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 395     BlockDriverState *fd[MAX_FD];
 396
 397     page_size = getpagesize();
 398     if (page_size != TARGET_PAGE_SIZE) {
 399         fprintf(stderr,"Error! Host page size != qemu target page size,"
 400                 " you may need to change TARGET_PAGE_BITS in qemu!"
 401                 "host page size:0x%x\n", page_size);
 402         exit(-1);
 403     };
 404
 405     if (ram_size >= 0xc0000000 ) {
 406         above_4g_mem_size = ram_size - 0xc0000000;
 407         ram_size = 0xc0000000;
 408     }
 409
 410     /* init CPUs */
 411     if (cpu_model == NULL) {
 412         cpu_model = "IA64";
 413     }
 414
 415     for(i = 0; i < smp_cpus; i++) {
 416         env = cpu_init(cpu_model);
 417         if (!env) {
 418             fprintf(stderr, "Unable to find CPU definition\n");
 419             exit(1);
 420         }
 421         if (i != 0)
 422             env->hflags |= HF_HALTED_MASK;
 423         register_savevm("cpu", i, 4, cpu_save, cpu_load, env);
 424         qemu_register_reset(main_cpu_reset, env);
 425     }
 426
 427     /* allocate RAM */
 428     if (kvm_enabled()) {
 429         ram_addr = qemu_ram_alloc(0xa0000);
 430         cpu_register_physical_memory(0, 0xa0000, ram_addr);
 431
 432         ram_addr = qemu_ram_alloc(0x20000); // Workaround 0xa0000-0xc0000
 433
 434         ram_addr = qemu_ram_alloc(0x40000);
 435         cpu_register_physical_memory(0xc0000, 0x40000, ram_addr);
 436
 437         ram_addr = qemu_ram_alloc(ram_size - 0x100000);
 438         cpu_register_physical_memory(0x100000, ram_size - 0x100000, ram_addr);
 439     } else {
 440         ram_addr = qemu_ram_alloc(ram_size);
 441         cpu_register_physical_memory(0, ram_size, ram_addr);
 442     }
 443     /* allocate VGA RAM */
 444     vga_ram_addr = qemu_ram_alloc(vga_ram_size);
 445
 446     /* above 4giga memory allocation */
 447     if (above_4g_mem_size > 0) {
 448         ram_addr = qemu_ram_alloc(above_4g_mem_size);
 449         cpu_register_physical_memory(0x100000000, above_4g_mem_size, ram_addr);
 450     }
 451
 452     /*Load firware to its proper position.*/
 453     if (kvm_enabled()) {
 454         unsigned long  image_size;
 455         char *image = NULL;
 456         uint8_t *fw_image_start;
 457         ram_addr_t fw_offset = qemu_ram_alloc(GFW_SIZE);
 458         uint8_t *fw_start = phys_ram_base + fw_offset;
 459
 460         snprintf(buf, sizeof(buf), "%s/%s", bios_dir, FW_FILENAME);
 461         image = read_image(buf, &image_size );
 462         if (NULL == image || !image_size) {
 463             fprintf(stderr, "Error when reading Guest Firmware!\n");
 464             fprintf(stderr, "Please check Guest firmware at %s\n", buf);
 465             exit(1);
 466         }
 467         fw_image_start = fw_start + GFW_SIZE - image_size;
 468
 469         cpu_register_physical_memory(GFW_START, GFW_SIZE, fw_offset);
 470         memcpy(fw_image_start, image, image_size);
 471
 472         free(image);
 473         flush_icache_range((unsigned long)fw_image_start,
 474                            (unsigned long)fw_image_start + image_size);
 475         kvm_ia64_build_hob(ram_size + above_4g_mem_size, smp_cpus, fw_start);
 476     }
 477
 478     /*Register legacy io address space, size:64M*/
 479     ipf_legacy_io_base = 0xE0000000;
 480     ipf_legacy_io_mem = cpu_register_io_memory(0, ipf_legacy_io_read,
 481                                                ipf_legacy_io_write, NULL);
 482     cpu_register_physical_memory(ipf_legacy_io_base, 64*1024*1024,
 483                                  ipf_legacy_io_mem);
 484
 485     cpu_irq = qemu_allocate_irqs(pic_irq_request, first_cpu, 1);
 486     i8259 = i8259_init(cpu_irq[0]);
 487
 488     if (pci_enabled) {
 489         pci_bus = i440fx_init(&i440fx_state, i8259);
 490         piix3_devfn = piix3_init(pci_bus, -1);
 491     } else {
 492         pci_bus = NULL;
 493     }
 494
 495     if (cirrus_vga_enabled) {
 496         if (pci_enabled) {
 497             pci_cirrus_vga_init(pci_bus, ds, phys_ram_base + vga_ram_addr,
 498                                 vga_ram_addr, vga_ram_size);
 499         } else {
 500             isa_cirrus_vga_init(ds, phys_ram_base + vga_ram_addr,
 501                                 vga_ram_addr, vga_ram_size);
 502         }
 503     } else {
 504         if (pci_enabled) {
 505             pci_vga_init(pci_bus, ds, phys_ram_base + vga_ram_addr,
 506                          vga_ram_addr, vga_ram_size, 0, 0);
 507         } else {
 508             isa_vga_init(ds, phys_ram_base + vga_ram_addr,
 509                          vga_ram_addr, vga_ram_size);
 510         }
 511     }
 512
 513     rtc_state = rtc_init(0x70, i8259[8]);
 514
 515     if (pci_enabled) {
 516         pic_set_alt_irq_func(isa_pic, NULL, NULL);
 517     }
 518
 519     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
 520         if (serial_hds[i]) {
 521             serial_init(serial_io[i], i8259[serial_irq[i]], 115200,
 522                         serial_hds[i]);
 523         }
 524     }
 525
 526     for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
 527         if (parallel_hds[i]) {
 528             parallel_init(parallel_io[i], i8259[parallel_irq[i]],
 529                           parallel_hds[i]);
 530         }
 531     }
 532
 533     for(i = 0; i < nb_nics; i++) {
 534         nd = &nd_table[i];
 535         if (!nd->model) {
 536             if (pci_enabled) {
 537                 nd->model = "ne2k_pci";
 538             } else {
 539                 nd->model = "ne2k_isa";
 540             }
 541         }
 542         if (strcmp(nd->model, "ne2k_isa") == 0) {
 543             pc_init_ne2k_isa(nd, i8259);
 544         } else if (pci_enabled) {
 545             if (strcmp(nd->model, "?") == 0)
 546                 fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
 547             if (!pci_nic_init(pci_bus, nd, -1))
 548                 exit(1);
 549         } else if (strcmp(nd->model, "?") == 0) {
 550             fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
 551             exit(1);
 552         } else {
 553             fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
 554             exit(1);
 555         }
 556     }
 557
 558 #undef USE_HYPERCALL  //Disable it now, need to implement later!
 559 #ifdef USE_HYPERCALL
 560     pci_hypercall_init(pci_bus);
 561 #endif
 562
 563     if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
 564         fprintf(stderr, "qemu: too many IDE bus\n");
 565         exit(1);
 566     }
 567
 568     for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
 569         index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
 570         if (index != -1)
 571             hd[i] = drives_table[index].bdrv;
 572         else
 573             hd[i] = NULL;
 574     }
 575
 576     if (pci_enabled) {
 577         pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, i8259);
 578     } else {
 579         for(i = 0; i < MAX_IDE_BUS; i++) {
 580             isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
 581                          hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
 582         }
 583     }
 584
 585     i8042_init(i8259[1], i8259[12], 0x60);
 586     DMA_init(0);
 587 #ifdef HAS_AUDIO
 588     audio_init(pci_enabled ? pci_bus : NULL, i8259);
 589 #endif
 590
 591     for(i = 0; i < MAX_FD; i++) {
 592         index = drive_get_index(IF_FLOPPY, 0, i);
 593         if (index != -1)
 594             fd[i] = drives_table[index].bdrv;
 595         else
 596             fd[i] = NULL;
 597     }
 598     floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd);
 599
 600     cmos_init(ram_size, above_4g_mem_size, boot_device, hd);
 601
 602     if (pci_enabled && usb_enabled) {
 603         usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
 604     }
 605
 606     if (pci_enabled && acpi_enabled) {
 607         uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
 608         i2c_bus *smbus;
 609
 610         /* TODO: Populate SPD eeprom data.  */
 611         smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, i8259[9]);
 612         for (i = 0; i < 8; i++) {
 613             smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256));
 614         }
 615     }
 616
 617     if (i440fx_state) {
 618         i440fx_init_memory_mappings(i440fx_state);
 619     }
 620
 621     if (pci_enabled) {
 622         int max_bus;
 623         int bus, unit;
 624         void *scsi;
 625
 626         max_bus = drive_get_max_bus(IF_SCSI);
 627
 628         for (bus = 0; bus <= max_bus; bus++) {
 629             scsi = lsi_scsi_init(pci_bus, -1);
 630             for (unit = 0; unit < LSI_MAX_DEVS; unit++) {
 631                 index = drive_get_index(IF_SCSI, bus, unit);
 632                 if (index == -1)
 633                     continue;
 634                 lsi_scsi_attach(scsi, drives_table[index].bdrv, unit);
 635             }
 636         }
 637     }
 638     /* Add virtio block devices */
 639     if (pci_enabled) {
 640         int index;
 641         int unit_id = 0;
 642
 643         while ((index = drive_get_index(IF_VIRTIO, 0, unit_id)) != -1) {
 644             virtio_blk_init(pci_bus, 0x1AF4, 0x1001, drives_table[index].bdrv);
 645             unit_id++;
 646         }
 647     }
 648
 649 #ifdef USE_KVM_DEVICE_ASSIGNMENT
 650     if (kvm_enabled()) {
 651         int i;
 652         for (i = 0; i < assigned_devices_index; i++) {
 653             if (add_assigned_device(assigned_devices[i]) < 0) {
 654                 fprintf(stderr, "Warning: could not add assigned device %s\n",
 655                         assigned_devices[i]);
 656             }
 657         }
 658
 659         if (init_all_assigned_devices(pci_bus)) {
 660             fprintf(stderr, "Failed to initialize assigned devices\n");
 661             exit (1);
 662         }
 663     }
 664 #endif /* USE_KVM_DEVICE_ASSIGNMENT */
 665
 666 }
 667
 668 static void ipf_init_pci(ram_addr_t ram_size, int vga_ram_size,
 669                          const char *boot_device, DisplayState *ds,
 670                          const char *kernel_filename,
 671                          const char *kernel_cmdline,
 672                          const char *initrd_filename,
 673                          const char *cpu_model)
 674 {
 675     ipf_init1(ram_size, vga_ram_size, boot_device, ds, kernel_filename,
 676               kernel_cmdline, initrd_filename, 1, cpu_model);
 677 }
 678
 679 QEMUMachine ipf_machine = {
 680     .name = "itanium",
 681     .desc = "Itanium Platform",
 682     .init = ipf_init_pci,
 683     .ram_require = VGA_RAM_SIZE + GFW_SIZE,
 684     .max_cpus = 255,
 685 };
 686
 687 #define IOAPIC_NUM_PINS 48
 688
 689 static int ioapic_irq_count[IOAPIC_NUM_PINS];
 690
 691 static int ioapic_map_irq(int devfn, int irq_num)
 692 {
 693     int irq, dev;
 694     dev = devfn >> 3;
 695     irq = ((((dev << 2) + (dev >> 3) + irq_num) & 31) + 16);
 696     return irq;
 697 }
 698
 699 void ioapic_set_irq(void *opaque, int irq_num, int level)
 700 {
 701     int vector;
 702
 703     PCIDevice *pci_dev = (PCIDevice *)opaque;
 704     vector = ioapic_map_irq(pci_dev->devfn, irq_num);
 705
 706     if (level)
 707         ioapic_irq_count[vector] += 1;
 708     else
 709         ioapic_irq_count[vector] -= 1;
 710
 711     if (kvm_enabled()) {
 712         if (kvm_set_irq(vector, ioapic_irq_count[vector] == 0))
 713             return;
 714     }
 715 }
 716
 717 int ipf_map_irq(PCIDevice *pci_dev, int irq_num)
 718 {
 719         return ioapic_map_irq(pci_dev->devfn, irq_num);
 720 }