Fix configurations with more than 4GB of memory
[qemu-kvm/fedora.git] / gdbstub.c
blobbdd2c041059ea3106cf56824cf9d11327a2e88cf
1 /*
2 * gdb server stub
4 * Copyright (c) 2003-2005 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include "config.h"
21 #ifdef CONFIG_USER_ONLY
22 #include <stdlib.h>
23 #include <stdio.h>
24 #include <stdarg.h>
25 #include <string.h>
26 #include <errno.h>
27 #include <unistd.h>
28 #include <fcntl.h>
30 #include "qemu.h"
31 #else
32 #include "vl.h"
33 #include "qemu-kvm.h"
34 #endif
36 #include "qemu_socket.h"
37 #ifdef _WIN32
38 /* XXX: these constants may be independent of the host ones even for Unix */
39 #ifndef SIGTRAP
40 #define SIGTRAP 5
41 #endif
42 #ifndef SIGINT
43 #define SIGINT 2
44 #endif
45 #else
46 #include <signal.h>
47 #endif
49 //#define DEBUG_GDB
51 enum RSState {
52 RS_IDLE,
53 RS_GETLINE,
54 RS_CHKSUM1,
55 RS_CHKSUM2,
56 RS_SYSCALL,
58 typedef struct GDBState {
59 CPUState *env; /* current CPU */
60 enum RSState state; /* parsing state */
61 char line_buf[4096];
62 int line_buf_index;
63 int line_csum;
64 char last_packet[4100];
65 int last_packet_len;
66 #ifdef CONFIG_USER_ONLY
67 int fd;
68 int running_state;
69 #else
70 CharDriverState *chr;
71 #endif
72 } GDBState;
74 #ifdef CONFIG_USER_ONLY
75 /* XXX: This is not thread safe. Do we care? */
76 static int gdbserver_fd = -1;
78 /* XXX: remove this hack. */
79 static GDBState gdbserver_state;
81 static int get_char(GDBState *s)
83 uint8_t ch;
84 int ret;
86 for(;;) {
87 ret = recv(s->fd, &ch, 1, 0);
88 if (ret < 0) {
89 if (errno != EINTR && errno != EAGAIN)
90 return -1;
91 } else if (ret == 0) {
92 return -1;
93 } else {
94 break;
97 return ch;
99 #endif
101 /* GDB stub state for use by semihosting syscalls. */
102 static GDBState *gdb_syscall_state;
103 static gdb_syscall_complete_cb gdb_current_syscall_cb;
105 enum {
106 GDB_SYS_UNKNOWN,
107 GDB_SYS_ENABLED,
108 GDB_SYS_DISABLED,
109 } gdb_syscall_mode;
111 /* If gdb is connected when the first semihosting syscall occurs then use
112 remote gdb syscalls. Otherwise use native file IO. */
113 int use_gdb_syscalls(void)
115 if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
116 gdb_syscall_mode = (gdb_syscall_state ? GDB_SYS_ENABLED
117 : GDB_SYS_DISABLED);
119 return gdb_syscall_mode == GDB_SYS_ENABLED;
122 static void put_buffer(GDBState *s, const uint8_t *buf, int len)
124 #ifdef CONFIG_USER_ONLY
125 int ret;
127 while (len > 0) {
128 ret = send(s->fd, buf, len, 0);
129 if (ret < 0) {
130 if (errno != EINTR && errno != EAGAIN)
131 return;
132 } else {
133 buf += ret;
134 len -= ret;
137 #else
138 qemu_chr_write(s->chr, buf, len);
139 #endif
142 static inline int fromhex(int v)
144 if (v >= '0' && v <= '9')
145 return v - '0';
146 else if (v >= 'A' && v <= 'F')
147 return v - 'A' + 10;
148 else if (v >= 'a' && v <= 'f')
149 return v - 'a' + 10;
150 else
151 return 0;
154 static inline int tohex(int v)
156 if (v < 10)
157 return v + '0';
158 else
159 return v - 10 + 'a';
162 static void memtohex(char *buf, const uint8_t *mem, int len)
164 int i, c;
165 char *q;
166 q = buf;
167 for(i = 0; i < len; i++) {
168 c = mem[i];
169 *q++ = tohex(c >> 4);
170 *q++ = tohex(c & 0xf);
172 *q = '\0';
175 static void hextomem(uint8_t *mem, const char *buf, int len)
177 int i;
179 for(i = 0; i < len; i++) {
180 mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
181 buf += 2;
185 /* return -1 if error, 0 if OK */
186 static int put_packet(GDBState *s, char *buf)
188 int len, csum, i;
189 char *p;
191 #ifdef DEBUG_GDB
192 printf("reply='%s'\n", buf);
193 #endif
195 for(;;) {
196 p = s->last_packet;
197 *(p++) = '$';
198 len = strlen(buf);
199 memcpy(p, buf, len);
200 p += len;
201 csum = 0;
202 for(i = 0; i < len; i++) {
203 csum += buf[i];
205 *(p++) = '#';
206 *(p++) = tohex((csum >> 4) & 0xf);
207 *(p++) = tohex((csum) & 0xf);
209 s->last_packet_len = p - s->last_packet;
210 put_buffer(s, s->last_packet, s->last_packet_len);
212 #ifdef CONFIG_USER_ONLY
213 i = get_char(s);
214 if (i < 0)
215 return -1;
216 if (i == '+')
217 break;
218 #else
219 break;
220 #endif
222 return 0;
225 #if defined(TARGET_X86_64)
227 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
229 uint8_t *p = mem_buf;
230 int i, fpus;
232 #define PUTREG(x) do { \
233 target_ulong reg = tswapl(x); \
234 memcpy(p, &reg, sizeof reg); \
235 p += sizeof reg; \
236 } while (0)
237 #define PUTREG32(x) do { \
238 uint32_t reg = tswap32(x); \
239 memcpy(p, &reg, sizeof reg); \
240 p += sizeof reg; \
241 } while (0)
242 #define PUTREGF(x) do { \
243 memcpy(p, &(x), 10); \
244 p += sizeof (x); \
245 } while (0)
247 PUTREG(env->regs[R_EAX]);
248 PUTREG(env->regs[R_EBX]);
249 PUTREG(env->regs[R_ECX]);
250 PUTREG(env->regs[R_EDX]);
251 PUTREG(env->regs[R_ESI]);
252 PUTREG(env->regs[R_EDI]);
253 PUTREG(env->regs[R_EBP]);
254 PUTREG(env->regs[R_ESP]);
255 PUTREG(env->regs[8]);
256 PUTREG(env->regs[9]);
257 PUTREG(env->regs[10]);
258 PUTREG(env->regs[11]);
259 PUTREG(env->regs[12]);
260 PUTREG(env->regs[13]);
261 PUTREG(env->regs[14]);
262 PUTREG(env->regs[15]);
264 PUTREG(env->eip);
265 PUTREG32(env->eflags);
266 PUTREG32(env->segs[R_CS].selector);
267 PUTREG32(env->segs[R_SS].selector);
268 PUTREG32(env->segs[R_DS].selector);
269 PUTREG32(env->segs[R_ES].selector);
270 PUTREG32(env->segs[R_FS].selector);
271 PUTREG32(env->segs[R_GS].selector);
272 /* XXX: convert floats */
273 for(i = 0; i < 8; i++) {
274 PUTREGF(env->fpregs[i]);
276 PUTREG32(env->fpuc);
277 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
278 PUTREG32(fpus);
279 PUTREG32(0); /* XXX: convert tags */
280 PUTREG32(0); /* fiseg */
281 PUTREG32(0); /* fioff */
282 PUTREG32(0); /* foseg */
283 PUTREG32(0); /* fooff */
284 PUTREG32(0); /* fop */
286 #undef PUTREG
287 #undef PUTREG32
288 #undef PUTREGF
290 return p - mem_buf;
293 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
295 uint8_t *p = mem_buf;
296 uint32_t junk;
297 int i, fpus;
299 #define GETREG(x) do { \
300 target_ulong reg; \
301 memcpy(&reg, p, sizeof reg); \
302 x = tswapl(reg); \
303 p += sizeof reg; \
304 } while (0)
305 #define GETREG32(x) do { \
306 uint32_t reg; \
307 memcpy(&reg, p, sizeof reg); \
308 x = tswap32(reg); \
309 p += sizeof reg; \
310 } while (0)
311 #define GETREGF(x) do { \
312 memcpy(&(x), p, 10); \
313 p += 10; \
314 } while (0)
316 GETREG(env->regs[R_EAX]);
317 GETREG(env->regs[R_EBX]);
318 GETREG(env->regs[R_ECX]);
319 GETREG(env->regs[R_EDX]);
320 GETREG(env->regs[R_ESI]);
321 GETREG(env->regs[R_EDI]);
322 GETREG(env->regs[R_EBP]);
323 GETREG(env->regs[R_ESP]);
324 GETREG(env->regs[8]);
325 GETREG(env->regs[9]);
326 GETREG(env->regs[10]);
327 GETREG(env->regs[11]);
328 GETREG(env->regs[12]);
329 GETREG(env->regs[13]);
330 GETREG(env->regs[14]);
331 GETREG(env->regs[15]);
333 GETREG(env->eip);
334 GETREG32(env->eflags);
335 GETREG32(env->segs[R_CS].selector);
336 GETREG32(env->segs[R_SS].selector);
337 GETREG32(env->segs[R_DS].selector);
338 GETREG32(env->segs[R_ES].selector);
339 GETREG32(env->segs[R_FS].selector);
340 GETREG32(env->segs[R_GS].selector);
341 /* XXX: convert floats */
342 for(i = 0; i < 8; i++) {
343 GETREGF(env->fpregs[i]);
345 GETREG32(env->fpuc);
346 GETREG32(fpus); /* XXX: convert fpus */
347 GETREG32(junk); /* XXX: convert tags */
348 GETREG32(junk); /* fiseg */
349 GETREG32(junk); /* fioff */
350 GETREG32(junk); /* foseg */
351 GETREG32(junk); /* fooff */
352 GETREG32(junk); /* fop */
354 #undef GETREG
355 #undef GETREG32
356 #undef GETREGF
359 #elif defined(TARGET_I386)
361 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
363 uint32_t *registers = (uint32_t *)mem_buf;
364 int i, fpus;
366 for(i = 0; i < 8; i++) {
367 registers[i] = env->regs[i];
369 registers[8] = env->eip;
370 registers[9] = env->eflags;
371 registers[10] = env->segs[R_CS].selector;
372 registers[11] = env->segs[R_SS].selector;
373 registers[12] = env->segs[R_DS].selector;
374 registers[13] = env->segs[R_ES].selector;
375 registers[14] = env->segs[R_FS].selector;
376 registers[15] = env->segs[R_GS].selector;
377 /* XXX: convert floats */
378 for(i = 0; i < 8; i++) {
379 memcpy(mem_buf + 16 * 4 + i * 10, &env->fpregs[i], 10);
381 registers[36] = env->fpuc;
382 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
383 registers[37] = fpus;
384 registers[38] = 0; /* XXX: convert tags */
385 registers[39] = 0; /* fiseg */
386 registers[40] = 0; /* fioff */
387 registers[41] = 0; /* foseg */
388 registers[42] = 0; /* fooff */
389 registers[43] = 0; /* fop */
391 for(i = 0; i < 16; i++)
392 tswapls(&registers[i]);
393 for(i = 36; i < 44; i++)
394 tswapls(&registers[i]);
395 return 44 * 4;
398 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
400 uint32_t *registers = (uint32_t *)mem_buf;
401 int i;
403 for(i = 0; i < 8; i++) {
404 env->regs[i] = tswapl(registers[i]);
406 env->eip = tswapl(registers[8]);
407 env->eflags = tswapl(registers[9]);
408 #if defined(CONFIG_USER_ONLY)
409 #define LOAD_SEG(index, sreg)\
410 if (tswapl(registers[index]) != env->segs[sreg].selector)\
411 cpu_x86_load_seg(env, sreg, tswapl(registers[index]));
412 LOAD_SEG(10, R_CS);
413 LOAD_SEG(11, R_SS);
414 LOAD_SEG(12, R_DS);
415 LOAD_SEG(13, R_ES);
416 LOAD_SEG(14, R_FS);
417 LOAD_SEG(15, R_GS);
418 #endif
421 #elif defined (TARGET_PPC)
422 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
424 uint32_t *registers = (uint32_t *)mem_buf, tmp;
425 int i;
427 /* fill in gprs */
428 for(i = 0; i < 32; i++) {
429 registers[i] = tswapl(env->gpr[i]);
431 /* fill in fprs */
432 for (i = 0; i < 32; i++) {
433 registers[(i * 2) + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
434 registers[(i * 2) + 33] = tswapl(*((uint32_t *)&env->fpr[i] + 1));
436 /* nip, msr, ccr, lnk, ctr, xer, mq */
437 registers[96] = tswapl(env->nip);
438 registers[97] = tswapl(do_load_msr(env));
439 tmp = 0;
440 for (i = 0; i < 8; i++)
441 tmp |= env->crf[i] << (32 - ((i + 1) * 4));
442 registers[98] = tswapl(tmp);
443 registers[99] = tswapl(env->lr);
444 registers[100] = tswapl(env->ctr);
445 registers[101] = tswapl(ppc_load_xer(env));
446 registers[102] = 0;
448 return 103 * 4;
451 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
453 uint32_t *registers = (uint32_t *)mem_buf;
454 int i;
456 /* fill in gprs */
457 for (i = 0; i < 32; i++) {
458 env->gpr[i] = tswapl(registers[i]);
460 /* fill in fprs */
461 for (i = 0; i < 32; i++) {
462 *((uint32_t *)&env->fpr[i]) = tswapl(registers[(i * 2) + 32]);
463 *((uint32_t *)&env->fpr[i] + 1) = tswapl(registers[(i * 2) + 33]);
465 /* nip, msr, ccr, lnk, ctr, xer, mq */
466 env->nip = tswapl(registers[96]);
467 do_store_msr(env, tswapl(registers[97]));
468 registers[98] = tswapl(registers[98]);
469 for (i = 0; i < 8; i++)
470 env->crf[i] = (registers[98] >> (32 - ((i + 1) * 4))) & 0xF;
471 env->lr = tswapl(registers[99]);
472 env->ctr = tswapl(registers[100]);
473 ppc_store_xer(env, tswapl(registers[101]));
475 #elif defined (TARGET_SPARC)
476 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
478 target_ulong *registers = (target_ulong *)mem_buf;
479 int i;
481 /* fill in g0..g7 */
482 for(i = 0; i < 8; i++) {
483 registers[i] = tswapl(env->gregs[i]);
485 /* fill in register window */
486 for(i = 0; i < 24; i++) {
487 registers[i + 8] = tswapl(env->regwptr[i]);
489 #ifndef TARGET_SPARC64
490 /* fill in fprs */
491 for (i = 0; i < 32; i++) {
492 registers[i + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
494 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
495 registers[64] = tswapl(env->y);
497 target_ulong tmp;
499 tmp = GET_PSR(env);
500 registers[65] = tswapl(tmp);
502 registers[66] = tswapl(env->wim);
503 registers[67] = tswapl(env->tbr);
504 registers[68] = tswapl(env->pc);
505 registers[69] = tswapl(env->npc);
506 registers[70] = tswapl(env->fsr);
507 registers[71] = 0; /* csr */
508 registers[72] = 0;
509 return 73 * sizeof(target_ulong);
510 #else
511 /* fill in fprs */
512 for (i = 0; i < 64; i += 2) {
513 uint64_t tmp;
515 tmp = ((uint64_t)*(uint32_t *)&env->fpr[i]) << 32;
516 tmp |= *(uint32_t *)&env->fpr[i + 1];
517 registers[i / 2 + 32] = tswap64(tmp);
519 registers[64] = tswapl(env->pc);
520 registers[65] = tswapl(env->npc);
521 registers[66] = tswapl(((uint64_t)GET_CCR(env) << 32) |
522 ((env->asi & 0xff) << 24) |
523 ((env->pstate & 0xfff) << 8) |
524 GET_CWP64(env));
525 registers[67] = tswapl(env->fsr);
526 registers[68] = tswapl(env->fprs);
527 registers[69] = tswapl(env->y);
528 return 70 * sizeof(target_ulong);
529 #endif
532 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
534 target_ulong *registers = (target_ulong *)mem_buf;
535 int i;
537 /* fill in g0..g7 */
538 for(i = 0; i < 7; i++) {
539 env->gregs[i] = tswapl(registers[i]);
541 /* fill in register window */
542 for(i = 0; i < 24; i++) {
543 env->regwptr[i] = tswapl(registers[i + 8]);
545 #ifndef TARGET_SPARC64
546 /* fill in fprs */
547 for (i = 0; i < 32; i++) {
548 *((uint32_t *)&env->fpr[i]) = tswapl(registers[i + 32]);
550 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
551 env->y = tswapl(registers[64]);
552 PUT_PSR(env, tswapl(registers[65]));
553 env->wim = tswapl(registers[66]);
554 env->tbr = tswapl(registers[67]);
555 env->pc = tswapl(registers[68]);
556 env->npc = tswapl(registers[69]);
557 env->fsr = tswapl(registers[70]);
558 #else
559 for (i = 0; i < 64; i += 2) {
560 uint64_t tmp;
562 tmp = tswap64(registers[i / 2 + 32]);
563 *((uint32_t *)&env->fpr[i]) = tmp >> 32;
564 *((uint32_t *)&env->fpr[i + 1]) = tmp & 0xffffffff;
566 env->pc = tswapl(registers[64]);
567 env->npc = tswapl(registers[65]);
569 uint64_t tmp = tswapl(registers[66]);
571 PUT_CCR(env, tmp >> 32);
572 env->asi = (tmp >> 24) & 0xff;
573 env->pstate = (tmp >> 8) & 0xfff;
574 PUT_CWP64(env, tmp & 0xff);
576 env->fsr = tswapl(registers[67]);
577 env->fprs = tswapl(registers[68]);
578 env->y = tswapl(registers[69]);
579 #endif
581 #elif defined (TARGET_ARM)
582 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
584 int i;
585 uint8_t *ptr;
587 ptr = mem_buf;
588 /* 16 core integer registers (4 bytes each). */
589 for (i = 0; i < 16; i++)
591 *(uint32_t *)ptr = tswapl(env->regs[i]);
592 ptr += 4;
594 /* 8 FPA registers (12 bytes each), FPS (4 bytes).
595 Not yet implemented. */
596 memset (ptr, 0, 8 * 12 + 4);
597 ptr += 8 * 12 + 4;
598 /* CPSR (4 bytes). */
599 *(uint32_t *)ptr = tswapl (cpsr_read(env));
600 ptr += 4;
602 return ptr - mem_buf;
605 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
607 int i;
608 uint8_t *ptr;
610 ptr = mem_buf;
611 /* Core integer registers. */
612 for (i = 0; i < 16; i++)
614 env->regs[i] = tswapl(*(uint32_t *)ptr);
615 ptr += 4;
617 /* Ignore FPA regs and scr. */
618 ptr += 8 * 12 + 4;
619 cpsr_write (env, tswapl(*(uint32_t *)ptr), 0xffffffff);
621 #elif defined (TARGET_M68K)
622 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
624 int i;
625 uint8_t *ptr;
626 CPU_DoubleU u;
628 ptr = mem_buf;
629 /* D0-D7 */
630 for (i = 0; i < 8; i++) {
631 *(uint32_t *)ptr = tswapl(env->dregs[i]);
632 ptr += 4;
634 /* A0-A7 */
635 for (i = 0; i < 8; i++) {
636 *(uint32_t *)ptr = tswapl(env->aregs[i]);
637 ptr += 4;
639 *(uint32_t *)ptr = tswapl(env->sr);
640 ptr += 4;
641 *(uint32_t *)ptr = tswapl(env->pc);
642 ptr += 4;
643 /* F0-F7. The 68881/68040 have 12-bit extended precision registers.
644 ColdFire has 8-bit double precision registers. */
645 for (i = 0; i < 8; i++) {
646 u.d = env->fregs[i];
647 *(uint32_t *)ptr = tswap32(u.l.upper);
648 *(uint32_t *)ptr = tswap32(u.l.lower);
650 /* FP control regs (not implemented). */
651 memset (ptr, 0, 3 * 4);
652 ptr += 3 * 4;
654 return ptr - mem_buf;
657 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
659 int i;
660 uint8_t *ptr;
661 CPU_DoubleU u;
663 ptr = mem_buf;
664 /* D0-D7 */
665 for (i = 0; i < 8; i++) {
666 env->dregs[i] = tswapl(*(uint32_t *)ptr);
667 ptr += 4;
669 /* A0-A7 */
670 for (i = 0; i < 8; i++) {
671 env->aregs[i] = tswapl(*(uint32_t *)ptr);
672 ptr += 4;
674 env->sr = tswapl(*(uint32_t *)ptr);
675 ptr += 4;
676 env->pc = tswapl(*(uint32_t *)ptr);
677 ptr += 4;
678 /* F0-F7. The 68881/68040 have 12-bit extended precision registers.
679 ColdFire has 8-bit double precision registers. */
680 for (i = 0; i < 8; i++) {
681 u.l.upper = tswap32(*(uint32_t *)ptr);
682 u.l.lower = tswap32(*(uint32_t *)ptr);
683 env->fregs[i] = u.d;
685 /* FP control regs (not implemented). */
686 ptr += 3 * 4;
688 #elif defined (TARGET_MIPS)
689 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
691 int i;
692 uint8_t *ptr;
694 ptr = mem_buf;
695 for (i = 0; i < 32; i++)
697 *(target_ulong *)ptr = tswapl(env->gpr[i][env->current_tc]);
698 ptr += sizeof(target_ulong);
701 *(target_ulong *)ptr = tswapl(env->CP0_Status);
702 ptr += sizeof(target_ulong);
704 *(target_ulong *)ptr = tswapl(env->LO[0][env->current_tc]);
705 ptr += sizeof(target_ulong);
707 *(target_ulong *)ptr = tswapl(env->HI[0][env->current_tc]);
708 ptr += sizeof(target_ulong);
710 *(target_ulong *)ptr = tswapl(env->CP0_BadVAddr);
711 ptr += sizeof(target_ulong);
713 *(target_ulong *)ptr = tswapl(env->CP0_Cause);
714 ptr += sizeof(target_ulong);
716 *(target_ulong *)ptr = tswapl(env->PC[env->current_tc]);
717 ptr += sizeof(target_ulong);
719 if (env->CP0_Config1 & (1 << CP0C1_FP))
721 for (i = 0; i < 32; i++)
723 *(target_ulong *)ptr = tswapl(env->fpu->fpr[i].fs[FP_ENDIAN_IDX]);
724 ptr += sizeof(target_ulong);
727 *(target_ulong *)ptr = tswapl(env->fpu->fcr31);
728 ptr += sizeof(target_ulong);
730 *(target_ulong *)ptr = tswapl(env->fpu->fcr0);
731 ptr += sizeof(target_ulong);
734 /* 32 FP registers, fsr, fir, fp. Not yet implemented. */
735 /* what's 'fp' mean here? */
737 return ptr - mem_buf;
740 /* convert MIPS rounding mode in FCR31 to IEEE library */
741 static unsigned int ieee_rm[] =
743 float_round_nearest_even,
744 float_round_to_zero,
745 float_round_up,
746 float_round_down
748 #define RESTORE_ROUNDING_MODE \
749 set_float_rounding_mode(ieee_rm[env->fpu->fcr31 & 3], &env->fpu->fp_status)
751 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
753 int i;
754 uint8_t *ptr;
756 ptr = mem_buf;
757 for (i = 0; i < 32; i++)
759 env->gpr[i][env->current_tc] = tswapl(*(target_ulong *)ptr);
760 ptr += sizeof(target_ulong);
763 env->CP0_Status = tswapl(*(target_ulong *)ptr);
764 ptr += sizeof(target_ulong);
766 env->LO[0][env->current_tc] = tswapl(*(target_ulong *)ptr);
767 ptr += sizeof(target_ulong);
769 env->HI[0][env->current_tc] = tswapl(*(target_ulong *)ptr);
770 ptr += sizeof(target_ulong);
772 env->CP0_BadVAddr = tswapl(*(target_ulong *)ptr);
773 ptr += sizeof(target_ulong);
775 env->CP0_Cause = tswapl(*(target_ulong *)ptr);
776 ptr += sizeof(target_ulong);
778 env->PC[env->current_tc] = tswapl(*(target_ulong *)ptr);
779 ptr += sizeof(target_ulong);
781 if (env->CP0_Config1 & (1 << CP0C1_FP))
783 for (i = 0; i < 32; i++)
785 env->fpu->fpr[i].fs[FP_ENDIAN_IDX] = tswapl(*(target_ulong *)ptr);
786 ptr += sizeof(target_ulong);
789 env->fpu->fcr31 = tswapl(*(target_ulong *)ptr) & 0x0183FFFF;
790 ptr += sizeof(target_ulong);
792 env->fpu->fcr0 = tswapl(*(target_ulong *)ptr);
793 ptr += sizeof(target_ulong);
795 /* set rounding mode */
796 RESTORE_ROUNDING_MODE;
798 #ifndef CONFIG_SOFTFLOAT
799 /* no floating point exception for native float */
800 SET_FP_ENABLE(env->fcr31, 0);
801 #endif
804 #elif defined (TARGET_SH4)
806 /* Hint: Use "set architecture sh4" in GDB to see fpu registers */
808 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
810 uint32_t *ptr = (uint32_t *)mem_buf;
811 int i;
813 #define SAVE(x) *ptr++=tswapl(x)
814 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
815 for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
816 } else {
817 for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
819 for (i = 8; i < 16; i++) SAVE(env->gregs[i]);
820 SAVE (env->pc);
821 SAVE (env->pr);
822 SAVE (env->gbr);
823 SAVE (env->vbr);
824 SAVE (env->mach);
825 SAVE (env->macl);
826 SAVE (env->sr);
827 SAVE (env->fpul);
828 SAVE (env->fpscr);
829 for (i = 0; i < 16; i++)
830 SAVE(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
831 SAVE (env->ssr);
832 SAVE (env->spc);
833 for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
834 for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
835 return ((uint8_t *)ptr - mem_buf);
838 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
840 uint32_t *ptr = (uint32_t *)mem_buf;
841 int i;
843 #define LOAD(x) (x)=*ptr++;
844 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
845 for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
846 } else {
847 for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
849 for (i = 8; i < 16; i++) LOAD(env->gregs[i]);
850 LOAD (env->pc);
851 LOAD (env->pr);
852 LOAD (env->gbr);
853 LOAD (env->vbr);
854 LOAD (env->mach);
855 LOAD (env->macl);
856 LOAD (env->sr);
857 LOAD (env->fpul);
858 LOAD (env->fpscr);
859 for (i = 0; i < 16; i++)
860 LOAD(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
861 LOAD (env->ssr);
862 LOAD (env->spc);
863 for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
864 for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
866 #else
867 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
869 return 0;
872 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
876 #endif
878 static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf)
880 const char *p;
881 int ch, reg_size, type;
882 char buf[4096];
883 uint8_t mem_buf[2000];
884 uint32_t *registers;
885 target_ulong addr, len;
887 #ifdef DEBUG_GDB
888 printf("command='%s'\n", line_buf);
889 #endif
890 p = line_buf;
891 ch = *p++;
892 switch(ch) {
893 case '?':
894 /* TODO: Make this return the correct value for user-mode. */
895 snprintf(buf, sizeof(buf), "S%02x", SIGTRAP);
896 put_packet(s, buf);
897 break;
898 case 'c':
899 if (*p != '\0') {
900 addr = strtoull(p, (char **)&p, 16);
901 #if defined(TARGET_I386)
902 env->eip = addr;
903 #ifdef USE_KVM
904 kvm_load_registers(env);
905 #endif
906 #elif defined (TARGET_PPC)
907 env->nip = addr;
908 #elif defined (TARGET_SPARC)
909 env->pc = addr;
910 env->npc = addr + 4;
911 #elif defined (TARGET_ARM)
912 env->regs[15] = addr;
913 #elif defined (TARGET_SH4)
914 env->pc = addr;
915 #elif defined (TARGET_MIPS)
916 env->PC[env->current_tc] = addr;
917 #endif
919 #ifdef CONFIG_USER_ONLY
920 s->running_state = 1;
921 #else
922 vm_start();
923 #endif
924 return RS_IDLE;
925 case 's':
926 if (*p != '\0') {
927 addr = strtoull(p, (char **)&p, 16);
928 #if defined(TARGET_I386)
929 env->eip = addr;
930 #ifdef USE_KVM
931 kvm_load_registers(env);
932 #endif
933 #elif defined (TARGET_PPC)
934 env->nip = addr;
935 #elif defined (TARGET_SPARC)
936 env->pc = addr;
937 env->npc = addr + 4;
938 #elif defined (TARGET_ARM)
939 env->regs[15] = addr;
940 #elif defined (TARGET_SH4)
941 env->pc = addr;
942 #elif defined (TARGET_MIPS)
943 env->PC[env->current_tc] = addr;
944 #endif
946 cpu_single_step(env, 1);
947 #ifdef CONFIG_USER_ONLY
948 s->running_state = 1;
949 #else
950 vm_start();
951 #endif
952 return RS_IDLE;
953 case 'F':
955 target_ulong ret;
956 target_ulong err;
958 ret = strtoull(p, (char **)&p, 16);
959 if (*p == ',') {
960 p++;
961 err = strtoull(p, (char **)&p, 16);
962 } else {
963 err = 0;
965 if (*p == ',')
966 p++;
967 type = *p;
968 if (gdb_current_syscall_cb)
969 gdb_current_syscall_cb(s->env, ret, err);
970 if (type == 'C') {
971 put_packet(s, "T02");
972 } else {
973 #ifdef CONFIG_USER_ONLY
974 s->running_state = 1;
975 #else
976 vm_start();
977 #endif
980 break;
981 case 'g':
982 #ifdef USE_KVM
983 kvm_save_registers(env);
984 #endif
985 reg_size = cpu_gdb_read_registers(env, mem_buf);
986 memtohex(buf, mem_buf, reg_size);
987 put_packet(s, buf);
988 break;
989 case 'G':
990 registers = (void *)mem_buf;
991 len = strlen(p) / 2;
992 hextomem((uint8_t *)registers, p, len);
993 cpu_gdb_write_registers(env, mem_buf, len);
994 #ifdef USE_KVM
995 kvm_load_registers(env);
996 #endif
997 put_packet(s, "OK");
998 break;
999 case 'm':
1000 addr = strtoull(p, (char **)&p, 16);
1001 if (*p == ',')
1002 p++;
1003 len = strtoull(p, NULL, 16);
1004 if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) {
1005 put_packet (s, "E14");
1006 } else {
1007 memtohex(buf, mem_buf, len);
1008 put_packet(s, buf);
1010 break;
1011 case 'M':
1012 addr = strtoull(p, (char **)&p, 16);
1013 if (*p == ',')
1014 p++;
1015 len = strtoull(p, (char **)&p, 16);
1016 if (*p == ':')
1017 p++;
1018 hextomem(mem_buf, p, len);
1019 if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0)
1020 put_packet(s, "E14");
1021 else
1022 put_packet(s, "OK");
1023 break;
1024 case 'Z':
1025 type = strtoul(p, (char **)&p, 16);
1026 if (*p == ',')
1027 p++;
1028 addr = strtoull(p, (char **)&p, 16);
1029 if (*p == ',')
1030 p++;
1031 len = strtoull(p, (char **)&p, 16);
1032 if (type == 0 || type == 1) {
1033 if (cpu_breakpoint_insert(env, addr) < 0)
1034 goto breakpoint_error;
1035 put_packet(s, "OK");
1036 #ifndef CONFIG_USER_ONLY
1037 } else if (type == 2) {
1038 if (cpu_watchpoint_insert(env, addr) < 0)
1039 goto breakpoint_error;
1040 put_packet(s, "OK");
1041 #endif
1042 } else {
1043 breakpoint_error:
1044 put_packet(s, "E22");
1046 break;
1047 case 'z':
1048 type = strtoul(p, (char **)&p, 16);
1049 if (*p == ',')
1050 p++;
1051 addr = strtoull(p, (char **)&p, 16);
1052 if (*p == ',')
1053 p++;
1054 len = strtoull(p, (char **)&p, 16);
1055 if (type == 0 || type == 1) {
1056 cpu_breakpoint_remove(env, addr);
1057 put_packet(s, "OK");
1058 #ifndef CONFIG_USER_ONLY
1059 } else if (type == 2) {
1060 cpu_watchpoint_remove(env, addr);
1061 put_packet(s, "OK");
1062 #endif
1063 } else {
1064 goto breakpoint_error;
1066 break;
1067 #ifdef CONFIG_LINUX_USER
1068 case 'q':
1069 if (strncmp(p, "Offsets", 7) == 0) {
1070 TaskState *ts = env->opaque;
1072 sprintf(buf,
1073 "Text=" TARGET_FMT_lx ";Data=" TARGET_FMT_lx ";Bss=" TARGET_FMT_lx,
1074 ts->info->code_offset,
1075 ts->info->data_offset,
1076 ts->info->data_offset);
1077 put_packet(s, buf);
1078 break;
1080 /* Fall through. */
1081 #endif
1082 default:
1083 // unknown_command:
1084 /* put empty packet */
1085 buf[0] = '\0';
1086 put_packet(s, buf);
1087 break;
1089 return RS_IDLE;
1092 extern void tb_flush(CPUState *env);
1094 #ifndef CONFIG_USER_ONLY
1095 static void gdb_vm_stopped(void *opaque, int reason)
1097 GDBState *s = opaque;
1098 char buf[256];
1099 int ret;
1101 if (s->state == RS_SYSCALL)
1102 return;
1104 /* disable single step if it was enable */
1105 cpu_single_step(s->env, 0);
1107 if (reason == EXCP_DEBUG) {
1108 if (s->env->watchpoint_hit) {
1109 snprintf(buf, sizeof(buf), "T%02xwatch:" TARGET_FMT_lx ";",
1110 SIGTRAP,
1111 s->env->watchpoint[s->env->watchpoint_hit - 1].vaddr);
1112 put_packet(s, buf);
1113 s->env->watchpoint_hit = 0;
1114 return;
1116 tb_flush(s->env);
1117 ret = SIGTRAP;
1118 } else if (reason == EXCP_INTERRUPT) {
1119 ret = SIGINT;
1120 } else {
1121 ret = 0;
1123 snprintf(buf, sizeof(buf), "S%02x", ret);
1124 put_packet(s, buf);
1126 #endif
1128 /* Send a gdb syscall request.
1129 This accepts limited printf-style format specifiers, specifically:
1130 %x - target_ulong argument printed in hex.
1131 %lx - 64-bit argument printed in hex.
1132 %s - string pointer (target_ulong) and length (int) pair. */
1133 void gdb_do_syscall(gdb_syscall_complete_cb cb, char *fmt, ...)
1135 va_list va;
1136 char buf[256];
1137 char *p;
1138 target_ulong addr;
1139 uint64_t i64;
1140 GDBState *s;
1142 s = gdb_syscall_state;
1143 if (!s)
1144 return;
1145 gdb_current_syscall_cb = cb;
1146 s->state = RS_SYSCALL;
1147 #ifndef CONFIG_USER_ONLY
1148 vm_stop(EXCP_DEBUG);
1149 #endif
1150 s->state = RS_IDLE;
1151 va_start(va, fmt);
1152 p = buf;
1153 *(p++) = 'F';
1154 while (*fmt) {
1155 if (*fmt == '%') {
1156 fmt++;
1157 switch (*fmt++) {
1158 case 'x':
1159 addr = va_arg(va, target_ulong);
1160 p += sprintf(p, TARGET_FMT_lx, addr);
1161 break;
1162 case 'l':
1163 if (*(fmt++) != 'x')
1164 goto bad_format;
1165 i64 = va_arg(va, uint64_t);
1166 p += sprintf(p, "%" PRIx64, i64);
1167 break;
1168 case 's':
1169 addr = va_arg(va, target_ulong);
1170 p += sprintf(p, TARGET_FMT_lx "/%x", addr, va_arg(va, int));
1171 break;
1172 default:
1173 bad_format:
1174 fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
1175 fmt - 1);
1176 break;
1178 } else {
1179 *(p++) = *(fmt++);
1182 *p = 0;
1183 va_end(va);
1184 put_packet(s, buf);
1185 #ifdef CONFIG_USER_ONLY
1186 gdb_handlesig(s->env, 0);
1187 #else
1188 cpu_interrupt(s->env, CPU_INTERRUPT_EXIT);
1189 #endif
1192 static void gdb_read_byte(GDBState *s, int ch)
1194 CPUState *env = s->env;
1195 int i, csum;
1196 char reply[1];
1198 #ifndef CONFIG_USER_ONLY
1199 if (s->last_packet_len) {
1200 /* Waiting for a response to the last packet. If we see the start
1201 of a new command then abandon the previous response. */
1202 if (ch == '-') {
1203 #ifdef DEBUG_GDB
1204 printf("Got NACK, retransmitting\n");
1205 #endif
1206 put_buffer(s, s->last_packet, s->last_packet_len);
1208 #ifdef DEBUG_GDB
1209 else if (ch == '+')
1210 printf("Got ACK\n");
1211 else
1212 printf("Got '%c' when expecting ACK/NACK\n", ch);
1213 #endif
1214 if (ch == '+' || ch == '$')
1215 s->last_packet_len = 0;
1216 if (ch != '$')
1217 return;
1219 if (vm_running) {
1220 /* when the CPU is running, we cannot do anything except stop
1221 it when receiving a char */
1222 vm_stop(EXCP_INTERRUPT);
1223 } else
1224 #endif
1226 switch(s->state) {
1227 case RS_IDLE:
1228 if (ch == '$') {
1229 s->line_buf_index = 0;
1230 s->state = RS_GETLINE;
1232 break;
1233 case RS_GETLINE:
1234 if (ch == '#') {
1235 s->state = RS_CHKSUM1;
1236 } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
1237 s->state = RS_IDLE;
1238 } else {
1239 s->line_buf[s->line_buf_index++] = ch;
1241 break;
1242 case RS_CHKSUM1:
1243 s->line_buf[s->line_buf_index] = '\0';
1244 s->line_csum = fromhex(ch) << 4;
1245 s->state = RS_CHKSUM2;
1246 break;
1247 case RS_CHKSUM2:
1248 s->line_csum |= fromhex(ch);
1249 csum = 0;
1250 for(i = 0; i < s->line_buf_index; i++) {
1251 csum += s->line_buf[i];
1253 if (s->line_csum != (csum & 0xff)) {
1254 reply[0] = '-';
1255 put_buffer(s, reply, 1);
1256 s->state = RS_IDLE;
1257 } else {
1258 reply[0] = '+';
1259 put_buffer(s, reply, 1);
1260 s->state = gdb_handle_packet(s, env, s->line_buf);
1262 break;
1263 default:
1264 abort();
1269 #ifdef CONFIG_USER_ONLY
1271 gdb_handlesig (CPUState *env, int sig)
1273 GDBState *s;
1274 char buf[256];
1275 int n;
1277 if (gdbserver_fd < 0)
1278 return sig;
1280 s = &gdbserver_state;
1282 /* disable single step if it was enabled */
1283 cpu_single_step(env, 0);
1284 tb_flush(env);
1286 if (sig != 0)
1288 snprintf(buf, sizeof(buf), "S%02x", sig);
1289 put_packet(s, buf);
1292 sig = 0;
1293 s->state = RS_IDLE;
1294 s->running_state = 0;
1295 while (s->running_state == 0) {
1296 n = read (s->fd, buf, 256);
1297 if (n > 0)
1299 int i;
1301 for (i = 0; i < n; i++)
1302 gdb_read_byte (s, buf[i]);
1304 else if (n == 0 || errno != EAGAIN)
1306 /* XXX: Connection closed. Should probably wait for annother
1307 connection before continuing. */
1308 return sig;
1311 return sig;
1314 /* Tell the remote gdb that the process has exited. */
1315 void gdb_exit(CPUState *env, int code)
1317 GDBState *s;
1318 char buf[4];
1320 if (gdbserver_fd < 0)
1321 return;
1323 s = &gdbserver_state;
1325 snprintf(buf, sizeof(buf), "W%02x", code);
1326 put_packet(s, buf);
1330 static void gdb_accept(void *opaque)
1332 GDBState *s;
1333 struct sockaddr_in sockaddr;
1334 socklen_t len;
1335 int val, fd;
1337 for(;;) {
1338 len = sizeof(sockaddr);
1339 fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
1340 if (fd < 0 && errno != EINTR) {
1341 perror("accept");
1342 return;
1343 } else if (fd >= 0) {
1344 break;
1348 /* set short latency */
1349 val = 1;
1350 setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val));
1352 s = &gdbserver_state;
1353 memset (s, 0, sizeof (GDBState));
1354 s->env = first_cpu; /* XXX: allow to change CPU */
1355 s->fd = fd;
1357 gdb_syscall_state = s;
1359 fcntl(fd, F_SETFL, O_NONBLOCK);
1362 static int gdbserver_open(int port)
1364 struct sockaddr_in sockaddr;
1365 int fd, val, ret;
1367 fd = socket(PF_INET, SOCK_STREAM, 0);
1368 if (fd < 0) {
1369 perror("socket");
1370 return -1;
1373 /* allow fast reuse */
1374 val = 1;
1375 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val));
1377 sockaddr.sin_family = AF_INET;
1378 sockaddr.sin_port = htons(port);
1379 sockaddr.sin_addr.s_addr = 0;
1380 ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
1381 if (ret < 0) {
1382 perror("bind");
1383 return -1;
1385 ret = listen(fd, 0);
1386 if (ret < 0) {
1387 perror("listen");
1388 return -1;
1390 return fd;
1393 int gdbserver_start(int port)
1395 gdbserver_fd = gdbserver_open(port);
1396 if (gdbserver_fd < 0)
1397 return -1;
1398 /* accept connections */
1399 gdb_accept (NULL);
1400 return 0;
1402 #else
1403 static int gdb_chr_can_receive(void *opaque)
1405 return 1;
1408 static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size)
1410 GDBState *s = opaque;
1411 int i;
1413 for (i = 0; i < size; i++) {
1414 gdb_read_byte(s, buf[i]);
1418 static void gdb_chr_event(void *opaque, int event)
1420 switch (event) {
1421 case CHR_EVENT_RESET:
1422 vm_stop(EXCP_INTERRUPT);
1423 gdb_syscall_state = opaque;
1424 break;
1425 default:
1426 break;
1430 int gdbserver_start(const char *port)
1432 GDBState *s;
1433 char gdbstub_port_name[128];
1434 int port_num;
1435 char *p;
1436 CharDriverState *chr;
1438 if (!port || !*port)
1439 return -1;
1441 port_num = strtol(port, &p, 10);
1442 if (*p == 0) {
1443 /* A numeric value is interpreted as a port number. */
1444 snprintf(gdbstub_port_name, sizeof(gdbstub_port_name),
1445 "tcp::%d,nowait,nodelay,server", port_num);
1446 port = gdbstub_port_name;
1449 chr = qemu_chr_open(port);
1450 if (!chr)
1451 return -1;
1453 s = qemu_mallocz(sizeof(GDBState));
1454 if (!s) {
1455 return -1;
1457 s->env = first_cpu; /* XXX: allow to change CPU */
1458 s->chr = chr;
1459 qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive,
1460 gdb_chr_event, s);
1461 qemu_add_vm_stop_handler(gdb_vm_stopped, s);
1462 return 0;
1464 #endif