Don't use a 32-bit bit type as offset argument for kvm dirty tracking
[qemu-kvm/fedora.git] / kvm / kernel / arch / x86 / include / asm / svm.h
blob5a34c949fe9ffd9ed44b3b1bdf0ee9d396246b7e
1 #ifndef KVM_UNIFDEF_H
2 #define KVM_UNIFDEF_H
4 #ifdef __i386__
5 #ifndef CONFIG_X86_32
6 #define CONFIG_X86_32 1
7 #endif
8 #endif
10 #ifdef __x86_64__
11 #ifndef CONFIG_X86_64
12 #define CONFIG_X86_64 1
13 #endif
14 #endif
16 #if defined(__i386__) || defined (__x86_64__)
17 #ifndef CONFIG_X86
18 #define CONFIG_X86 1
19 #endif
20 #endif
22 #ifdef __ia64__
23 #ifndef CONFIG_IA64
24 #define CONFIG_IA64 1
25 #endif
26 #endif
28 #ifdef __PPC__
29 #ifndef CONFIG_PPC
30 #define CONFIG_PPC 1
31 #endif
32 #endif
34 #ifdef __s390__
35 #ifndef CONFIG_S390
36 #define CONFIG_S390 1
37 #endif
38 #endif
40 #endif
41 #ifndef __SVM_H
42 #define __SVM_H
44 enum {
45 INTERCEPT_INTR,
46 INTERCEPT_NMI,
47 INTERCEPT_SMI,
48 INTERCEPT_INIT,
49 INTERCEPT_VINTR,
50 INTERCEPT_SELECTIVE_CR0,
51 INTERCEPT_STORE_IDTR,
52 INTERCEPT_STORE_GDTR,
53 INTERCEPT_STORE_LDTR,
54 INTERCEPT_STORE_TR,
55 INTERCEPT_LOAD_IDTR,
56 INTERCEPT_LOAD_GDTR,
57 INTERCEPT_LOAD_LDTR,
58 INTERCEPT_LOAD_TR,
59 INTERCEPT_RDTSC,
60 INTERCEPT_RDPMC,
61 INTERCEPT_PUSHF,
62 INTERCEPT_POPF,
63 INTERCEPT_CPUID,
64 INTERCEPT_RSM,
65 INTERCEPT_IRET,
66 INTERCEPT_INTn,
67 INTERCEPT_INVD,
68 INTERCEPT_PAUSE,
69 INTERCEPT_HLT,
70 INTERCEPT_INVLPG,
71 INTERCEPT_INVLPGA,
72 INTERCEPT_IOIO_PROT,
73 INTERCEPT_MSR_PROT,
74 INTERCEPT_TASK_SWITCH,
75 INTERCEPT_FERR_FREEZE,
76 INTERCEPT_SHUTDOWN,
77 INTERCEPT_VMRUN,
78 INTERCEPT_VMMCALL,
79 INTERCEPT_VMLOAD,
80 INTERCEPT_VMSAVE,
81 INTERCEPT_STGI,
82 INTERCEPT_CLGI,
83 INTERCEPT_SKINIT,
84 INTERCEPT_RDTSCP,
85 INTERCEPT_ICEBP,
86 INTERCEPT_WBINVD,
87 INTERCEPT_MONITOR,
88 INTERCEPT_MWAIT,
89 INTERCEPT_MWAIT_COND,
93 struct __attribute__ ((__packed__)) vmcb_control_area {
94 u16 intercept_cr_read;
95 u16 intercept_cr_write;
96 u16 intercept_dr_read;
97 u16 intercept_dr_write;
98 u32 intercept_exceptions;
99 u64 intercept;
100 u8 reserved_1[44];
101 u64 iopm_base_pa;
102 u64 msrpm_base_pa;
103 u64 tsc_offset;
104 u32 asid;
105 u8 tlb_ctl;
106 u8 reserved_2[3];
107 u32 int_ctl;
108 u32 int_vector;
109 u32 int_state;
110 u8 reserved_3[4];
111 u32 exit_code;
112 u32 exit_code_hi;
113 u64 exit_info_1;
114 u64 exit_info_2;
115 u32 exit_int_info;
116 u32 exit_int_info_err;
117 u64 nested_ctl;
118 u8 reserved_4[16];
119 u32 event_inj;
120 u32 event_inj_err;
121 u64 nested_cr3;
122 u64 lbr_ctl;
123 u8 reserved_5[832];
127 #define TLB_CONTROL_DO_NOTHING 0
128 #define TLB_CONTROL_FLUSH_ALL_ASID 1
130 #define V_TPR_MASK 0x0f
132 #define V_IRQ_SHIFT 8
133 #define V_IRQ_MASK (1 << V_IRQ_SHIFT)
135 #define V_INTR_PRIO_SHIFT 16
136 #define V_INTR_PRIO_MASK (0x0f << V_INTR_PRIO_SHIFT)
138 #define V_IGN_TPR_SHIFT 20
139 #define V_IGN_TPR_MASK (1 << V_IGN_TPR_SHIFT)
141 #define V_INTR_MASKING_SHIFT 24
142 #define V_INTR_MASKING_MASK (1 << V_INTR_MASKING_SHIFT)
144 #define SVM_INTERRUPT_SHADOW_MASK 1
146 #define SVM_IOIO_STR_SHIFT 2
147 #define SVM_IOIO_REP_SHIFT 3
148 #define SVM_IOIO_SIZE_SHIFT 4
149 #define SVM_IOIO_ASIZE_SHIFT 7
151 #define SVM_IOIO_TYPE_MASK 1
152 #define SVM_IOIO_STR_MASK (1 << SVM_IOIO_STR_SHIFT)
153 #define SVM_IOIO_REP_MASK (1 << SVM_IOIO_REP_SHIFT)
154 #define SVM_IOIO_SIZE_MASK (7 << SVM_IOIO_SIZE_SHIFT)
155 #define SVM_IOIO_ASIZE_MASK (7 << SVM_IOIO_ASIZE_SHIFT)
157 struct __attribute__ ((__packed__)) vmcb_seg {
158 u16 selector;
159 u16 attrib;
160 u32 limit;
161 u64 base;
164 struct __attribute__ ((__packed__)) vmcb_save_area {
165 struct vmcb_seg es;
166 struct vmcb_seg cs;
167 struct vmcb_seg ss;
168 struct vmcb_seg ds;
169 struct vmcb_seg fs;
170 struct vmcb_seg gs;
171 struct vmcb_seg gdtr;
172 struct vmcb_seg ldtr;
173 struct vmcb_seg idtr;
174 struct vmcb_seg tr;
175 u8 reserved_1[43];
176 u8 cpl;
177 u8 reserved_2[4];
178 u64 efer;
179 u8 reserved_3[112];
180 u64 cr4;
181 u64 cr3;
182 u64 cr0;
183 u64 dr7;
184 u64 dr6;
185 u64 rflags;
186 u64 rip;
187 u8 reserved_4[88];
188 u64 rsp;
189 u8 reserved_5[24];
190 u64 rax;
191 u64 star;
192 u64 lstar;
193 u64 cstar;
194 u64 sfmask;
195 u64 kernel_gs_base;
196 u64 sysenter_cs;
197 u64 sysenter_esp;
198 u64 sysenter_eip;
199 u64 cr2;
200 u8 reserved_6[32];
201 u64 g_pat;
202 u64 dbgctl;
203 u64 br_from;
204 u64 br_to;
205 u64 last_excp_from;
206 u64 last_excp_to;
209 struct __attribute__ ((__packed__)) vmcb {
210 struct vmcb_control_area control;
211 struct vmcb_save_area save;
214 #define SVM_CPUID_FEATURE_SHIFT 2
215 #define SVM_CPUID_FUNC 0x8000000a
217 #define SVM_VM_CR_SVM_DISABLE 4
219 #define SVM_SELECTOR_S_SHIFT 4
220 #define SVM_SELECTOR_DPL_SHIFT 5
221 #define SVM_SELECTOR_P_SHIFT 7
222 #define SVM_SELECTOR_AVL_SHIFT 8
223 #define SVM_SELECTOR_L_SHIFT 9
224 #define SVM_SELECTOR_DB_SHIFT 10
225 #define SVM_SELECTOR_G_SHIFT 11
227 #define SVM_SELECTOR_TYPE_MASK (0xf)
228 #define SVM_SELECTOR_S_MASK (1 << SVM_SELECTOR_S_SHIFT)
229 #define SVM_SELECTOR_DPL_MASK (3 << SVM_SELECTOR_DPL_SHIFT)
230 #define SVM_SELECTOR_P_MASK (1 << SVM_SELECTOR_P_SHIFT)
231 #define SVM_SELECTOR_AVL_MASK (1 << SVM_SELECTOR_AVL_SHIFT)
232 #define SVM_SELECTOR_L_MASK (1 << SVM_SELECTOR_L_SHIFT)
233 #define SVM_SELECTOR_DB_MASK (1 << SVM_SELECTOR_DB_SHIFT)
234 #define SVM_SELECTOR_G_MASK (1 << SVM_SELECTOR_G_SHIFT)
236 #define SVM_SELECTOR_WRITE_MASK (1 << 1)
237 #define SVM_SELECTOR_READ_MASK SVM_SELECTOR_WRITE_MASK
238 #define SVM_SELECTOR_CODE_MASK (1 << 3)
240 #define INTERCEPT_CR0_MASK 1
241 #define INTERCEPT_CR3_MASK (1 << 3)
242 #define INTERCEPT_CR4_MASK (1 << 4)
243 #define INTERCEPT_CR8_MASK (1 << 8)
245 #define INTERCEPT_DR0_MASK 1
246 #define INTERCEPT_DR1_MASK (1 << 1)
247 #define INTERCEPT_DR2_MASK (1 << 2)
248 #define INTERCEPT_DR3_MASK (1 << 3)
249 #define INTERCEPT_DR4_MASK (1 << 4)
250 #define INTERCEPT_DR5_MASK (1 << 5)
251 #define INTERCEPT_DR6_MASK (1 << 6)
252 #define INTERCEPT_DR7_MASK (1 << 7)
254 #define SVM_EVTINJ_VEC_MASK 0xff
256 #define SVM_EVTINJ_TYPE_SHIFT 8
257 #define SVM_EVTINJ_TYPE_MASK (7 << SVM_EVTINJ_TYPE_SHIFT)
259 #define SVM_EVTINJ_TYPE_INTR (0 << SVM_EVTINJ_TYPE_SHIFT)
260 #define SVM_EVTINJ_TYPE_NMI (2 << SVM_EVTINJ_TYPE_SHIFT)
261 #define SVM_EVTINJ_TYPE_EXEPT (3 << SVM_EVTINJ_TYPE_SHIFT)
262 #define SVM_EVTINJ_TYPE_SOFT (4 << SVM_EVTINJ_TYPE_SHIFT)
264 #define SVM_EVTINJ_VALID (1 << 31)
265 #define SVM_EVTINJ_VALID_ERR (1 << 11)
267 #define SVM_EXITINTINFO_VEC_MASK SVM_EVTINJ_VEC_MASK
268 #define SVM_EXITINTINFO_TYPE_MASK SVM_EVTINJ_TYPE_MASK
270 #define SVM_EXITINTINFO_TYPE_INTR SVM_EVTINJ_TYPE_INTR
271 #define SVM_EXITINTINFO_TYPE_NMI SVM_EVTINJ_TYPE_NMI
272 #define SVM_EXITINTINFO_TYPE_EXEPT SVM_EVTINJ_TYPE_EXEPT
273 #define SVM_EXITINTINFO_TYPE_SOFT SVM_EVTINJ_TYPE_SOFT
275 #define SVM_EXITINTINFO_VALID SVM_EVTINJ_VALID
276 #define SVM_EXITINTINFO_VALID_ERR SVM_EVTINJ_VALID_ERR
278 #define SVM_EXITINFOSHIFT_TS_REASON_IRET 36
279 #define SVM_EXITINFOSHIFT_TS_REASON_JMP 38
281 #define SVM_EXIT_READ_CR0 0x000
282 #define SVM_EXIT_READ_CR3 0x003
283 #define SVM_EXIT_READ_CR4 0x004
284 #define SVM_EXIT_READ_CR8 0x008
285 #define SVM_EXIT_WRITE_CR0 0x010
286 #define SVM_EXIT_WRITE_CR3 0x013
287 #define SVM_EXIT_WRITE_CR4 0x014
288 #define SVM_EXIT_WRITE_CR8 0x018
289 #define SVM_EXIT_READ_DR0 0x020
290 #define SVM_EXIT_READ_DR1 0x021
291 #define SVM_EXIT_READ_DR2 0x022
292 #define SVM_EXIT_READ_DR3 0x023
293 #define SVM_EXIT_READ_DR4 0x024
294 #define SVM_EXIT_READ_DR5 0x025
295 #define SVM_EXIT_READ_DR6 0x026
296 #define SVM_EXIT_READ_DR7 0x027
297 #define SVM_EXIT_WRITE_DR0 0x030
298 #define SVM_EXIT_WRITE_DR1 0x031
299 #define SVM_EXIT_WRITE_DR2 0x032
300 #define SVM_EXIT_WRITE_DR3 0x033
301 #define SVM_EXIT_WRITE_DR4 0x034
302 #define SVM_EXIT_WRITE_DR5 0x035
303 #define SVM_EXIT_WRITE_DR6 0x036
304 #define SVM_EXIT_WRITE_DR7 0x037
305 #define SVM_EXIT_EXCP_BASE 0x040
306 #define SVM_EXIT_INTR 0x060
307 #define SVM_EXIT_NMI 0x061
308 #define SVM_EXIT_SMI 0x062
309 #define SVM_EXIT_INIT 0x063
310 #define SVM_EXIT_VINTR 0x064
311 #define SVM_EXIT_CR0_SEL_WRITE 0x065
312 #define SVM_EXIT_IDTR_READ 0x066
313 #define SVM_EXIT_GDTR_READ 0x067
314 #define SVM_EXIT_LDTR_READ 0x068
315 #define SVM_EXIT_TR_READ 0x069
316 #define SVM_EXIT_IDTR_WRITE 0x06a
317 #define SVM_EXIT_GDTR_WRITE 0x06b
318 #define SVM_EXIT_LDTR_WRITE 0x06c
319 #define SVM_EXIT_TR_WRITE 0x06d
320 #define SVM_EXIT_RDTSC 0x06e
321 #define SVM_EXIT_RDPMC 0x06f
322 #define SVM_EXIT_PUSHF 0x070
323 #define SVM_EXIT_POPF 0x071
324 #define SVM_EXIT_CPUID 0x072
325 #define SVM_EXIT_RSM 0x073
326 #define SVM_EXIT_IRET 0x074
327 #define SVM_EXIT_SWINT 0x075
328 #define SVM_EXIT_INVD 0x076
329 #define SVM_EXIT_PAUSE 0x077
330 #define SVM_EXIT_HLT 0x078
331 #define SVM_EXIT_INVLPG 0x079
332 #define SVM_EXIT_INVLPGA 0x07a
333 #define SVM_EXIT_IOIO 0x07b
334 #define SVM_EXIT_MSR 0x07c
335 #define SVM_EXIT_TASK_SWITCH 0x07d
336 #define SVM_EXIT_FERR_FREEZE 0x07e
337 #define SVM_EXIT_SHUTDOWN 0x07f
338 #define SVM_EXIT_VMRUN 0x080
339 #define SVM_EXIT_VMMCALL 0x081
340 #define SVM_EXIT_VMLOAD 0x082
341 #define SVM_EXIT_VMSAVE 0x083
342 #define SVM_EXIT_STGI 0x084
343 #define SVM_EXIT_CLGI 0x085
344 #define SVM_EXIT_SKINIT 0x086
345 #define SVM_EXIT_RDTSCP 0x087
346 #define SVM_EXIT_ICEBP 0x088
347 #define SVM_EXIT_WBINVD 0x089
348 #define SVM_EXIT_MONITOR 0x08a
349 #define SVM_EXIT_MWAIT 0x08b
350 #define SVM_EXIT_MWAIT_COND 0x08c
351 #define SVM_EXIT_NPF 0x400
353 #define SVM_EXIT_ERR -1
355 #define SVM_CR0_SELECTIVE_MASK (1 << 3 | 1) /* TS and MP */
357 #define SVM_VMLOAD ".byte 0x0f, 0x01, 0xda"
358 #define SVM_VMRUN ".byte 0x0f, 0x01, 0xd8"
359 #define SVM_VMSAVE ".byte 0x0f, 0x01, 0xdb"
360 #define SVM_CLGI ".byte 0x0f, 0x01, 0xdd"
361 #define SVM_STGI ".byte 0x0f, 0x01, 0xdc"
362 #define SVM_INVLPGA ".byte 0x0f, 0x01, 0xdf"
364 #endif