Migration: make bandwidth limitation adaptive
[qemu-kvm/fedora.git] / gdbstub.c
bloba3b82afc8be39e78a877640774aa9c1b5377aef0
1 /*
2 * gdb server stub
3 *
4 * Copyright (c) 2003-2005 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include "config.h"
21 #ifdef CONFIG_USER_ONLY
22 #include <stdlib.h>
23 #include <stdio.h>
24 #include <stdarg.h>
25 #include <string.h>
26 #include <errno.h>
27 #include <unistd.h>
28 #include <fcntl.h>
30 #include "qemu.h"
31 #else
32 #include "vl.h"
33 #include "qemu-kvm.h"
34 #endif
36 #include "qemu_socket.h"
37 #ifdef _WIN32
38 /* XXX: these constants may be independent of the host ones even for Unix */
39 #ifndef SIGTRAP
40 #define SIGTRAP 5
41 #endif
42 #ifndef SIGINT
43 #define SIGINT 2
44 #endif
45 #else
46 #include <signal.h>
47 #endif
49 //#define DEBUG_GDB
51 enum RSState {
52 RS_IDLE,
53 RS_GETLINE,
54 RS_CHKSUM1,
55 RS_CHKSUM2,
56 RS_SYSCALL,
58 typedef struct GDBState {
59 CPUState *env; /* current CPU */
60 enum RSState state; /* parsing state */
61 char line_buf[4096];
62 int line_buf_index;
63 int line_csum;
64 char last_packet[4100];
65 int last_packet_len;
66 #ifdef CONFIG_USER_ONLY
67 int fd;
68 int running_state;
69 #else
70 CharDriverState *chr;
71 #endif
72 } GDBState;
74 #ifdef CONFIG_USER_ONLY
75 /* XXX: This is not thread safe. Do we care? */
76 static int gdbserver_fd = -1;
78 /* XXX: remove this hack. */
79 static GDBState gdbserver_state;
81 static int get_char(GDBState *s)
83 uint8_t ch;
84 int ret;
86 for(;;) {
87 ret = recv(s->fd, &ch, 1, 0);
88 if (ret < 0) {
89 if (errno != EINTR && errno != EAGAIN)
90 return -1;
91 } else if (ret == 0) {
92 return -1;
93 } else {
94 break;
97 return ch;
99 #endif
101 /* GDB stub state for use by semihosting syscalls. */
102 static GDBState *gdb_syscall_state;
103 static gdb_syscall_complete_cb gdb_current_syscall_cb;
105 enum {
106 GDB_SYS_UNKNOWN,
107 GDB_SYS_ENABLED,
108 GDB_SYS_DISABLED,
109 } gdb_syscall_mode;
111 /* If gdb is connected when the first semihosting syscall occurs then use
112 remote gdb syscalls. Otherwise use native file IO. */
113 int use_gdb_syscalls(void)
115 if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
116 gdb_syscall_mode = (gdb_syscall_state ? GDB_SYS_ENABLED
117 : GDB_SYS_DISABLED);
119 return gdb_syscall_mode == GDB_SYS_ENABLED;
122 static void put_buffer(GDBState *s, const uint8_t *buf, int len)
124 #ifdef CONFIG_USER_ONLY
125 int ret;
127 while (len > 0) {
128 ret = send(s->fd, buf, len, 0);
129 if (ret < 0) {
130 if (errno != EINTR && errno != EAGAIN)
131 return;
132 } else {
133 buf += ret;
134 len -= ret;
137 #else
138 qemu_chr_write(s->chr, buf, len);
139 #endif
142 static inline int fromhex(int v)
144 if (v >= '0' && v <= '9')
145 return v - '0';
146 else if (v >= 'A' && v <= 'F')
147 return v - 'A' + 10;
148 else if (v >= 'a' && v <= 'f')
149 return v - 'a' + 10;
150 else
151 return 0;
154 static inline int tohex(int v)
156 if (v < 10)
157 return v + '0';
158 else
159 return v - 10 + 'a';
162 static void memtohex(char *buf, const uint8_t *mem, int len)
164 int i, c;
165 char *q;
166 q = buf;
167 for(i = 0; i < len; i++) {
168 c = mem[i];
169 *q++ = tohex(c >> 4);
170 *q++ = tohex(c & 0xf);
172 *q = '\0';
175 static void hextomem(uint8_t *mem, const char *buf, int len)
177 int i;
179 for(i = 0; i < len; i++) {
180 mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
181 buf += 2;
185 /* return -1 if error, 0 if OK */
186 static int put_packet(GDBState *s, char *buf)
188 int len, csum, i;
189 char *p;
191 #ifdef DEBUG_GDB
192 printf("reply='%s'\n", buf);
193 #endif
195 for(;;) {
196 p = s->last_packet;
197 *(p++) = '$';
198 len = strlen(buf);
199 memcpy(p, buf, len);
200 p += len;
201 csum = 0;
202 for(i = 0; i < len; i++) {
203 csum += buf[i];
205 *(p++) = '#';
206 *(p++) = tohex((csum >> 4) & 0xf);
207 *(p++) = tohex((csum) & 0xf);
209 s->last_packet_len = p - s->last_packet;
210 put_buffer(s, s->last_packet, s->last_packet_len);
212 #ifdef CONFIG_USER_ONLY
213 i = get_char(s);
214 if (i < 0)
215 return -1;
216 if (i == '+')
217 break;
218 #else
219 break;
220 #endif
222 return 0;
225 #if defined(TARGET_X86_64)
227 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
229 uint8_t *p = mem_buf;
230 int i, fpus;
232 #define PUTREG(x) do { \
233 target_ulong reg = tswapl(x); \
234 memcpy(p, &reg, sizeof reg); \
235 p += sizeof reg; \
236 } while (0)
237 #define PUTREG32(x) do { \
238 uint32_t reg = tswap32(x); \
239 memcpy(p, &reg, sizeof reg); \
240 p += sizeof reg; \
241 } while (0)
242 #define PUTREGF(x) do { \
243 memcpy(p, &(x), 10); \
244 p += sizeof (x); \
245 } while (0)
247 PUTREG(env->regs[R_EAX]);
248 PUTREG(env->regs[R_EBX]);
249 PUTREG(env->regs[R_ECX]);
250 PUTREG(env->regs[R_EDX]);
251 PUTREG(env->regs[R_ESI]);
252 PUTREG(env->regs[R_EDI]);
253 PUTREG(env->regs[R_EBP]);
254 PUTREG(env->regs[R_ESP]);
255 PUTREG(env->regs[8]);
256 PUTREG(env->regs[9]);
257 PUTREG(env->regs[10]);
258 PUTREG(env->regs[11]);
259 PUTREG(env->regs[12]);
260 PUTREG(env->regs[13]);
261 PUTREG(env->regs[14]);
262 PUTREG(env->regs[15]);
264 PUTREG(env->eip);
265 PUTREG32(env->eflags);
266 PUTREG32(env->segs[R_CS].selector);
267 PUTREG32(env->segs[R_SS].selector);
268 PUTREG32(env->segs[R_DS].selector);
269 PUTREG32(env->segs[R_ES].selector);
270 PUTREG32(env->segs[R_FS].selector);
271 PUTREG32(env->segs[R_GS].selector);
272 /* XXX: convert floats */
273 for(i = 0; i < 8; i++) {
274 PUTREGF(env->fpregs[i]);
276 PUTREG32(env->fpuc);
277 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
278 PUTREG32(fpus);
279 PUTREG32(0); /* XXX: convert tags */
280 PUTREG32(0); /* fiseg */
281 PUTREG32(0); /* fioff */
282 PUTREG32(0); /* foseg */
283 PUTREG32(0); /* fooff */
284 PUTREG32(0); /* fop */
286 #undef PUTREG
287 #undef PUTREG32
288 #undef PUTREGF
290 return p - mem_buf;
293 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
295 uint8_t *p = mem_buf;
296 uint32_t junk;
297 int i, fpus;
299 #define GETREG(x) do { \
300 target_ulong reg; \
301 memcpy(&reg, p, sizeof reg); \
302 x = tswapl(reg); \
303 p += sizeof reg; \
304 } while (0)
305 #define GETREG32(x) do { \
306 uint32_t reg; \
307 memcpy(&reg, p, sizeof reg); \
308 x = tswap32(reg); \
309 p += sizeof reg; \
310 } while (0)
311 #define GETREGF(x) do { \
312 memcpy(&(x), p, 10); \
313 p += 10; \
314 } while (0)
316 GETREG(env->regs[R_EAX]);
317 GETREG(env->regs[R_EBX]);
318 GETREG(env->regs[R_ECX]);
319 GETREG(env->regs[R_EDX]);
320 GETREG(env->regs[R_ESI]);
321 GETREG(env->regs[R_EDI]);
322 GETREG(env->regs[R_EBP]);
323 GETREG(env->regs[R_ESP]);
324 GETREG(env->regs[8]);
325 GETREG(env->regs[9]);
326 GETREG(env->regs[10]);
327 GETREG(env->regs[11]);
328 GETREG(env->regs[12]);
329 GETREG(env->regs[13]);
330 GETREG(env->regs[14]);
331 GETREG(env->regs[15]);
333 GETREG(env->eip);
334 GETREG32(env->eflags);
335 GETREG32(env->segs[R_CS].selector);
336 GETREG32(env->segs[R_SS].selector);
337 GETREG32(env->segs[R_DS].selector);
338 GETREG32(env->segs[R_ES].selector);
339 GETREG32(env->segs[R_FS].selector);
340 GETREG32(env->segs[R_GS].selector);
341 /* XXX: convert floats */
342 for(i = 0; i < 8; i++) {
343 GETREGF(env->fpregs[i]);
345 GETREG32(env->fpuc);
346 GETREG32(fpus); /* XXX: convert fpus */
347 GETREG32(junk); /* XXX: convert tags */
348 GETREG32(junk); /* fiseg */
349 GETREG32(junk); /* fioff */
350 GETREG32(junk); /* foseg */
351 GETREG32(junk); /* fooff */
352 GETREG32(junk); /* fop */
354 #undef GETREG
355 #undef GETREG32
356 #undef GETREGF
359 #elif defined(TARGET_I386)
361 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
363 uint32_t *registers = (uint32_t *)mem_buf;
364 int i, fpus;
366 for(i = 0; i < 8; i++) {
367 registers[i] = env->regs[i];
369 registers[8] = env->eip;
370 registers[9] = env->eflags;
371 registers[10] = env->segs[R_CS].selector;
372 registers[11] = env->segs[R_SS].selector;
373 registers[12] = env->segs[R_DS].selector;
374 registers[13] = env->segs[R_ES].selector;
375 registers[14] = env->segs[R_FS].selector;
376 registers[15] = env->segs[R_GS].selector;
377 /* XXX: convert floats */
378 for(i = 0; i < 8; i++) {
379 memcpy(mem_buf + 16 * 4 + i * 10, &env->fpregs[i], 10);
381 registers[36] = env->fpuc;
382 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
383 registers[37] = fpus;
384 registers[38] = 0; /* XXX: convert tags */
385 registers[39] = 0; /* fiseg */
386 registers[40] = 0; /* fioff */
387 registers[41] = 0; /* foseg */
388 registers[42] = 0; /* fooff */
389 registers[43] = 0; /* fop */
391 for(i = 0; i < 16; i++)
392 tswapls(&registers[i]);
393 for(i = 36; i < 44; i++)
394 tswapls(&registers[i]);
395 return 44 * 4;
398 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
400 uint32_t *registers = (uint32_t *)mem_buf;
401 int i;
403 for(i = 0; i < 8; i++) {
404 env->regs[i] = tswapl(registers[i]);
406 env->eip = tswapl(registers[8]);
407 env->eflags = tswapl(registers[9]);
408 #if defined(CONFIG_USER_ONLY)
409 #define LOAD_SEG(index, sreg)\
410 if (tswapl(registers[index]) != env->segs[sreg].selector)\
411 cpu_x86_load_seg(env, sreg, tswapl(registers[index]));
412 LOAD_SEG(10, R_CS);
413 LOAD_SEG(11, R_SS);
414 LOAD_SEG(12, R_DS);
415 LOAD_SEG(13, R_ES);
416 LOAD_SEG(14, R_FS);
417 LOAD_SEG(15, R_GS);
418 #endif
421 #elif defined (TARGET_PPC)
422 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
424 uint32_t *registers = (uint32_t *)mem_buf, tmp;
425 int i;
427 /* fill in gprs */
428 for(i = 0; i < 32; i++) {
429 registers[i] = tswapl(env->gpr[i]);
431 /* fill in fprs */
432 for (i = 0; i < 32; i++) {
433 registers[(i * 2) + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
434 registers[(i * 2) + 33] = tswapl(*((uint32_t *)&env->fpr[i] + 1));
436 /* nip, msr, ccr, lnk, ctr, xer, mq */
437 registers[96] = tswapl(env->nip);
438 registers[97] = tswapl(do_load_msr(env));
439 tmp = 0;
440 for (i = 0; i < 8; i++)
441 tmp |= env->crf[i] << (32 - ((i + 1) * 4));
442 registers[98] = tswapl(tmp);
443 registers[99] = tswapl(env->lr);
444 registers[100] = tswapl(env->ctr);
445 registers[101] = tswapl(do_load_xer(env));
446 registers[102] = 0;
448 return 103 * 4;
451 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
453 uint32_t *registers = (uint32_t *)mem_buf;
454 int i;
456 /* fill in gprs */
457 for (i = 0; i < 32; i++) {
458 env->gpr[i] = tswapl(registers[i]);
460 /* fill in fprs */
461 for (i = 0; i < 32; i++) {
462 *((uint32_t *)&env->fpr[i]) = tswapl(registers[(i * 2) + 32]);
463 *((uint32_t *)&env->fpr[i] + 1) = tswapl(registers[(i * 2) + 33]);
465 /* nip, msr, ccr, lnk, ctr, xer, mq */
466 env->nip = tswapl(registers[96]);
467 do_store_msr(env, tswapl(registers[97]));
468 registers[98] = tswapl(registers[98]);
469 for (i = 0; i < 8; i++)
470 env->crf[i] = (registers[98] >> (32 - ((i + 1) * 4))) & 0xF;
471 env->lr = tswapl(registers[99]);
472 env->ctr = tswapl(registers[100]);
473 do_store_xer(env, tswapl(registers[101]));
475 #elif defined (TARGET_SPARC)
476 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
478 target_ulong *registers = (target_ulong *)mem_buf;
479 int i;
481 /* fill in g0..g7 */
482 for(i = 0; i < 8; i++) {
483 registers[i] = tswapl(env->gregs[i]);
485 /* fill in register window */
486 for(i = 0; i < 24; i++) {
487 registers[i + 8] = tswapl(env->regwptr[i]);
489 #ifndef TARGET_SPARC64
490 /* fill in fprs */
491 for (i = 0; i < 32; i++) {
492 registers[i + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
494 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
495 registers[64] = tswapl(env->y);
497 target_ulong tmp;
499 tmp = GET_PSR(env);
500 registers[65] = tswapl(tmp);
502 registers[66] = tswapl(env->wim);
503 registers[67] = tswapl(env->tbr);
504 registers[68] = tswapl(env->pc);
505 registers[69] = tswapl(env->npc);
506 registers[70] = tswapl(env->fsr);
507 registers[71] = 0; /* csr */
508 registers[72] = 0;
509 return 73 * sizeof(target_ulong);
510 #else
511 /* fill in fprs */
512 for (i = 0; i < 64; i += 2) {
513 uint64_t tmp;
515 tmp = (uint64_t)tswap32(*((uint32_t *)&env->fpr[i])) << 32;
516 tmp |= tswap32(*((uint32_t *)&env->fpr[i + 1]));
517 registers[i/2 + 32] = tmp;
519 registers[64] = tswapl(env->pc);
520 registers[65] = tswapl(env->npc);
521 registers[66] = tswapl(env->tstate[env->tl]);
522 registers[67] = tswapl(env->fsr);
523 registers[68] = tswapl(env->fprs);
524 registers[69] = tswapl(env->y);
525 return 70 * sizeof(target_ulong);
526 #endif
529 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
531 target_ulong *registers = (target_ulong *)mem_buf;
532 int i;
534 /* fill in g0..g7 */
535 for(i = 0; i < 7; i++) {
536 env->gregs[i] = tswapl(registers[i]);
538 /* fill in register window */
539 for(i = 0; i < 24; i++) {
540 env->regwptr[i] = tswapl(registers[i + 8]);
542 #ifndef TARGET_SPARC64
543 /* fill in fprs */
544 for (i = 0; i < 32; i++) {
545 *((uint32_t *)&env->fpr[i]) = tswapl(registers[i + 32]);
547 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
548 env->y = tswapl(registers[64]);
549 PUT_PSR(env, tswapl(registers[65]));
550 env->wim = tswapl(registers[66]);
551 env->tbr = tswapl(registers[67]);
552 env->pc = tswapl(registers[68]);
553 env->npc = tswapl(registers[69]);
554 env->fsr = tswapl(registers[70]);
555 #else
556 for (i = 0; i < 64; i += 2) {
557 *((uint32_t *)&env->fpr[i]) = tswap32(registers[i/2 + 32] >> 32);
558 *((uint32_t *)&env->fpr[i + 1]) = tswap32(registers[i/2 + 32] & 0xffffffff);
560 env->pc = tswapl(registers[64]);
561 env->npc = tswapl(registers[65]);
562 env->tstate[env->tl] = tswapl(registers[66]);
563 env->fsr = tswapl(registers[67]);
564 env->fprs = tswapl(registers[68]);
565 env->y = tswapl(registers[69]);
566 #endif
568 #elif defined (TARGET_ARM)
569 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
571 int i;
572 uint8_t *ptr;
574 ptr = mem_buf;
575 /* 16 core integer registers (4 bytes each). */
576 for (i = 0; i < 16; i++)
578 *(uint32_t *)ptr = tswapl(env->regs[i]);
579 ptr += 4;
581 /* 8 FPA registers (12 bytes each), FPS (4 bytes).
582 Not yet implemented. */
583 memset (ptr, 0, 8 * 12 + 4);
584 ptr += 8 * 12 + 4;
585 /* CPSR (4 bytes). */
586 *(uint32_t *)ptr = tswapl (cpsr_read(env));
587 ptr += 4;
589 return ptr - mem_buf;
592 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
594 int i;
595 uint8_t *ptr;
597 ptr = mem_buf;
598 /* Core integer registers. */
599 for (i = 0; i < 16; i++)
601 env->regs[i] = tswapl(*(uint32_t *)ptr);
602 ptr += 4;
604 /* Ignore FPA regs and scr. */
605 ptr += 8 * 12 + 4;
606 cpsr_write (env, tswapl(*(uint32_t *)ptr), 0xffffffff);
608 #elif defined (TARGET_M68K)
609 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
611 int i;
612 uint8_t *ptr;
613 CPU_DoubleU u;
615 ptr = mem_buf;
616 /* D0-D7 */
617 for (i = 0; i < 8; i++) {
618 *(uint32_t *)ptr = tswapl(env->dregs[i]);
619 ptr += 4;
621 /* A0-A7 */
622 for (i = 0; i < 8; i++) {
623 *(uint32_t *)ptr = tswapl(env->aregs[i]);
624 ptr += 4;
626 *(uint32_t *)ptr = tswapl(env->sr);
627 ptr += 4;
628 *(uint32_t *)ptr = tswapl(env->pc);
629 ptr += 4;
630 /* F0-F7. The 68881/68040 have 12-bit extended precision registers.
631 ColdFire has 8-bit double precision registers. */
632 for (i = 0; i < 8; i++) {
633 u.d = env->fregs[i];
634 *(uint32_t *)ptr = tswap32(u.l.upper);
635 *(uint32_t *)ptr = tswap32(u.l.lower);
637 /* FP control regs (not implemented). */
638 memset (ptr, 0, 3 * 4);
639 ptr += 3 * 4;
641 return ptr - mem_buf;
644 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
646 int i;
647 uint8_t *ptr;
648 CPU_DoubleU u;
650 ptr = mem_buf;
651 /* D0-D7 */
652 for (i = 0; i < 8; i++) {
653 env->dregs[i] = tswapl(*(uint32_t *)ptr);
654 ptr += 4;
656 /* A0-A7 */
657 for (i = 0; i < 8; i++) {
658 env->aregs[i] = tswapl(*(uint32_t *)ptr);
659 ptr += 4;
661 env->sr = tswapl(*(uint32_t *)ptr);
662 ptr += 4;
663 env->pc = tswapl(*(uint32_t *)ptr);
664 ptr += 4;
665 /* F0-F7. The 68881/68040 have 12-bit extended precision registers.
666 ColdFire has 8-bit double precision registers. */
667 for (i = 0; i < 8; i++) {
668 u.l.upper = tswap32(*(uint32_t *)ptr);
669 u.l.lower = tswap32(*(uint32_t *)ptr);
670 env->fregs[i] = u.d;
672 /* FP control regs (not implemented). */
673 ptr += 3 * 4;
675 #elif defined (TARGET_MIPS)
676 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
678 int i;
679 uint8_t *ptr;
681 ptr = mem_buf;
682 for (i = 0; i < 32; i++)
684 *(uint32_t *)ptr = tswapl(env->gpr[i]);
685 ptr += 4;
688 *(uint32_t *)ptr = tswapl(env->CP0_Status);
689 ptr += 4;
691 *(uint32_t *)ptr = tswapl(env->LO);
692 ptr += 4;
694 *(uint32_t *)ptr = tswapl(env->HI);
695 ptr += 4;
697 *(uint32_t *)ptr = tswapl(env->CP0_BadVAddr);
698 ptr += 4;
700 *(uint32_t *)ptr = tswapl(env->CP0_Cause);
701 ptr += 4;
703 *(uint32_t *)ptr = tswapl(env->PC);
704 ptr += 4;
706 #ifdef MIPS_USES_FPU
707 for (i = 0; i < 32; i++)
709 *(uint32_t *)ptr = tswapl(FPR_W (env, i));
710 ptr += 4;
713 *(uint32_t *)ptr = tswapl(env->fcr31);
714 ptr += 4;
716 *(uint32_t *)ptr = tswapl(env->fcr0);
717 ptr += 4;
718 #endif
720 /* 32 FP registers, fsr, fir, fp. Not yet implemented. */
721 /* what's 'fp' mean here? */
723 return ptr - mem_buf;
726 /* convert MIPS rounding mode in FCR31 to IEEE library */
727 static unsigned int ieee_rm[] =
729 float_round_nearest_even,
730 float_round_to_zero,
731 float_round_up,
732 float_round_down
734 #define RESTORE_ROUNDING_MODE \
735 set_float_rounding_mode(ieee_rm[env->fcr31 & 3], &env->fp_status)
737 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
739 int i;
740 uint8_t *ptr;
742 ptr = mem_buf;
743 for (i = 0; i < 32; i++)
745 env->gpr[i] = tswapl(*(uint32_t *)ptr);
746 ptr += 4;
749 env->CP0_Status = tswapl(*(uint32_t *)ptr);
750 ptr += 4;
752 env->LO = tswapl(*(uint32_t *)ptr);
753 ptr += 4;
755 env->HI = tswapl(*(uint32_t *)ptr);
756 ptr += 4;
758 env->CP0_BadVAddr = tswapl(*(uint32_t *)ptr);
759 ptr += 4;
761 env->CP0_Cause = tswapl(*(uint32_t *)ptr);
762 ptr += 4;
764 env->PC = tswapl(*(uint32_t *)ptr);
765 ptr += 4;
767 #ifdef MIPS_USES_FPU
768 for (i = 0; i < 32; i++)
770 FPR_W (env, i) = tswapl(*(uint32_t *)ptr);
771 ptr += 4;
774 env->fcr31 = tswapl(*(uint32_t *)ptr) & 0x0183FFFF;
775 ptr += 4;
777 env->fcr0 = tswapl(*(uint32_t *)ptr);
778 ptr += 4;
780 /* set rounding mode */
781 RESTORE_ROUNDING_MODE;
783 #ifndef CONFIG_SOFTFLOAT
784 /* no floating point exception for native float */
785 SET_FP_ENABLE(env->fcr31, 0);
786 #endif
787 #endif
789 #elif defined (TARGET_SH4)
790 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
792 uint32_t *ptr = (uint32_t *)mem_buf;
793 int i;
795 #define SAVE(x) *ptr++=tswapl(x)
796 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
797 for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
798 } else {
799 for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
801 for (i = 8; i < 16; i++) SAVE(env->gregs[i]);
802 SAVE (env->pc);
803 SAVE (env->pr);
804 SAVE (env->gbr);
805 SAVE (env->vbr);
806 SAVE (env->mach);
807 SAVE (env->macl);
808 SAVE (env->sr);
809 SAVE (0); /* TICKS */
810 SAVE (0); /* STALLS */
811 SAVE (0); /* CYCLES */
812 SAVE (0); /* INSTS */
813 SAVE (0); /* PLR */
815 return ((uint8_t *)ptr - mem_buf);
818 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
820 uint32_t *ptr = (uint32_t *)mem_buf;
821 int i;
823 #define LOAD(x) (x)=*ptr++;
824 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
825 for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
826 } else {
827 for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
829 for (i = 8; i < 16; i++) LOAD(env->gregs[i]);
830 LOAD (env->pc);
831 LOAD (env->pr);
832 LOAD (env->gbr);
833 LOAD (env->vbr);
834 LOAD (env->mach);
835 LOAD (env->macl);
836 LOAD (env->sr);
838 #else
839 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
841 return 0;
844 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
848 #endif
850 static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf)
852 const char *p;
853 int ch, reg_size, type;
854 char buf[4096];
855 uint8_t mem_buf[2000];
856 uint32_t *registers;
857 target_ulong addr, len;
859 #ifdef DEBUG_GDB
860 printf("command='%s'\n", line_buf);
861 #endif
862 p = line_buf;
863 ch = *p++;
864 switch(ch) {
865 case '?':
866 /* TODO: Make this return the correct value for user-mode. */
867 snprintf(buf, sizeof(buf), "S%02x", SIGTRAP);
868 put_packet(s, buf);
869 break;
870 case 'c':
871 if (*p != '\0') {
872 addr = strtoull(p, (char **)&p, 16);
873 #if defined(TARGET_I386)
874 env->eip = addr;
875 #ifdef USE_KVM
876 kvm_load_registers(env);
877 #endif
878 #elif defined (TARGET_PPC)
879 env->nip = addr;
880 #elif defined (TARGET_SPARC)
881 env->pc = addr;
882 env->npc = addr + 4;
883 #elif defined (TARGET_ARM)
884 env->regs[15] = addr;
885 #elif defined (TARGET_SH4)
886 env->pc = addr;
887 #endif
889 #ifdef CONFIG_USER_ONLY
890 s->running_state = 1;
891 #else
892 vm_start();
893 #endif
894 return RS_IDLE;
895 case 's':
896 if (*p != '\0') {
897 addr = strtoul(p, (char **)&p, 16);
898 #if defined(TARGET_I386)
899 env->eip = addr;
900 #ifdef USE_KVM
901 kvm_load_registers(env);
902 #endif
903 #elif defined (TARGET_PPC)
904 env->nip = addr;
905 #elif defined (TARGET_SPARC)
906 env->pc = addr;
907 env->npc = addr + 4;
908 #elif defined (TARGET_ARM)
909 env->regs[15] = addr;
910 #elif defined (TARGET_SH4)
911 env->pc = addr;
912 #endif
914 cpu_single_step(env, 1);
915 #ifdef CONFIG_USER_ONLY
916 s->running_state = 1;
917 #else
918 vm_start();
919 #endif
920 return RS_IDLE;
921 case 'F':
923 target_ulong ret;
924 target_ulong err;
926 ret = strtoull(p, (char **)&p, 16);
927 if (*p == ',') {
928 p++;
929 err = strtoull(p, (char **)&p, 16);
930 } else {
931 err = 0;
933 if (*p == ',')
934 p++;
935 type = *p;
936 if (gdb_current_syscall_cb)
937 gdb_current_syscall_cb(s->env, ret, err);
938 if (type == 'C') {
939 put_packet(s, "T02");
940 } else {
941 #ifdef CONFIG_USER_ONLY
942 s->running_state = 1;
943 #else
944 vm_start();
945 #endif
948 break;
949 case 'g':
950 #ifdef USE_KVM
951 kvm_save_registers(env);
952 #endif
953 reg_size = cpu_gdb_read_registers(env, mem_buf);
954 memtohex(buf, mem_buf, reg_size);
955 put_packet(s, buf);
956 break;
957 case 'G':
958 registers = (void *)mem_buf;
959 len = strlen(p) / 2;
960 hextomem((uint8_t *)registers, p, len);
961 cpu_gdb_write_registers(env, mem_buf, len);
962 #ifdef USE_KVM
963 kvm_load_registers(env);
964 #endif
965 put_packet(s, "OK");
966 break;
967 case 'm':
968 addr = strtoull(p, (char **)&p, 16);
969 if (*p == ',')
970 p++;
971 len = strtoull(p, NULL, 16);
972 if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) {
973 put_packet (s, "E14");
974 } else {
975 memtohex(buf, mem_buf, len);
976 put_packet(s, buf);
978 break;
979 case 'M':
980 addr = strtoull(p, (char **)&p, 16);
981 if (*p == ',')
982 p++;
983 len = strtoull(p, (char **)&p, 16);
984 if (*p == ':')
985 p++;
986 hextomem(mem_buf, p, len);
987 if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0)
988 put_packet(s, "E14");
989 else
990 put_packet(s, "OK");
991 break;
992 case 'Z':
993 type = strtoul(p, (char **)&p, 16);
994 if (*p == ',')
995 p++;
996 addr = strtoull(p, (char **)&p, 16);
997 if (*p == ',')
998 p++;
999 len = strtoull(p, (char **)&p, 16);
1000 if (type == 0 || type == 1) {
1001 if (cpu_breakpoint_insert(env, addr) < 0)
1002 goto breakpoint_error;
1003 put_packet(s, "OK");
1004 } else {
1005 breakpoint_error:
1006 put_packet(s, "E22");
1008 break;
1009 case 'z':
1010 type = strtoul(p, (char **)&p, 16);
1011 if (*p == ',')
1012 p++;
1013 addr = strtoull(p, (char **)&p, 16);
1014 if (*p == ',')
1015 p++;
1016 len = strtoull(p, (char **)&p, 16);
1017 if (type == 0 || type == 1) {
1018 cpu_breakpoint_remove(env, addr);
1019 put_packet(s, "OK");
1020 } else {
1021 goto breakpoint_error;
1023 break;
1024 #ifdef CONFIG_LINUX_USER
1025 case 'q':
1026 if (strncmp(p, "Offsets", 7) == 0) {
1027 TaskState *ts = env->opaque;
1029 sprintf(buf, "Text=%x;Data=%x;Bss=%x", ts->info->code_offset,
1030 ts->info->data_offset, ts->info->data_offset);
1031 put_packet(s, buf);
1032 break;
1034 /* Fall through. */
1035 #endif
1036 default:
1037 // unknown_command:
1038 /* put empty packet */
1039 buf[0] = '\0';
1040 put_packet(s, buf);
1041 break;
1043 return RS_IDLE;
1046 extern void tb_flush(CPUState *env);
1048 #ifndef CONFIG_USER_ONLY
1049 static void gdb_vm_stopped(void *opaque, int reason)
1051 GDBState *s = opaque;
1052 char buf[256];
1053 int ret;
1055 if (s->state == RS_SYSCALL)
1056 return;
1058 /* disable single step if it was enable */
1059 cpu_single_step(s->env, 0);
1061 if (reason == EXCP_DEBUG) {
1062 tb_flush(s->env);
1063 ret = SIGTRAP;
1064 } else if (reason == EXCP_INTERRUPT) {
1065 ret = SIGINT;
1066 } else {
1067 ret = 0;
1069 snprintf(buf, sizeof(buf), "S%02x", ret);
1070 put_packet(s, buf);
1072 #endif
1074 /* Send a gdb syscall request.
1075 This accepts limited printf-style format specifiers, specifically:
1076 %x - target_ulong argument printed in hex.
1077 %s - string pointer (target_ulong) and length (int) pair. */
1078 void gdb_do_syscall(gdb_syscall_complete_cb cb, char *fmt, ...)
1080 va_list va;
1081 char buf[256];
1082 char *p;
1083 target_ulong addr;
1084 GDBState *s;
1086 s = gdb_syscall_state;
1087 if (!s)
1088 return;
1089 gdb_current_syscall_cb = cb;
1090 s->state = RS_SYSCALL;
1091 #ifndef CONFIG_USER_ONLY
1092 vm_stop(EXCP_DEBUG);
1093 #endif
1094 s->state = RS_IDLE;
1095 va_start(va, fmt);
1096 p = buf;
1097 *(p++) = 'F';
1098 while (*fmt) {
1099 if (*fmt == '%') {
1100 fmt++;
1101 switch (*fmt++) {
1102 case 'x':
1103 addr = va_arg(va, target_ulong);
1104 p += sprintf(p, TARGET_FMT_lx, addr);
1105 break;
1106 case 's':
1107 addr = va_arg(va, target_ulong);
1108 p += sprintf(p, TARGET_FMT_lx "/%x", addr, va_arg(va, int));
1109 break;
1110 default:
1111 fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
1112 fmt - 1);
1113 break;
1115 } else {
1116 *(p++) = *(fmt++);
1119 va_end(va);
1120 put_packet(s, buf);
1121 #ifdef CONFIG_USER_ONLY
1122 gdb_handlesig(s->env, 0);
1123 #else
1124 cpu_interrupt(s->env, CPU_INTERRUPT_EXIT);
1125 #endif
1128 static void gdb_read_byte(GDBState *s, int ch)
1130 CPUState *env = s->env;
1131 int i, csum;
1132 char reply[1];
1134 #ifndef CONFIG_USER_ONLY
1135 if (s->last_packet_len) {
1136 /* Waiting for a response to the last packet. If we see the start
1137 of a new command then abandon the previous response. */
1138 if (ch == '-') {
1139 #ifdef DEBUG_GDB
1140 printf("Got NACK, retransmitting\n");
1141 #endif
1142 put_buffer(s, s->last_packet, s->last_packet_len);
1144 #ifdef DEBUG_GDB
1145 else if (ch == '+')
1146 printf("Got ACK\n");
1147 else
1148 printf("Got '%c' when expecting ACK/NACK\n", ch);
1149 #endif
1150 if (ch == '+' || ch == '$')
1151 s->last_packet_len = 0;
1152 if (ch != '$')
1153 return;
1155 if (vm_running) {
1156 /* when the CPU is running, we cannot do anything except stop
1157 it when receiving a char */
1158 vm_stop(EXCP_INTERRUPT);
1159 } else
1160 #endif
1162 switch(s->state) {
1163 case RS_IDLE:
1164 if (ch == '$') {
1165 s->line_buf_index = 0;
1166 s->state = RS_GETLINE;
1168 break;
1169 case RS_GETLINE:
1170 if (ch == '#') {
1171 s->state = RS_CHKSUM1;
1172 } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
1173 s->state = RS_IDLE;
1174 } else {
1175 s->line_buf[s->line_buf_index++] = ch;
1177 break;
1178 case RS_CHKSUM1:
1179 s->line_buf[s->line_buf_index] = '\0';
1180 s->line_csum = fromhex(ch) << 4;
1181 s->state = RS_CHKSUM2;
1182 break;
1183 case RS_CHKSUM2:
1184 s->line_csum |= fromhex(ch);
1185 csum = 0;
1186 for(i = 0; i < s->line_buf_index; i++) {
1187 csum += s->line_buf[i];
1189 if (s->line_csum != (csum & 0xff)) {
1190 reply[0] = '-';
1191 put_buffer(s, reply, 1);
1192 s->state = RS_IDLE;
1193 } else {
1194 reply[0] = '+';
1195 put_buffer(s, reply, 1);
1196 s->state = gdb_handle_packet(s, env, s->line_buf);
1198 break;
1199 default:
1200 abort();
1205 #ifdef CONFIG_USER_ONLY
1207 gdb_handlesig (CPUState *env, int sig)
1209 GDBState *s;
1210 char buf[256];
1211 int n;
1213 if (gdbserver_fd < 0)
1214 return sig;
1216 s = &gdbserver_state;
1218 /* disable single step if it was enabled */
1219 cpu_single_step(env, 0);
1220 tb_flush(env);
1222 if (sig != 0)
1224 snprintf(buf, sizeof(buf), "S%02x", sig);
1225 put_packet(s, buf);
1228 sig = 0;
1229 s->state = RS_IDLE;
1230 s->running_state = 0;
1231 while (s->running_state == 0) {
1232 n = read (s->fd, buf, 256);
1233 if (n > 0)
1235 int i;
1237 for (i = 0; i < n; i++)
1238 gdb_read_byte (s, buf[i]);
1240 else if (n == 0 || errno != EAGAIN)
1242 /* XXX: Connection closed. Should probably wait for annother
1243 connection before continuing. */
1244 return sig;
1247 return sig;
1250 /* Tell the remote gdb that the process has exited. */
1251 void gdb_exit(CPUState *env, int code)
1253 GDBState *s;
1254 char buf[4];
1256 if (gdbserver_fd < 0)
1257 return;
1259 s = &gdbserver_state;
1261 snprintf(buf, sizeof(buf), "W%02x", code);
1262 put_packet(s, buf);
1266 static void gdb_accept(void *opaque)
1268 GDBState *s;
1269 struct sockaddr_in sockaddr;
1270 socklen_t len;
1271 int val, fd;
1273 for(;;) {
1274 len = sizeof(sockaddr);
1275 fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
1276 if (fd < 0 && errno != EINTR) {
1277 perror("accept");
1278 return;
1279 } else if (fd >= 0) {
1280 break;
1284 /* set short latency */
1285 val = 1;
1286 setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val));
1288 s = &gdbserver_state;
1289 memset (s, 0, sizeof (GDBState));
1290 s->env = first_cpu; /* XXX: allow to change CPU */
1291 s->fd = fd;
1293 gdb_syscall_state = s;
1295 fcntl(fd, F_SETFL, O_NONBLOCK);
1298 static int gdbserver_open(int port)
1300 struct sockaddr_in sockaddr;
1301 int fd, val, ret;
1303 fd = socket(PF_INET, SOCK_STREAM, 0);
1304 if (fd < 0) {
1305 perror("socket");
1306 return -1;
1309 /* allow fast reuse */
1310 val = 1;
1311 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val));
1313 sockaddr.sin_family = AF_INET;
1314 sockaddr.sin_port = htons(port);
1315 sockaddr.sin_addr.s_addr = 0;
1316 ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
1317 if (ret < 0) {
1318 perror("bind");
1319 return -1;
1321 ret = listen(fd, 0);
1322 if (ret < 0) {
1323 perror("listen");
1324 return -1;
1326 return fd;
1329 int gdbserver_start(int port)
1331 gdbserver_fd = gdbserver_open(port);
1332 if (gdbserver_fd < 0)
1333 return -1;
1334 /* accept connections */
1335 gdb_accept (NULL);
1336 return 0;
1338 #else
1339 static int gdb_chr_can_recieve(void *opaque)
1341 return 1;
1344 static void gdb_chr_recieve(void *opaque, const uint8_t *buf, int size)
1346 GDBState *s = opaque;
1347 int i;
1349 for (i = 0; i < size; i++) {
1350 gdb_read_byte(s, buf[i]);
1354 static void gdb_chr_event(void *opaque, int event)
1356 switch (event) {
1357 case CHR_EVENT_RESET:
1358 vm_stop(EXCP_INTERRUPT);
1359 gdb_syscall_state = opaque;
1360 break;
1361 default:
1362 break;
1366 int gdbserver_start(CharDriverState *chr)
1368 GDBState *s;
1370 if (!chr)
1371 return -1;
1373 s = qemu_mallocz(sizeof(GDBState));
1374 if (!s) {
1375 return -1;
1377 s->env = first_cpu; /* XXX: allow to change CPU */
1378 s->chr = chr;
1379 qemu_chr_add_handlers(chr, gdb_chr_can_recieve, gdb_chr_recieve,
1380 gdb_chr_event, s);
1381 qemu_add_vm_stop_handler(gdb_vm_stopped, s);
1382 return 0;
1385 int gdbserver_start_port(int port)
1387 CharDriverState *chr;
1388 char gdbstub_port_name[128];
1390 snprintf(gdbstub_port_name, sizeof(gdbstub_port_name),
1391 "tcp::%d,nowait,nodelay,server", port);
1392 chr = qemu_chr_open(gdbstub_port_name);
1393 if (!chr)
1394 return -EIO;
1395 return gdbserver_start(chr);
1398 #endif