?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
kvm: libkvm: track more memory slot fields
[qemu-kvm/fedora.git] / linux-user / main.c
blobaf99d0455af0dd62db7c3f43e03a8c7bca49f26a
1 /*
2 * qemu user main
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20 #include <stdlib.h>
21 #include <stdio.h>
22 #include <stdarg.h>
23 #include <string.h>
24 #include <errno.h>
25 #include <unistd.h>
26
27 #include "qemu.h"
28
29 #define DEBUG_LOGFILE "/tmp/qemu.log"
30
31 #ifdef __APPLE__
32 #include <crt_externs.h>
33 # define environ (*_NSGetEnviron())
34 #endif
35
36 static const char *interp_prefix = CONFIG_QEMU_PREFIX;
37 const char *qemu_uname_release = CONFIG_UNAME_RELEASE;
38
39 #if defined(__i386__) && !defined(CONFIG_STATIC)
40 /* Force usage of an ELF interpreter even if it is an ELF shared
41 object ! */
42 const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2";
43 #endif
44
45 /* for recent libc, we add these dummy symbols which are not declared
46 when generating a linked object (bug in ld ?) */
47 #if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(CONFIG_STATIC)
48 long __preinit_array_start[0];
49 long __preinit_array_end[0];
50 long __init_array_start[0];
51 long __init_array_end[0];
52 long __fini_array_start[0];
53 long __fini_array_end[0];
54 #endif
55
56 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
57 we allocate a bigger stack. Need a better solution, for example
58 by remapping the process stack directly at the right place */
59 unsigned long x86_stack_size = 512 * 1024;
60
61 void gemu_log(const char *fmt, ...)
62 {
63 va_list ap;
64
65 va_start(ap, fmt);
66 vfprintf(stderr, fmt, ap);
67 va_end(ap);
68 }
69
70 void cpu_outb(CPUState *env, int addr, int val)
71 {
72 fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val);
73 }
74
75 void cpu_outw(CPUState *env, int addr, int val)
76 {
77 fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val);
78 }
79
80 void cpu_outl(CPUState *env, int addr, int val)
81 {
82 fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val);
83 }
84
85 int cpu_inb(CPUState *env, int addr)
86 {
87 fprintf(stderr, "inb: port=0x%04x\n", addr);
88 return 0;
89 }
90
91 int cpu_inw(CPUState *env, int addr)
92 {
93 fprintf(stderr, "inw: port=0x%04x\n", addr);
94 return 0;
95 }
96
97 int cpu_inl(CPUState *env, int addr)
98 {
99 fprintf(stderr, "inl: port=0x%04x\n", addr);
100 return 0;
101 }
102
103 int cpu_get_pic_interrupt(CPUState *env)
104 {
105 return -1;
106 }
107
108 /* timers for rdtsc */
109
110 #if 0
111
112 static uint64_t emu_time;
113
114 int64_t cpu_get_real_ticks(void)
115 {
116 return emu_time++;
117 }
118
119 #endif
120
121 #ifdef TARGET_I386
122 /***********************************************************/
123 /* CPUX86 core interface */
124
125 void cpu_smm_update(CPUState *env)
126 {
127 }
128
129 uint64_t cpu_get_tsc(CPUX86State *env)
130 {
131 return cpu_get_real_ticks();
132 }
133
134 static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
135 int flags)
136 {
137 unsigned int e1, e2;
138 uint32_t *p;
139 e1 = (addr << 16) | (limit & 0xffff);
140 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
141 e2 |= flags;
142 p = ptr;
143 p[0] = tswapl(e1);
144 p[1] = tswapl(e2);
145 }
146
147 static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
148 unsigned long addr, unsigned int sel)
149 {
150 unsigned int e1, e2;
151 uint32_t *p;
152 e1 = (addr & 0xffff) | (sel << 16);
153 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
154 p = ptr;
155 p[0] = tswapl(e1);
156 p[1] = tswapl(e2);
157 }
158
159 uint64_t gdt_table[6];
160 uint64_t idt_table[256];
161
162 /* only dpl matters as we do only user space emulation */
163 static void set_idt(int n, unsigned int dpl)
164 {
165 set_gate(idt_table + n, 0, dpl, 0, 0);
166 }
167
168 void cpu_loop(CPUX86State *env)
169 {
170 int trapnr;
171 target_ulong pc;
172 target_siginfo_t info;
173
174 for(;;) {
175 trapnr = cpu_x86_exec(env);
176 switch(trapnr) {
177 case 0x80:
178 /* linux syscall */
179 env->regs[R_EAX] = do_syscall(env,
180 env->regs[R_EAX],
181 env->regs[R_EBX],
182 env->regs[R_ECX],
183 env->regs[R_EDX],
184 env->regs[R_ESI],
185 env->regs[R_EDI],
186 env->regs[R_EBP]);
187 break;
188 case EXCP0B_NOSEG:
189 case EXCP0C_STACK:
190 info.si_signo = SIGBUS;
191 info.si_errno = 0;
192 info.si_code = TARGET_SI_KERNEL;
193 info._sifields._sigfault._addr = 0;
194 queue_signal(info.si_signo, &info);
195 break;
196 case EXCP0D_GPF:
197 #ifndef TARGET_X86_64
198 if (env->eflags & VM_MASK) {
199 handle_vm86_fault(env);
200 } else
201 #endif
202 {
203 info.si_signo = SIGSEGV;
204 info.si_errno = 0;
205 info.si_code = TARGET_SI_KERNEL;
206 info._sifields._sigfault._addr = 0;
207 queue_signal(info.si_signo, &info);
208 }
209 break;
210 case EXCP0E_PAGE:
211 info.si_signo = SIGSEGV;
212 info.si_errno = 0;
213 if (!(env->error_code & 1))
214 info.si_code = TARGET_SEGV_MAPERR;
215 else
216 info.si_code = TARGET_SEGV_ACCERR;
217 info._sifields._sigfault._addr = env->cr[2];
218 queue_signal(info.si_signo, &info);
219 break;
220 case EXCP00_DIVZ:
221 #ifndef TARGET_X86_64
222 if (env->eflags & VM_MASK) {
223 handle_vm86_trap(env, trapnr);
224 } else
225 #endif
226 {
227 /* division by zero */
228 info.si_signo = SIGFPE;
229 info.si_errno = 0;
230 info.si_code = TARGET_FPE_INTDIV;
231 info._sifields._sigfault._addr = env->eip;
232 queue_signal(info.si_signo, &info);
233 }
234 break;
235 case EXCP01_SSTP:
236 case EXCP03_INT3:
237 #ifndef TARGET_X86_64
238 if (env->eflags & VM_MASK) {
239 handle_vm86_trap(env, trapnr);
240 } else
241 #endif
242 {
243 info.si_signo = SIGTRAP;
244 info.si_errno = 0;
245 if (trapnr == EXCP01_SSTP) {
246 info.si_code = TARGET_TRAP_BRKPT;
247 info._sifields._sigfault._addr = env->eip;
248 } else {
249 info.si_code = TARGET_SI_KERNEL;
250 info._sifields._sigfault._addr = 0;
251 }
252 queue_signal(info.si_signo, &info);
253 }
254 break;
255 case EXCP04_INTO:
256 case EXCP05_BOUND:
257 #ifndef TARGET_X86_64
258 if (env->eflags & VM_MASK) {
259 handle_vm86_trap(env, trapnr);
260 } else
261 #endif
262 {
263 info.si_signo = SIGSEGV;
264 info.si_errno = 0;
265 info.si_code = TARGET_SI_KERNEL;
266 info._sifields._sigfault._addr = 0;
267 queue_signal(info.si_signo, &info);
268 }
269 break;
270 case EXCP06_ILLOP:
271 info.si_signo = SIGILL;
272 info.si_errno = 0;
273 info.si_code = TARGET_ILL_ILLOPN;
274 info._sifields._sigfault._addr = env->eip;
275 queue_signal(info.si_signo, &info);
276 break;
277 case EXCP_INTERRUPT:
278 /* just indicate that signals should be handled asap */
279 break;
280 case EXCP_DEBUG:
281 {
282 int sig;
283
284 sig = gdb_handlesig (env, TARGET_SIGTRAP);
285 if (sig)
286 {
287 info.si_signo = sig;
288 info.si_errno = 0;
289 info.si_code = TARGET_TRAP_BRKPT;
290 queue_signal(info.si_signo, &info);
291 }
292 }
293 break;
294 default:
295 pc = env->segs[R_CS].base + env->eip;
296 fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
297 (long)pc, trapnr);
298 abort();
299 }
300 process_pending_signals(env);
301 }
302 }
303 #endif
304
305 #ifdef TARGET_ARM
306
307 /* XXX: find a better solution */
308 extern void tb_invalidate_page_range(target_ulong start, target_ulong end);
309
310 static void arm_cache_flush(target_ulong start, target_ulong last)
311 {
312 target_ulong addr, last1;
313
314 if (last < start)
315 return;
316 addr = start;
317 for(;;) {
318 last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1;
319 if (last1 > last)
320 last1 = last;
321 tb_invalidate_page_range(addr, last1 + 1);
322 if (last1 == last)
323 break;
324 addr = last1 + 1;
325 }
326 }
327
328 void cpu_loop(CPUARMState *env)
329 {
330 int trapnr;
331 unsigned int n, insn;
332 target_siginfo_t info;
333 uint32_t addr;
334
335 for(;;) {
336 trapnr = cpu_arm_exec(env);
337 switch(trapnr) {
338 case EXCP_UDEF:
339 {
340 TaskState *ts = env->opaque;
341 uint32_t opcode;
342
343 /* we handle the FPU emulation here, as Linux */
344 /* we get the opcode */
345 opcode = tget32(env->regs[15]);
346
347 if (EmulateAll(opcode, &ts->fpa, env) == 0) {
348 info.si_signo = SIGILL;
349 info.si_errno = 0;
350 info.si_code = TARGET_ILL_ILLOPN;
351 info._sifields._sigfault._addr = env->regs[15];
352 queue_signal(info.si_signo, &info);
353 } else {
354 /* increment PC */
355 env->regs[15] += 4;
356 }
357 }
358 break;
359 case EXCP_SWI:
360 case EXCP_BKPT:
361 {
362 env->eabi = 1;
363 /* system call */
364 if (trapnr == EXCP_BKPT) {
365 if (env->thumb) {
366 insn = tget16(env->regs[15]);
367 n = insn & 0xff;
368 env->regs[15] += 2;
369 } else {
370 insn = tget32(env->regs[15]);
371 n = (insn & 0xf) | ((insn >> 4) & 0xff0);
372 env->regs[15] += 4;
373 }
374 } else {
375 if (env->thumb) {
376 insn = tget16(env->regs[15] - 2);
377 n = insn & 0xff;
378 } else {
379 insn = tget32(env->regs[15] - 4);
380 n = insn & 0xffffff;
381 }
382 }
383
384 if (n == ARM_NR_cacheflush) {
385 arm_cache_flush(env->regs[0], env->regs[1]);
386 } else if (n == ARM_NR_semihosting
387 || n == ARM_NR_thumb_semihosting) {
388 env->regs[0] = do_arm_semihosting (env);
389 } else if (n == 0 || n >= ARM_SYSCALL_BASE
390 || (env->thumb && n == ARM_THUMB_SYSCALL)) {
391 /* linux syscall */
392 if (env->thumb || n == 0) {
393 n = env->regs[7];
394 } else {
395 n -= ARM_SYSCALL_BASE;
396 env->eabi = 0;
397 }
398 env->regs[0] = do_syscall(env,
399 n,
400 env->regs[0],
401 env->regs[1],
402 env->regs[2],
403 env->regs[3],
404 env->regs[4],
405 env->regs[5]);
406 } else {
407 goto error;
408 }
409 }
410 break;
411 case EXCP_INTERRUPT:
412 /* just indicate that signals should be handled asap */
413 break;
414 case EXCP_PREFETCH_ABORT:
415 addr = env->cp15.c6_data;
416 goto do_segv;
417 case EXCP_DATA_ABORT:
418 addr = env->cp15.c6_insn;
419 goto do_segv;
420 do_segv:
421 {
422 info.si_signo = SIGSEGV;
423 info.si_errno = 0;
424 /* XXX: check env->error_code */
425 info.si_code = TARGET_SEGV_MAPERR;
426 info._sifields._sigfault._addr = addr;
427 queue_signal(info.si_signo, &info);
428 }
429 break;
430 case EXCP_DEBUG:
431 {
432 int sig;
433
434 sig = gdb_handlesig (env, TARGET_SIGTRAP);
435 if (sig)
436 {
437 info.si_signo = sig;
438 info.si_errno = 0;
439 info.si_code = TARGET_TRAP_BRKPT;
440 queue_signal(info.si_signo, &info);
441 }
442 }
443 break;
444 default:
445 error:
446 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
447 trapnr);
448 cpu_dump_state(env, stderr, fprintf, 0);
449 abort();
450 }
451 process_pending_signals(env);
452 }
453 }
454
455 #endif
456
457 #ifdef TARGET_SPARC
458
459 //#define DEBUG_WIN
460
461 /* WARNING: dealing with register windows _is_ complicated. More info
462 can be found at http://www.sics.se/~psm/sparcstack.html */
463 static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
464 {
465 index = (index + cwp * 16) & (16 * NWINDOWS - 1);
466 /* wrap handling : if cwp is on the last window, then we use the
467 registers 'after' the end */
468 if (index < 8 && env->cwp == (NWINDOWS - 1))
469 index += (16 * NWINDOWS);
470 return index;
471 }
472
473 /* save the register window 'cwp1' */
474 static inline void save_window_offset(CPUSPARCState *env, int cwp1)
475 {
476 unsigned int i;
477 target_ulong sp_ptr;
478
479 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
480 #if defined(DEBUG_WIN)
481 printf("win_overflow: sp_ptr=0x%x save_cwp=%d\n",
482 (int)sp_ptr, cwp1);
483 #endif
484 for(i = 0; i < 16; i++) {
485 tputl(sp_ptr, env->regbase[get_reg_index(env, cwp1, 8 + i)]);
486 sp_ptr += sizeof(target_ulong);
487 }
488 }
489
490 static void save_window(CPUSPARCState *env)
491 {
492 #ifndef TARGET_SPARC64
493 unsigned int new_wim;
494 new_wim = ((env->wim >> 1) | (env->wim << (NWINDOWS - 1))) &
495 ((1LL << NWINDOWS) - 1);
496 save_window_offset(env, (env->cwp - 2) & (NWINDOWS - 1));
497 env->wim = new_wim;
498 #else
499 save_window_offset(env, (env->cwp - 2) & (NWINDOWS - 1));
500 env->cansave++;
501 env->canrestore--;
502 #endif
503 }
504
505 static void restore_window(CPUSPARCState *env)
506 {
507 unsigned int new_wim, i, cwp1;
508 target_ulong sp_ptr;
509
510 new_wim = ((env->wim << 1) | (env->wim >> (NWINDOWS - 1))) &
511 ((1LL << NWINDOWS) - 1);
512
513 /* restore the invalid window */
514 cwp1 = (env->cwp + 1) & (NWINDOWS - 1);
515 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
516 #if defined(DEBUG_WIN)
517 printf("win_underflow: sp_ptr=0x%x load_cwp=%d\n",
518 (int)sp_ptr, cwp1);
519 #endif
520 for(i = 0; i < 16; i++) {
521 env->regbase[get_reg_index(env, cwp1, 8 + i)] = tgetl(sp_ptr);
522 sp_ptr += sizeof(target_ulong);
523 }
524 env->wim = new_wim;
525 #ifdef TARGET_SPARC64
526 env->canrestore++;
527 if (env->cleanwin < NWINDOWS - 1)
528 env->cleanwin++;
529 env->cansave--;
530 #endif
531 }
532
533 static void flush_windows(CPUSPARCState *env)
534 {
535 int offset, cwp1;
536
537 offset = 1;
538 for(;;) {
539 /* if restore would invoke restore_window(), then we can stop */
540 cwp1 = (env->cwp + offset) & (NWINDOWS - 1);
541 if (env->wim & (1 << cwp1))
542 break;
543 save_window_offset(env, cwp1);
544 offset++;
545 }
546 /* set wim so that restore will reload the registers */
547 cwp1 = (env->cwp + 1) & (NWINDOWS - 1);
548 env->wim = 1 << cwp1;
549 #if defined(DEBUG_WIN)
550 printf("flush_windows: nb=%d\n", offset - 1);
551 #endif
552 }
553
554 void cpu_loop (CPUSPARCState *env)
555 {
556 int trapnr, ret;
557 target_siginfo_t info;
558
559 while (1) {
560 trapnr = cpu_sparc_exec (env);
561
562 switch (trapnr) {
563 #ifndef TARGET_SPARC64
564 case 0x88:
565 case 0x90:
566 #else
567 case 0x16d:
568 #endif
569 ret = do_syscall (env, env->gregs[1],
570 env->regwptr[0], env->regwptr[1],
571 env->regwptr[2], env->regwptr[3],
572 env->regwptr[4], env->regwptr[5]);
573 if ((unsigned int)ret >= (unsigned int)(-515)) {
574 #ifdef TARGET_SPARC64
575 env->xcc |= PSR_CARRY;
576 #else
577 env->psr |= PSR_CARRY;
578 #endif
579 ret = -ret;
580 } else {
581 #ifdef TARGET_SPARC64
582 env->xcc &= ~PSR_CARRY;
583 #else
584 env->psr &= ~PSR_CARRY;
585 #endif
586 }
587 env->regwptr[0] = ret;
588 /* next instruction */
589 env->pc = env->npc;
590 env->npc = env->npc + 4;
591 break;
592 case 0x83: /* flush windows */
593 flush_windows(env);
594 /* next instruction */
595 env->pc = env->npc;
596 env->npc = env->npc + 4;
597 break;
598 #ifndef TARGET_SPARC64
599 case TT_WIN_OVF: /* window overflow */
600 save_window(env);
601 break;
602 case TT_WIN_UNF: /* window underflow */
603 restore_window(env);
604 break;
605 case TT_TFAULT:
606 case TT_DFAULT:
607 {
608 info.si_signo = SIGSEGV;
609 info.si_errno = 0;
610 /* XXX: check env->error_code */
611 info.si_code = TARGET_SEGV_MAPERR;
612 info._sifields._sigfault._addr = env->mmuregs[4];
613 queue_signal(info.si_signo, &info);
614 }
615 break;
616 #else
617 case TT_SPILL: /* window overflow */
618 save_window(env);
619 break;
620 case TT_FILL: /* window underflow */
621 restore_window(env);
622 break;
623 case TT_TFAULT:
624 case TT_DFAULT:
625 {
626 info.si_signo = SIGSEGV;
627 info.si_errno = 0;
628 /* XXX: check env->error_code */
629 info.si_code = TARGET_SEGV_MAPERR;
630 if (trapnr == TT_DFAULT)
631 info._sifields._sigfault._addr = env->dmmuregs[4];
632 else
633 info._sifields._sigfault._addr = env->tpc[env->tl];
634 queue_signal(info.si_signo, &info);
635 }
636 break;
637 #endif
638 case EXCP_INTERRUPT:
639 /* just indicate that signals should be handled asap */
640 break;
641 case EXCP_DEBUG:
642 {
643 int sig;
644
645 sig = gdb_handlesig (env, TARGET_SIGTRAP);
646 if (sig)
647 {
648 info.si_signo = sig;
649 info.si_errno = 0;
650 info.si_code = TARGET_TRAP_BRKPT;
651 queue_signal(info.si_signo, &info);
652 }
653 }
654 break;
655 default:
656 printf ("Unhandled trap: 0x%x\n", trapnr);
657 cpu_dump_state(env, stderr, fprintf, 0);
658 exit (1);
659 }
660 process_pending_signals (env);
661 }
662 }
663
664 #endif
665
666 #ifdef TARGET_PPC
667 static inline uint64_t cpu_ppc_get_tb (CPUState *env)
668 {
669 /* TO FIX */
670 return 0;
671 }
672
673 uint32_t cpu_ppc_load_tbl (CPUState *env)
674 {
675 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
676 }
677
678 uint32_t cpu_ppc_load_tbu (CPUState *env)
679 {
680 return cpu_ppc_get_tb(env) >> 32;
681 }
682
683 uint32_t cpu_ppc_load_atbl (CPUState *env)
684 {
685 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
686 }
687
688 uint32_t cpu_ppc_load_atbu (CPUState *env)
689 {
690 return cpu_ppc_get_tb(env) >> 32;
691 }
692
693 uint32_t cpu_ppc601_load_rtcu (CPUState *env)
694 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
695
696 uint32_t cpu_ppc601_load_rtcl (CPUState *env)
697 {
698 return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
699 }
700
701 /* XXX: to be fixed */
702 int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp)
703 {
704 return -1;
705 }
706
707 int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val)
708 {
709 return -1;
710 }
711
712 #define EXCP_DUMP(env, fmt, args...) \
713 do { \
714 fprintf(stderr, fmt , ##args); \
715 cpu_dump_state(env, stderr, fprintf, 0); \
716 if (loglevel != 0) { \
717 fprintf(logfile, fmt , ##args); \
718 cpu_dump_state(env, logfile, fprintf, 0); \
719 } \
720 } while (0)
721
722 void cpu_loop(CPUPPCState *env)
723 {
724 target_siginfo_t info;
725 int trapnr;
726 uint32_t ret;
727
728 for(;;) {
729 trapnr = cpu_ppc_exec(env);
730 switch(trapnr) {
731 case POWERPC_EXCP_NONE:
732 /* Just go on */
733 break;
734 case POWERPC_EXCP_CRITICAL: /* Critical input */
735 cpu_abort(env, "Critical interrupt while in user mode. "
736 "Aborting\n");
737 break;
738 case POWERPC_EXCP_MCHECK: /* Machine check exception */
739 cpu_abort(env, "Machine check exception while in user mode. "
740 "Aborting\n");
741 break;
742 case POWERPC_EXCP_DSI: /* Data storage exception */
743 EXCP_DUMP(env, "Invalid data memory access: 0x" ADDRX "\n",
744 env->spr[SPR_DAR]);
745 /* XXX: check this. Seems bugged */
746 switch (env->error_code & 0xFF000000) {
747 case 0x40000000:
748 info.si_signo = TARGET_SIGSEGV;
749 info.si_errno = 0;
750 info.si_code = TARGET_SEGV_MAPERR;
751 break;
752 case 0x04000000:
753 info.si_signo = TARGET_SIGILL;
754 info.si_errno = 0;
755 info.si_code = TARGET_ILL_ILLADR;
756 break;
757 case 0x08000000:
758 info.si_signo = TARGET_SIGSEGV;
759 info.si_errno = 0;
760 info.si_code = TARGET_SEGV_ACCERR;
761 break;
762 default:
763 /* Let's send a regular segfault... */
764 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
765 env->error_code);
766 info.si_signo = TARGET_SIGSEGV;
767 info.si_errno = 0;
768 info.si_code = TARGET_SEGV_MAPERR;
769 break;
770 }
771 info._sifields._sigfault._addr = env->nip;
772 queue_signal(info.si_signo, &info);
773 break;
774 case POWERPC_EXCP_ISI: /* Instruction storage exception */
775 EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" ADDRX "\n",
776 env->spr[SPR_DAR]);
777 /* XXX: check this */
778 switch (env->error_code & 0xFF000000) {
779 case 0x40000000:
780 info.si_signo = TARGET_SIGSEGV;
781 info.si_errno = 0;
782 info.si_code = TARGET_SEGV_MAPERR;
783 break;
784 case 0x10000000:
785 case 0x08000000:
786 info.si_signo = TARGET_SIGSEGV;
787 info.si_errno = 0;
788 info.si_code = TARGET_SEGV_ACCERR;
789 break;
790 default:
791 /* Let's send a regular segfault... */
792 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
793 env->error_code);
794 info.si_signo = TARGET_SIGSEGV;
795 info.si_errno = 0;
796 info.si_code = TARGET_SEGV_MAPERR;
797 break;
798 }
799 info._sifields._sigfault._addr = env->nip - 4;
800 queue_signal(info.si_signo, &info);
801 break;
802 case POWERPC_EXCP_EXTERNAL: /* External input */
803 cpu_abort(env, "External interrupt while in user mode. "
804 "Aborting\n");
805 break;
806 case POWERPC_EXCP_ALIGN: /* Alignment exception */
807 EXCP_DUMP(env, "Unaligned memory access\n");
808 /* XXX: check this */
809 info.si_signo = TARGET_SIGBUS;
810 info.si_errno = 0;
811 info.si_code = TARGET_BUS_ADRALN;
812 info._sifields._sigfault._addr = env->nip - 4;
813 queue_signal(info.si_signo, &info);
814 break;
815 case POWERPC_EXCP_PROGRAM: /* Program exception */
816 /* XXX: check this */
817 switch (env->error_code & ~0xF) {
818 case POWERPC_EXCP_FP:
819 EXCP_DUMP(env, "Floating point program exception\n");
820 /* Set FX */
821 env->fpscr[7] |= 0x8;
822 /* Finally, update FEX */
823 if ((((env->fpscr[7] & 0x3) << 3) | (env->fpscr[6] >> 1)) &
824 ((env->fpscr[1] << 1) | (env->fpscr[0] >> 3)))
825 env->fpscr[7] |= 0x4;
826 info.si_signo = TARGET_SIGFPE;
827 info.si_errno = 0;
828 switch (env->error_code & 0xF) {
829 case POWERPC_EXCP_FP_OX:
830 info.si_code = TARGET_FPE_FLTOVF;
831 break;
832 case POWERPC_EXCP_FP_UX:
833 info.si_code = TARGET_FPE_FLTUND;
834 break;
835 case POWERPC_EXCP_FP_ZX:
836 case POWERPC_EXCP_FP_VXZDZ:
837 info.si_code = TARGET_FPE_FLTDIV;
838 break;
839 case POWERPC_EXCP_FP_XX:
840 info.si_code = TARGET_FPE_FLTRES;
841 break;
842 case POWERPC_EXCP_FP_VXSOFT:
843 info.si_code = TARGET_FPE_FLTINV;
844 break;
845 case POWERPC_EXCP_FP_VXNAN:
846 case POWERPC_EXCP_FP_VXISI:
847 case POWERPC_EXCP_FP_VXIDI:
848 case POWERPC_EXCP_FP_VXIMZ:
849 case POWERPC_EXCP_FP_VXVC:
850 case POWERPC_EXCP_FP_VXSQRT:
851 case POWERPC_EXCP_FP_VXCVI:
852 info.si_code = TARGET_FPE_FLTSUB;
853 break;
854 default:
855 EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
856 env->error_code);
857 break;
858 }
859 break;
860 case POWERPC_EXCP_INVAL:
861 EXCP_DUMP(env, "Invalid instruction\n");
862 info.si_signo = TARGET_SIGILL;
863 info.si_errno = 0;
864 switch (env->error_code & 0xF) {
865 case POWERPC_EXCP_INVAL_INVAL:
866 info.si_code = TARGET_ILL_ILLOPC;
867 break;
868 case POWERPC_EXCP_INVAL_LSWX:
869 info.si_code = TARGET_ILL_ILLOPN;
870 break;
871 case POWERPC_EXCP_INVAL_SPR:
872 info.si_code = TARGET_ILL_PRVREG;
873 break;
874 case POWERPC_EXCP_INVAL_FP:
875 info.si_code = TARGET_ILL_COPROC;
876 break;
877 default:
878 EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
879 env->error_code & 0xF);
880 info.si_code = TARGET_ILL_ILLADR;
881 break;
882 }
883 break;
884 case POWERPC_EXCP_PRIV:
885 EXCP_DUMP(env, "Privilege violation\n");
886 info.si_signo = TARGET_SIGILL;
887 info.si_errno = 0;
888 switch (env->error_code & 0xF) {
889 case POWERPC_EXCP_PRIV_OPC:
890 info.si_code = TARGET_ILL_PRVOPC;
891 break;
892 case POWERPC_EXCP_PRIV_REG:
893 info.si_code = TARGET_ILL_PRVREG;
894 break;
895 default:
896 EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
897 env->error_code & 0xF);
898 info.si_code = TARGET_ILL_PRVOPC;
899 break;
900 }
901 break;
902 case POWERPC_EXCP_TRAP:
903 cpu_abort(env, "Tried to call a TRAP\n");
904 break;
905 default:
906 /* Should not happen ! */
907 cpu_abort(env, "Unknown program exception (%02x)\n",
908 env->error_code);
909 break;
910 }
911 info._sifields._sigfault._addr = env->nip - 4;
912 queue_signal(info.si_signo, &info);
913 break;
914 case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
915 EXCP_DUMP(env, "No floating point allowed\n");
916 info.si_signo = TARGET_SIGILL;
917 info.si_errno = 0;
918 info.si_code = TARGET_ILL_COPROC;
919 info._sifields._sigfault._addr = env->nip - 4;
920 queue_signal(info.si_signo, &info);
921 break;
922 case POWERPC_EXCP_SYSCALL: /* System call exception */
923 cpu_abort(env, "Syscall exception while in user mode. "
924 "Aborting\n");
925 break;
926 case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
927 EXCP_DUMP(env, "No APU instruction allowed\n");
928 info.si_signo = TARGET_SIGILL;
929 info.si_errno = 0;
930 info.si_code = TARGET_ILL_COPROC;
931 info._sifields._sigfault._addr = env->nip - 4;
932 queue_signal(info.si_signo, &info);
933 break;
934 case POWERPC_EXCP_DECR: /* Decrementer exception */
935 cpu_abort(env, "Decrementer interrupt while in user mode. "
936 "Aborting\n");
937 break;
938 case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
939 cpu_abort(env, "Fix interval timer interrupt while in user mode. "
940 "Aborting\n");
941 break;
942 case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */
943 cpu_abort(env, "Watchdog timer interrupt while in user mode. "
944 "Aborting\n");
945 break;
946 case POWERPC_EXCP_DTLB: /* Data TLB error */
947 cpu_abort(env, "Data TLB exception while in user mode. "
948 "Aborting\n");
949 break;
950 case POWERPC_EXCP_ITLB: /* Instruction TLB error */
951 cpu_abort(env, "Instruction TLB exception while in user mode. "
952 "Aborting\n");
953 break;
954 case POWERPC_EXCP_DEBUG: /* Debug interrupt */
955 /* XXX: check this */
956 {
957 int sig;
958
959 sig = gdb_handlesig(env, TARGET_SIGTRAP);
960 if (sig) {
961 info.si_signo = sig;
962 info.si_errno = 0;
963 info.si_code = TARGET_TRAP_BRKPT;
964 queue_signal(info.si_signo, &info);
965 }
966 }
967 break;
968 #if defined(TARGET_PPCEMB)
969 case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */
970 EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n");
971 info.si_signo = TARGET_SIGILL;
972 info.si_errno = 0;
973 info.si_code = TARGET_ILL_COPROC;
974 info._sifields._sigfault._addr = env->nip - 4;
975 queue_signal(info.si_signo, &info);
976 break;
977 case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */
978 cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
979 break;
980 case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */
981 cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
982 break;
983 case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */
984 cpu_abort(env, "Performance monitor exception not handled\n");
985 break;
986 case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */
987 cpu_abort(env, "Doorbell interrupt while in user mode. "
988 "Aborting\n");
989 break;
990 case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */
991 cpu_abort(env, "Doorbell critical interrupt while in user mode. "
992 "Aborting\n");
993 break;
994 case POWERPC_EXCP_RESET: /* System reset exception */
995 cpu_abort(env, "Reset interrupt while in user mode. "
996 "Aborting\n");
997 break;
998 #endif /* defined(TARGET_PPCEMB) */
999 #if defined(TARGET_PPC64) /* PowerPC 64 */
1000 case POWERPC_EXCP_DSEG: /* Data segment exception */
1001 cpu_abort(env, "Data segment exception while in user mode. "
1002 "Aborting\n");
1003 break;
1004 case POWERPC_EXCP_ISEG: /* Instruction segment exception */
1005 cpu_abort(env, "Instruction segment exception "
1006 "while in user mode. Aborting\n");
1007 break;
1008 #endif /* defined(TARGET_PPC64) */
1009 #if defined(TARGET_PPC64H) /* PowerPC 64 with hypervisor mode support */
1010 case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */
1011 cpu_abort(env, "Hypervisor decrementer interrupt "
1012 "while in user mode. Aborting\n");
1013 break;
1014 #endif /* defined(TARGET_PPC64H) */
1015 case POWERPC_EXCP_TRACE: /* Trace exception */
1016 /* Nothing to do:
1017 * we use this exception to emulate step-by-step execution mode.
1018 */
1019 break;
1020 #if defined(TARGET_PPC64H) /* PowerPC 64 with hypervisor mode support */
1021 case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */
1022 cpu_abort(env, "Hypervisor data storage exception "
1023 "while in user mode. Aborting\n");
1024 break;
1025 case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */
1026 cpu_abort(env, "Hypervisor instruction storage exception "
1027 "while in user mode. Aborting\n");
1028 break;
1029 case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */
1030 cpu_abort(env, "Hypervisor data segment exception "
1031 "while in user mode. Aborting\n");
1032 break;
1033 case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */
1034 cpu_abort(env, "Hypervisor instruction segment exception "
1035 "while in user mode. Aborting\n");
1036 break;
1037 #endif /* defined(TARGET_PPC64H) */
1038 case POWERPC_EXCP_VPU: /* Vector unavailable exception */
1039 EXCP_DUMP(env, "No Altivec instructions allowed\n");
1040 info.si_signo = TARGET_SIGILL;
1041 info.si_errno = 0;
1042 info.si_code = TARGET_ILL_COPROC;
1043 info._sifields._sigfault._addr = env->nip - 4;
1044 queue_signal(info.si_signo, &info);
1045 break;
1046 case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */
1047 cpu_abort(env, "Programable interval timer interrupt "
1048 "while in user mode. Aborting\n");
1049 break;
1050 case POWERPC_EXCP_IO: /* IO error exception */
1051 cpu_abort(env, "IO error exception while in user mode. "
1052 "Aborting\n");
1053 break;
1054 case POWERPC_EXCP_RUNM: /* Run mode exception */
1055 cpu_abort(env, "Run mode exception while in user mode. "
1056 "Aborting\n");
1057 break;
1058 case POWERPC_EXCP_EMUL: /* Emulation trap exception */
1059 cpu_abort(env, "Emulation trap exception not handled\n");
1060 break;
1061 case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */
1062 cpu_abort(env, "Instruction fetch TLB exception "
1063 "while in user-mode. Aborting");
1064 break;
1065 case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
1066 cpu_abort(env, "Data load TLB exception while in user-mode. "
1067 "Aborting");
1068 break;
1069 case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
1070 cpu_abort(env, "Data store TLB exception while in user-mode. "
1071 "Aborting");
1072 break;
1073 case POWERPC_EXCP_FPA: /* Floating-point assist exception */
1074 cpu_abort(env, "Floating-point assist exception not handled\n");
1075 break;
1076 case POWERPC_EXCP_IABR: /* Instruction address breakpoint */
1077 cpu_abort(env, "Instruction address breakpoint exception "
1078 "not handled\n");
1079 break;
1080 case POWERPC_EXCP_SMI: /* System management interrupt */
1081 cpu_abort(env, "System management interrupt while in user mode. "
1082 "Aborting\n");
1083 break;
1084 case POWERPC_EXCP_THERM: /* Thermal interrupt */
1085 cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
1086 "Aborting\n");
1087 break;
1088 case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */
1089 cpu_abort(env, "Performance monitor exception not handled\n");
1090 break;
1091 case POWERPC_EXCP_VPUA: /* Vector assist exception */
1092 cpu_abort(env, "Vector assist exception not handled\n");
1093 break;
1094 case POWERPC_EXCP_SOFTP: /* Soft patch exception */
1095 cpu_abort(env, "Soft patch exception not handled\n");
1096 break;
1097 case POWERPC_EXCP_MAINT: /* Maintenance exception */
1098 cpu_abort(env, "Maintenance exception while in user mode. "
1099 "Aborting\n");
1100 break;
1101 case POWERPC_EXCP_STOP: /* stop translation */
1102 /* We did invalidate the instruction cache. Go on */
1103 break;
1104 case POWERPC_EXCP_BRANCH: /* branch instruction: */
1105 /* We just stopped because of a branch. Go on */
1106 break;
1107 case POWERPC_EXCP_SYSCALL_USER:
1108 /* system call in user-mode emulation */
1109 /* WARNING:
1110 * PPC ABI uses overflow flag in cr0 to signal an error
1111 * in syscalls.
1112 */
1113 #if 0
1114 printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0],
1115 env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]);
1116 #endif
1117 env->crf[0] &= ~0x1;
1118 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
1119 env->gpr[5], env->gpr[6], env->gpr[7],
1120 env->gpr[8]);
1121 if (ret > (uint32_t)(-515)) {
1122 env->crf[0] |= 0x1;
1123 ret = -ret;
1124 }
1125 env->gpr[3] = ret;
1126 #if 0
1127 printf("syscall returned 0x%08x (%d)\n", ret, ret);
1128 #endif
1129 break;
1130 case EXCP_INTERRUPT:
1131 /* just indicate that signals should be handled asap */
1132 break;
1133 default:
1134 cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
1135 break;
1136 }
1137 process_pending_signals(env);
1138 }
1139 }
1140 #endif
1141
1142 #ifdef TARGET_MIPS
1143
1144 #define MIPS_SYS(name, args) args,
1145
1146 static const uint8_t mips_syscall_args[] = {
1147 MIPS_SYS(sys_syscall , 0) /* 4000 */
1148 MIPS_SYS(sys_exit , 1)
1149 MIPS_SYS(sys_fork , 0)
1150 MIPS_SYS(sys_read , 3)
1151 MIPS_SYS(sys_write , 3)
1152 MIPS_SYS(sys_open , 3) /* 4005 */
1153 MIPS_SYS(sys_close , 1)
1154 MIPS_SYS(sys_waitpid , 3)
1155 MIPS_SYS(sys_creat , 2)
1156 MIPS_SYS(sys_link , 2)
1157 MIPS_SYS(sys_unlink , 1) /* 4010 */
1158 MIPS_SYS(sys_execve , 0)
1159 MIPS_SYS(sys_chdir , 1)
1160 MIPS_SYS(sys_time , 1)
1161 MIPS_SYS(sys_mknod , 3)
1162 MIPS_SYS(sys_chmod , 2) /* 4015 */
1163 MIPS_SYS(sys_lchown , 3)
1164 MIPS_SYS(sys_ni_syscall , 0)
1165 MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */
1166 MIPS_SYS(sys_lseek , 3)
1167 MIPS_SYS(sys_getpid , 0) /* 4020 */
1168 MIPS_SYS(sys_mount , 5)
1169 MIPS_SYS(sys_oldumount , 1)
1170 MIPS_SYS(sys_setuid , 1)
1171 MIPS_SYS(sys_getuid , 0)
1172 MIPS_SYS(sys_stime , 1) /* 4025 */
1173 MIPS_SYS(sys_ptrace , 4)
1174 MIPS_SYS(sys_alarm , 1)
1175 MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */
1176 MIPS_SYS(sys_pause , 0)
1177 MIPS_SYS(sys_utime , 2) /* 4030 */
1178 MIPS_SYS(sys_ni_syscall , 0)
1179 MIPS_SYS(sys_ni_syscall , 0)
1180 MIPS_SYS(sys_access , 2)
1181 MIPS_SYS(sys_nice , 1)
1182 MIPS_SYS(sys_ni_syscall , 0) /* 4035 */
1183 MIPS_SYS(sys_sync , 0)
1184 MIPS_SYS(sys_kill , 2)
1185 MIPS_SYS(sys_rename , 2)
1186 MIPS_SYS(sys_mkdir , 2)
1187 MIPS_SYS(sys_rmdir , 1) /* 4040 */
1188 MIPS_SYS(sys_dup , 1)
1189 MIPS_SYS(sys_pipe , 0)
1190 MIPS_SYS(sys_times , 1)
1191 MIPS_SYS(sys_ni_syscall , 0)
1192 MIPS_SYS(sys_brk , 1) /* 4045 */
1193 MIPS_SYS(sys_setgid , 1)
1194 MIPS_SYS(sys_getgid , 0)
1195 MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */
1196 MIPS_SYS(sys_geteuid , 0)
1197 MIPS_SYS(sys_getegid , 0) /* 4050 */
1198 MIPS_SYS(sys_acct , 0)
1199 MIPS_SYS(sys_umount , 2)
1200 MIPS_SYS(sys_ni_syscall , 0)
1201 MIPS_SYS(sys_ioctl , 3)
1202 MIPS_SYS(sys_fcntl , 3) /* 4055 */
1203 MIPS_SYS(sys_ni_syscall , 2)
1204 MIPS_SYS(sys_setpgid , 2)
1205 MIPS_SYS(sys_ni_syscall , 0)
1206 MIPS_SYS(sys_olduname , 1)
1207 MIPS_SYS(sys_umask , 1) /* 4060 */
1208 MIPS_SYS(sys_chroot , 1)
1209 MIPS_SYS(sys_ustat , 2)
1210 MIPS_SYS(sys_dup2 , 2)
1211 MIPS_SYS(sys_getppid , 0)
1212 MIPS_SYS(sys_getpgrp , 0) /* 4065 */
1213 MIPS_SYS(sys_setsid , 0)
1214 MIPS_SYS(sys_sigaction , 3)
1215 MIPS_SYS(sys_sgetmask , 0)
1216 MIPS_SYS(sys_ssetmask , 1)
1217 MIPS_SYS(sys_setreuid , 2) /* 4070 */
1218 MIPS_SYS(sys_setregid , 2)
1219 MIPS_SYS(sys_sigsuspend , 0)
1220 MIPS_SYS(sys_sigpending , 1)
1221 MIPS_SYS(sys_sethostname , 2)
1222 MIPS_SYS(sys_setrlimit , 2) /* 4075 */
1223 MIPS_SYS(sys_getrlimit , 2)
1224 MIPS_SYS(sys_getrusage , 2)
1225 MIPS_SYS(sys_gettimeofday, 2)
1226 MIPS_SYS(sys_settimeofday, 2)
1227 MIPS_SYS(sys_getgroups , 2) /* 4080 */
1228 MIPS_SYS(sys_setgroups , 2)
1229 MIPS_SYS(sys_ni_syscall , 0) /* old_select */
1230 MIPS_SYS(sys_symlink , 2)
1231 MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */
1232 MIPS_SYS(sys_readlink , 3) /* 4085 */
1233 MIPS_SYS(sys_uselib , 1)
1234 MIPS_SYS(sys_swapon , 2)
1235 MIPS_SYS(sys_reboot , 3)
1236 MIPS_SYS(old_readdir , 3)
1237 MIPS_SYS(old_mmap , 6) /* 4090 */
1238 MIPS_SYS(sys_munmap , 2)
1239 MIPS_SYS(sys_truncate , 2)
1240 MIPS_SYS(sys_ftruncate , 2)
1241 MIPS_SYS(sys_fchmod , 2)
1242 MIPS_SYS(sys_fchown , 3) /* 4095 */
1243 MIPS_SYS(sys_getpriority , 2)
1244 MIPS_SYS(sys_setpriority , 3)
1245 MIPS_SYS(sys_ni_syscall , 0)
1246 MIPS_SYS(sys_statfs , 2)
1247 MIPS_SYS(sys_fstatfs , 2) /* 4100 */
1248 MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */
1249 MIPS_SYS(sys_socketcall , 2)
1250 MIPS_SYS(sys_syslog , 3)
1251 MIPS_SYS(sys_setitimer , 3)
1252 MIPS_SYS(sys_getitimer , 2) /* 4105 */
1253 MIPS_SYS(sys_newstat , 2)
1254 MIPS_SYS(sys_newlstat , 2)
1255 MIPS_SYS(sys_newfstat , 2)
1256 MIPS_SYS(sys_uname , 1)
1257 MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */
1258 MIPS_SYS(sys_vhangup , 0)
1259 MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */
1260 MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */
1261 MIPS_SYS(sys_wait4 , 4)
1262 MIPS_SYS(sys_swapoff , 1) /* 4115 */
1263 MIPS_SYS(sys_sysinfo , 1)
1264 MIPS_SYS(sys_ipc , 6)
1265 MIPS_SYS(sys_fsync , 1)
1266 MIPS_SYS(sys_sigreturn , 0)
1267 MIPS_SYS(sys_clone , 0) /* 4120 */
1268 MIPS_SYS(sys_setdomainname, 2)
1269 MIPS_SYS(sys_newuname , 1)
1270 MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */
1271 MIPS_SYS(sys_adjtimex , 1)
1272 MIPS_SYS(sys_mprotect , 3) /* 4125 */
1273 MIPS_SYS(sys_sigprocmask , 3)
1274 MIPS_SYS(sys_ni_syscall , 0) /* was create_module */
1275 MIPS_SYS(sys_init_module , 5)
1276 MIPS_SYS(sys_delete_module, 1)
1277 MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */
1278 MIPS_SYS(sys_quotactl , 0)
1279 MIPS_SYS(sys_getpgid , 1)
1280 MIPS_SYS(sys_fchdir , 1)
1281 MIPS_SYS(sys_bdflush , 2)
1282 MIPS_SYS(sys_sysfs , 3) /* 4135 */
1283 MIPS_SYS(sys_personality , 1)
1284 MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */
1285 MIPS_SYS(sys_setfsuid , 1)
1286 MIPS_SYS(sys_setfsgid , 1)
1287 MIPS_SYS(sys_llseek , 5) /* 4140 */
1288 MIPS_SYS(sys_getdents , 3)
1289 MIPS_SYS(sys_select , 5)
1290 MIPS_SYS(sys_flock , 2)
1291 MIPS_SYS(sys_msync , 3)
1292 MIPS_SYS(sys_readv , 3) /* 4145 */
1293 MIPS_SYS(sys_writev , 3)
1294 MIPS_SYS(sys_cacheflush , 3)
1295 MIPS_SYS(sys_cachectl , 3)
1296 MIPS_SYS(sys_sysmips , 4)
1297 MIPS_SYS(sys_ni_syscall , 0) /* 4150 */
1298 MIPS_SYS(sys_getsid , 1)
1299 MIPS_SYS(sys_fdatasync , 0)
1300 MIPS_SYS(sys_sysctl , 1)
1301 MIPS_SYS(sys_mlock , 2)
1302 MIPS_SYS(sys_munlock , 2) /* 4155 */
1303 MIPS_SYS(sys_mlockall , 1)
1304 MIPS_SYS(sys_munlockall , 0)
1305 MIPS_SYS(sys_sched_setparam, 2)
1306 MIPS_SYS(sys_sched_getparam, 2)
1307 MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */
1308 MIPS_SYS(sys_sched_getscheduler, 1)
1309 MIPS_SYS(sys_sched_yield , 0)
1310 MIPS_SYS(sys_sched_get_priority_max, 1)
1311 MIPS_SYS(sys_sched_get_priority_min, 1)
1312 MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */
1313 MIPS_SYS(sys_nanosleep, 2)
1314 MIPS_SYS(sys_mremap , 4)
1315 MIPS_SYS(sys_accept , 3)
1316 MIPS_SYS(sys_bind , 3)
1317 MIPS_SYS(sys_connect , 3) /* 4170 */
1318 MIPS_SYS(sys_getpeername , 3)
1319 MIPS_SYS(sys_getsockname , 3)
1320 MIPS_SYS(sys_getsockopt , 5)
1321 MIPS_SYS(sys_listen , 2)
1322 MIPS_SYS(sys_recv , 4) /* 4175 */
1323 MIPS_SYS(sys_recvfrom , 6)
1324 MIPS_SYS(sys_recvmsg , 3)
1325 MIPS_SYS(sys_send , 4)
1326 MIPS_SYS(sys_sendmsg , 3)
1327 MIPS_SYS(sys_sendto , 6) /* 4180 */
1328 MIPS_SYS(sys_setsockopt , 5)
1329 MIPS_SYS(sys_shutdown , 2)
1330 MIPS_SYS(sys_socket , 3)
1331 MIPS_SYS(sys_socketpair , 4)
1332 MIPS_SYS(sys_setresuid , 3) /* 4185 */
1333 MIPS_SYS(sys_getresuid , 3)
1334 MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */
1335 MIPS_SYS(sys_poll , 3)
1336 MIPS_SYS(sys_nfsservctl , 3)
1337 MIPS_SYS(sys_setresgid , 3) /* 4190 */
1338 MIPS_SYS(sys_getresgid , 3)
1339 MIPS_SYS(sys_prctl , 5)
1340 MIPS_SYS(sys_rt_sigreturn, 0)
1341 MIPS_SYS(sys_rt_sigaction, 4)
1342 MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */
1343 MIPS_SYS(sys_rt_sigpending, 2)
1344 MIPS_SYS(sys_rt_sigtimedwait, 4)
1345 MIPS_SYS(sys_rt_sigqueueinfo, 3)
1346 MIPS_SYS(sys_rt_sigsuspend, 0)
1347 MIPS_SYS(sys_pread64 , 6) /* 4200 */
1348 MIPS_SYS(sys_pwrite64 , 6)
1349 MIPS_SYS(sys_chown , 3)
1350 MIPS_SYS(sys_getcwd , 2)
1351 MIPS_SYS(sys_capget , 2)
1352 MIPS_SYS(sys_capset , 2) /* 4205 */
1353 MIPS_SYS(sys_sigaltstack , 0)
1354 MIPS_SYS(sys_sendfile , 4)
1355 MIPS_SYS(sys_ni_syscall , 0)
1356 MIPS_SYS(sys_ni_syscall , 0)
1357 MIPS_SYS(sys_mmap2 , 6) /* 4210 */
1358 MIPS_SYS(sys_truncate64 , 4)
1359 MIPS_SYS(sys_ftruncate64 , 4)
1360 MIPS_SYS(sys_stat64 , 2)
1361 MIPS_SYS(sys_lstat64 , 2)
1362 MIPS_SYS(sys_fstat64 , 2) /* 4215 */
1363 MIPS_SYS(sys_pivot_root , 2)
1364 MIPS_SYS(sys_mincore , 3)
1365 MIPS_SYS(sys_madvise , 3)
1366 MIPS_SYS(sys_getdents64 , 3)
1367 MIPS_SYS(sys_fcntl64 , 3) /* 4220 */
1368 MIPS_SYS(sys_ni_syscall , 0)
1369 MIPS_SYS(sys_gettid , 0)
1370 MIPS_SYS(sys_readahead , 5)
1371 MIPS_SYS(sys_setxattr , 5)
1372 MIPS_SYS(sys_lsetxattr , 5) /* 4225 */
1373 MIPS_SYS(sys_fsetxattr , 5)
1374 MIPS_SYS(sys_getxattr , 4)
1375 MIPS_SYS(sys_lgetxattr , 4)
1376 MIPS_SYS(sys_fgetxattr , 4)
1377 MIPS_SYS(sys_listxattr , 3) /* 4230 */
1378 MIPS_SYS(sys_llistxattr , 3)
1379 MIPS_SYS(sys_flistxattr , 3)
1380 MIPS_SYS(sys_removexattr , 2)
1381 MIPS_SYS(sys_lremovexattr, 2)
1382 MIPS_SYS(sys_fremovexattr, 2) /* 4235 */
1383 MIPS_SYS(sys_tkill , 2)
1384 MIPS_SYS(sys_sendfile64 , 5)
1385 MIPS_SYS(sys_futex , 2)
1386 MIPS_SYS(sys_sched_setaffinity, 3)
1387 MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */
1388 MIPS_SYS(sys_io_setup , 2)
1389 MIPS_SYS(sys_io_destroy , 1)
1390 MIPS_SYS(sys_io_getevents, 5)
1391 MIPS_SYS(sys_io_submit , 3)
1392 MIPS_SYS(sys_io_cancel , 3) /* 4245 */
1393 MIPS_SYS(sys_exit_group , 1)
1394 MIPS_SYS(sys_lookup_dcookie, 3)
1395 MIPS_SYS(sys_epoll_create, 1)
1396 MIPS_SYS(sys_epoll_ctl , 4)
1397 MIPS_SYS(sys_epoll_wait , 3) /* 4250 */
1398 MIPS_SYS(sys_remap_file_pages, 5)
1399 MIPS_SYS(sys_set_tid_address, 1)
1400 MIPS_SYS(sys_restart_syscall, 0)
1401 MIPS_SYS(sys_fadvise64_64, 7)
1402 MIPS_SYS(sys_statfs64 , 3) /* 4255 */
1403 MIPS_SYS(sys_fstatfs64 , 2)
1404 MIPS_SYS(sys_timer_create, 3)
1405 MIPS_SYS(sys_timer_settime, 4)
1406 MIPS_SYS(sys_timer_gettime, 2)
1407 MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */
1408 MIPS_SYS(sys_timer_delete, 1)
1409 MIPS_SYS(sys_clock_settime, 2)
1410 MIPS_SYS(sys_clock_gettime, 2)
1411 MIPS_SYS(sys_clock_getres, 2)
1412 MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */
1413 MIPS_SYS(sys_tgkill , 3)
1414 MIPS_SYS(sys_utimes , 2)
1415 MIPS_SYS(sys_mbind , 4)
1416 MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */
1417 MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */
1418 MIPS_SYS(sys_mq_open , 4)
1419 MIPS_SYS(sys_mq_unlink , 1)
1420 MIPS_SYS(sys_mq_timedsend, 5)
1421 MIPS_SYS(sys_mq_timedreceive, 5)
1422 MIPS_SYS(sys_mq_notify , 2) /* 4275 */
1423 MIPS_SYS(sys_mq_getsetattr, 3)
1424 MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */
1425 MIPS_SYS(sys_waitid , 4)
1426 MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */
1427 MIPS_SYS(sys_add_key , 5)
1428 MIPS_SYS(sys_request_key, 4)
1429 MIPS_SYS(sys_keyctl , 5)
1430 MIPS_SYS(sys_set_thread_area, 1)
1431 MIPS_SYS(sys_inotify_init, 0)
1432 MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */
1433 MIPS_SYS(sys_inotify_rm_watch, 2)
1434 MIPS_SYS(sys_migrate_pages, 4)
1435 MIPS_SYS(sys_openat, 4)
1436 MIPS_SYS(sys_mkdirat, 3)
1437 MIPS_SYS(sys_mknodat, 4) /* 4290 */
1438 MIPS_SYS(sys_fchownat, 5)
1439 MIPS_SYS(sys_futimesat, 3)
1440 MIPS_SYS(sys_fstatat64, 4)
1441 MIPS_SYS(sys_unlinkat, 3)
1442 MIPS_SYS(sys_renameat, 4) /* 4295 */
1443 MIPS_SYS(sys_linkat, 5)
1444 MIPS_SYS(sys_symlinkat, 3)
1445 MIPS_SYS(sys_readlinkat, 4)
1446 MIPS_SYS(sys_fchmodat, 3)
1447 MIPS_SYS(sys_faccessat, 3) /* 4300 */
1448 MIPS_SYS(sys_pselect6, 6)
1449 MIPS_SYS(sys_ppoll, 5)
1450 MIPS_SYS(sys_unshare, 1)
1451 MIPS_SYS(sys_splice, 4)
1452 MIPS_SYS(sys_sync_file_range, 7) /* 4305 */
1453 MIPS_SYS(sys_tee, 4)
1454 MIPS_SYS(sys_vmsplice, 4)
1455 MIPS_SYS(sys_move_pages, 6)
1456 MIPS_SYS(sys_set_robust_list, 2)
1457 MIPS_SYS(sys_get_robust_list, 3) /* 4310 */
1458 MIPS_SYS(sys_kexec_load, 4)
1459 MIPS_SYS(sys_getcpu, 3)
1460 MIPS_SYS(sys_epoll_pwait, 6)
1461 MIPS_SYS(sys_ioprio_set, 3)
1462 MIPS_SYS(sys_ioprio_get, 2)
1463 };
1464
1465 #undef MIPS_SYS
1466
1467 void cpu_loop(CPUMIPSState *env)
1468 {
1469 target_siginfo_t info;
1470 int trapnr, ret;
1471 unsigned int syscall_num;
1472
1473 for(;;) {
1474 trapnr = cpu_mips_exec(env);
1475 switch(trapnr) {
1476 case EXCP_SYSCALL:
1477 syscall_num = env->gpr[2][env->current_tc] - 4000;
1478 env->PC[env->current_tc] += 4;
1479 if (syscall_num >= sizeof(mips_syscall_args)) {
1480 ret = -ENOSYS;
1481 } else {
1482 int nb_args;
1483 target_ulong sp_reg;
1484 target_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
1485
1486 nb_args = mips_syscall_args[syscall_num];
1487 sp_reg = env->gpr[29][env->current_tc];
1488 switch (nb_args) {
1489 /* these arguments are taken from the stack */
1490 case 8: arg8 = tgetl(sp_reg + 28);
1491 case 7: arg7 = tgetl(sp_reg + 24);
1492 case 6: arg6 = tgetl(sp_reg + 20);
1493 case 5: arg5 = tgetl(sp_reg + 16);
1494 default:
1495 break;
1496 }
1497 ret = do_syscall(env, env->gpr[2][env->current_tc],
1498 env->gpr[4][env->current_tc],
1499 env->gpr[5][env->current_tc],
1500 env->gpr[6][env->current_tc],
1501 env->gpr[7][env->current_tc],
1502 arg5, arg6/*, arg7, arg8*/);
1503 }
1504 if ((unsigned int)ret >= (unsigned int)(-1133)) {
1505 env->gpr[7][env->current_tc] = 1; /* error flag */
1506 ret = -ret;
1507 } else {
1508 env->gpr[7][env->current_tc] = 0; /* error flag */
1509 }
1510 env->gpr[2][env->current_tc] = ret;
1511 break;
1512 case EXCP_TLBL:
1513 case EXCP_TLBS:
1514 case EXCP_CpU:
1515 case EXCP_RI:
1516 info.si_signo = TARGET_SIGILL;
1517 info.si_errno = 0;
1518 info.si_code = 0;
1519 queue_signal(info.si_signo, &info);
1520 break;
1521 case EXCP_INTERRUPT:
1522 /* just indicate that signals should be handled asap */
1523 break;
1524 case EXCP_DEBUG:
1525 {
1526 int sig;
1527
1528 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1529 if (sig)
1530 {
1531 info.si_signo = sig;
1532 info.si_errno = 0;
1533 info.si_code = TARGET_TRAP_BRKPT;
1534 queue_signal(info.si_signo, &info);
1535 }
1536 }
1537 break;
1538 default:
1539 // error:
1540 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
1541 trapnr);
1542 cpu_dump_state(env, stderr, fprintf, 0);
1543 abort();
1544 }
1545 process_pending_signals(env);
1546 }
1547 }
1548 #endif
1549
1550 #ifdef TARGET_SH4
1551 void cpu_loop (CPUState *env)
1552 {
1553 int trapnr, ret;
1554 target_siginfo_t info;
1555
1556 while (1) {
1557 trapnr = cpu_sh4_exec (env);
1558
1559 switch (trapnr) {
1560 case 0x160:
1561 ret = do_syscall(env,
1562 env->gregs[3],
1563 env->gregs[4],
1564 env->gregs[5],
1565 env->gregs[6],
1566 env->gregs[7],
1567 env->gregs[0],
1568 0);
1569 env->gregs[0] = ret;
1570 env->pc += 2;
1571 break;
1572 case EXCP_DEBUG:
1573 {
1574 int sig;
1575
1576 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1577 if (sig)
1578 {
1579 info.si_signo = sig;
1580 info.si_errno = 0;
1581 info.si_code = TARGET_TRAP_BRKPT;
1582 queue_signal(info.si_signo, &info);
1583 }
1584 }
1585 break;
1586 default:
1587 printf ("Unhandled trap: 0x%x\n", trapnr);
1588 cpu_dump_state(env, stderr, fprintf, 0);
1589 exit (1);
1590 }
1591 process_pending_signals (env);
1592 }
1593 }
1594 #endif
1595
1596 #ifdef TARGET_M68K
1597
1598 void cpu_loop(CPUM68KState *env)
1599 {
1600 int trapnr;
1601 unsigned int n;
1602 target_siginfo_t info;
1603 TaskState *ts = env->opaque;
1604
1605 for(;;) {
1606 trapnr = cpu_m68k_exec(env);
1607 switch(trapnr) {
1608 case EXCP_ILLEGAL:
1609 {
1610 if (ts->sim_syscalls) {
1611 uint16_t nr;
1612 nr = lduw(env->pc + 2);
1613 env->pc += 4;
1614 do_m68k_simcall(env, nr);
1615 } else {
1616 goto do_sigill;
1617 }
1618 }
1619 break;
1620 case EXCP_HALT_INSN:
1621 /* Semihosing syscall. */
1622 env->pc += 4;
1623 do_m68k_semihosting(env, env->dregs[0]);
1624 break;
1625 case EXCP_LINEA:
1626 case EXCP_LINEF:
1627 case EXCP_UNSUPPORTED:
1628 do_sigill:
1629 info.si_signo = SIGILL;
1630 info.si_errno = 0;
1631 info.si_code = TARGET_ILL_ILLOPN;
1632 info._sifields._sigfault._addr = env->pc;
1633 queue_signal(info.si_signo, &info);
1634 break;
1635 case EXCP_TRAP0:
1636 {
1637 ts->sim_syscalls = 0;
1638 n = env->dregs[0];
1639 env->pc += 2;
1640 env->dregs[0] = do_syscall(env,
1641 n,
1642 env->dregs[1],
1643 env->dregs[2],
1644 env->dregs[3],
1645 env->dregs[4],
1646 env->dregs[5],
1647 env->dregs[6]);
1648 }
1649 break;
1650 case EXCP_INTERRUPT:
1651 /* just indicate that signals should be handled asap */
1652 break;
1653 case EXCP_ACCESS:
1654 {
1655 info.si_signo = SIGSEGV;
1656 info.si_errno = 0;
1657 /* XXX: check env->error_code */
1658 info.si_code = TARGET_SEGV_MAPERR;
1659 info._sifields._sigfault._addr = env->mmu.ar;
1660 queue_signal(info.si_signo, &info);
1661 }
1662 break;
1663 case EXCP_DEBUG:
1664 {
1665 int sig;
1666
1667 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1668 if (sig)
1669 {
1670 info.si_signo = sig;
1671 info.si_errno = 0;
1672 info.si_code = TARGET_TRAP_BRKPT;
1673 queue_signal(info.si_signo, &info);
1674 }
1675 }
1676 break;
1677 default:
1678 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
1679 trapnr);
1680 cpu_dump_state(env, stderr, fprintf, 0);
1681 abort();
1682 }
1683 process_pending_signals(env);
1684 }
1685 }
1686 #endif /* TARGET_M68K */
1687
1688 #ifdef TARGET_ALPHA
1689 void cpu_loop (CPUState *env)
1690 {
1691 int trapnr;
1692 target_siginfo_t info;
1693
1694 while (1) {
1695 trapnr = cpu_alpha_exec (env);
1696
1697 switch (trapnr) {
1698 case EXCP_RESET:
1699 fprintf(stderr, "Reset requested. Exit\n");
1700 exit(1);
1701 break;
1702 case EXCP_MCHK:
1703 fprintf(stderr, "Machine check exception. Exit\n");
1704 exit(1);
1705 break;
1706 case EXCP_ARITH:
1707 fprintf(stderr, "Arithmetic trap.\n");
1708 exit(1);
1709 break;
1710 case EXCP_HW_INTERRUPT:
1711 fprintf(stderr, "External interrupt. Exit\n");
1712 exit(1);
1713 break;
1714 case EXCP_DFAULT:
1715 fprintf(stderr, "MMU data fault\n");
1716 exit(1);
1717 break;
1718 case EXCP_DTB_MISS_PAL:
1719 fprintf(stderr, "MMU data TLB miss in PALcode\n");
1720 exit(1);
1721 break;
1722 case EXCP_ITB_MISS:
1723 fprintf(stderr, "MMU instruction TLB miss\n");
1724 exit(1);
1725 break;
1726 case EXCP_ITB_ACV:
1727 fprintf(stderr, "MMU instruction access violation\n");
1728 exit(1);
1729 break;
1730 case EXCP_DTB_MISS_NATIVE:
1731 fprintf(stderr, "MMU data TLB miss\n");
1732 exit(1);
1733 break;
1734 case EXCP_UNALIGN:
1735 fprintf(stderr, "Unaligned access\n");
1736 exit(1);
1737 break;
1738 case EXCP_OPCDEC:
1739 fprintf(stderr, "Invalid instruction\n");
1740 exit(1);
1741 break;
1742 case EXCP_FEN:
1743 fprintf(stderr, "Floating-point not allowed\n");
1744 exit(1);
1745 break;
1746 case EXCP_CALL_PAL ... (EXCP_CALL_PALP - 1):
1747 fprintf(stderr, "Call to PALcode\n");
1748 call_pal(env, (trapnr >> 6) | 0x80);
1749 break;
1750 case EXCP_CALL_PALP ... (EXCP_CALL_PALE - 1):
1751 fprintf(stderr, "Privileged call to PALcode\n");
1752 exit(1);
1753 break;
1754 case EXCP_DEBUG:
1755 {
1756 int sig;
1757
1758 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1759 if (sig)
1760 {
1761 info.si_signo = sig;
1762 info.si_errno = 0;
1763 info.si_code = TARGET_TRAP_BRKPT;
1764 queue_signal(info.si_signo, &info);
1765 }
1766 }
1767 break;
1768 default:
1769 printf ("Unhandled trap: 0x%x\n", trapnr);
1770 cpu_dump_state(env, stderr, fprintf, 0);
1771 exit (1);
1772 }
1773 process_pending_signals (env);
1774 }
1775 }
1776 #endif /* TARGET_ALPHA */
1777
1778 void usage(void)
1779 {
1780 printf("qemu-" TARGET_ARCH " version " QEMU_VERSION ", Copyright (c) 2003-2007 Fabrice Bellard\n"
1781 "usage: qemu-" TARGET_ARCH " [-h] [-g] [-d opts] [-L path] [-s size] [-cpu model] program [arguments...]\n"
1782 "Linux CPU emulator (compiled for %s emulation)\n"
1783 "\n"
1784 "-h print this help\n"
1785 "-g port wait gdb connection to port\n"
1786 "-L path set the elf interpreter prefix (default=%s)\n"
1787 "-s size set the stack size in bytes (default=%ld)\n"
1788 "-cpu model select CPU (-cpu ? for list)\n"
1789 "-drop-ld-preload drop LD_PRELOAD for target process\n"
1790 "\n"
1791 "debug options:\n"
1792 #ifdef USE_CODE_COPY
1793 "-no-code-copy disable code copy acceleration\n"
1794 #endif
1795 "-d options activate log (logfile=%s)\n"
1796 "-p pagesize set the host page size to 'pagesize'\n",
1797 TARGET_ARCH,
1798 interp_prefix,
1799 x86_stack_size,
1800 DEBUG_LOGFILE);
1801 _exit(1);
1802 }
1803
1804 /* XXX: currently only used for async signals (see signal.c) */
1805 CPUState *global_env;
1806
1807 /* used to free thread contexts */
1808 TaskState *first_task_state;
1809
1810 int main(int argc, char **argv)
1811 {
1812 const char *filename;
1813 const char *cpu_model;
1814 struct target_pt_regs regs1, *regs = &regs1;
1815 struct image_info info1, *info = &info1;
1816 TaskState ts1, *ts = &ts1;
1817 CPUState *env;
1818 int optind;
1819 const char *r;
1820 int gdbstub_port = 0;
1821 int drop_ld_preload = 0, environ_count = 0;
1822 char **target_environ, **wrk, **dst;
1823
1824 if (argc <= 1)
1825 usage();
1826
1827 /* init debug */
1828 cpu_set_log_filename(DEBUG_LOGFILE);
1829
1830 cpu_model = NULL;
1831 optind = 1;
1832 for(;;) {
1833 if (optind >= argc)
1834 break;
1835 r = argv[optind];
1836 if (r[0] != '-')
1837 break;
1838 optind++;
1839 r++;
1840 if (!strcmp(r, "-")) {
1841 break;
1842 } else if (!strcmp(r, "d")) {
1843 int mask;
1844 CPULogItem *item;
1845
1846 if (optind >= argc)
1847 break;
1848
1849 r = argv[optind++];
1850 mask = cpu_str_to_log_mask(r);
1851 if (!mask) {
1852 printf("Log items (comma separated):\n");
1853 for(item = cpu_log_items; item->mask != 0; item++) {
1854 printf("%-10s %s\n", item->name, item->help);
1855 }
1856 exit(1);
1857 }
1858 cpu_set_log(mask);
1859 } else if (!strcmp(r, "s")) {
1860 r = argv[optind++];
1861 x86_stack_size = strtol(r, (char **)&r, 0);
1862 if (x86_stack_size <= 0)
1863 usage();
1864 if (*r == 'M')
1865 x86_stack_size *= 1024 * 1024;
1866 else if (*r == 'k' || *r == 'K')
1867 x86_stack_size *= 1024;
1868 } else if (!strcmp(r, "L")) {
1869 interp_prefix = argv[optind++];
1870 } else if (!strcmp(r, "p")) {
1871 qemu_host_page_size = atoi(argv[optind++]);
1872 if (qemu_host_page_size == 0 ||
1873 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
1874 fprintf(stderr, "page size must be a power of two\n");
1875 exit(1);
1876 }
1877 } else if (!strcmp(r, "g")) {
1878 gdbstub_port = atoi(argv[optind++]);
1879 } else if (!strcmp(r, "r")) {
1880 qemu_uname_release = argv[optind++];
1881 } else if (!strcmp(r, "cpu")) {
1882 cpu_model = argv[optind++];
1883 if (strcmp(cpu_model, "?") == 0) {
1884 #if defined(TARGET_PPC)
1885 ppc_cpu_list(stdout, &fprintf);
1886 #elif defined(TARGET_ARM)
1887 arm_cpu_list();
1888 #elif defined(TARGET_MIPS)
1889 mips_cpu_list(stdout, &fprintf);
1890 #elif defined(TARGET_SPARC)
1891 sparc_cpu_list(stdout, &fprintf);
1892 #endif
1893 _exit(1);
1894 }
1895 } else if (!strcmp(r, "drop-ld-preload")) {
1896 drop_ld_preload = 1;
1897 } else
1898 #ifdef USE_CODE_COPY
1899 if (!strcmp(r, "no-code-copy")) {
1900 code_copy_enabled = 0;
1901 } else
1902 #endif
1903 {
1904 usage();
1905 }
1906 }
1907 if (optind >= argc)
1908 usage();
1909 filename = argv[optind];
1910
1911 /* Zero out regs */
1912 memset(regs, 0, sizeof(struct target_pt_regs));
1913
1914 /* Zero out image_info */
1915 memset(info, 0, sizeof(struct image_info));
1916
1917 /* Scan interp_prefix dir for replacement files. */
1918 init_paths(interp_prefix);
1919
1920 /* NOTE: we need to init the CPU at this stage to get
1921 qemu_host_page_size */
1922 env = cpu_init();
1923 global_env = env;
1924
1925 wrk = environ;
1926 while (*(wrk++))
1927 environ_count++;
1928
1929 target_environ = malloc((environ_count + 1) * sizeof(char *));
1930 if (!target_environ)
1931 abort();
1932 for (wrk = environ, dst = target_environ; *wrk; wrk++) {
1933 if (drop_ld_preload && !strncmp(*wrk, "LD_PRELOAD=", 11))
1934 continue;
1935 *(dst++) = strdup(*wrk);
1936 }
1937 *dst = NULL; /* NULL terminate target_environ */
1938
1939 if (loader_exec(filename, argv+optind, target_environ, regs, info) != 0) {
1940 printf("Error loading %s\n", filename);
1941 _exit(1);
1942 }
1943
1944 for (wrk = target_environ; *wrk; wrk++) {
1945 free(*wrk);
1946 }
1947
1948 free(target_environ);
1949
1950 if (loglevel) {
1951 page_dump(logfile);
1952
1953 fprintf(logfile, "start_brk 0x%08lx\n" , info->start_brk);
1954 fprintf(logfile, "end_code 0x%08lx\n" , info->end_code);
1955 fprintf(logfile, "start_code 0x%08lx\n" , info->start_code);
1956 fprintf(logfile, "start_data 0x%08lx\n" , info->start_data);
1957 fprintf(logfile, "end_data 0x%08lx\n" , info->end_data);
1958 fprintf(logfile, "start_stack 0x%08lx\n" , info->start_stack);
1959 fprintf(logfile, "brk 0x%08lx\n" , info->brk);
1960 fprintf(logfile, "entry 0x%08lx\n" , info->entry);
1961 }
1962
1963 target_set_brk(info->brk);
1964 syscall_init();
1965 signal_init();
1966
1967 /* build Task State */
1968 memset(ts, 0, sizeof(TaskState));
1969 env->opaque = ts;
1970 ts->used = 1;
1971 ts->info = info;
1972 env->user_mode_only = 1;
1973
1974 #if defined(TARGET_I386)
1975 cpu_x86_set_cpl(env, 3);
1976
1977 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
1978 env->hflags |= HF_PE_MASK;
1979 if (env->cpuid_features & CPUID_SSE) {
1980 env->cr[4] |= CR4_OSFXSR_MASK;
1981 env->hflags |= HF_OSFXSR_MASK;
1982 }
1983
1984 /* flags setup : we activate the IRQs by default as in user mode */
1985 env->eflags |= IF_MASK;
1986
1987 /* linux register setup */
1988 #if defined(TARGET_X86_64)
1989 env->regs[R_EAX] = regs->rax;
1990 env->regs[R_EBX] = regs->rbx;
1991 env->regs[R_ECX] = regs->rcx;
1992 env->regs[R_EDX] = regs->rdx;
1993 env->regs[R_ESI] = regs->rsi;
1994 env->regs[R_EDI] = regs->rdi;
1995 env->regs[R_EBP] = regs->rbp;
1996 env->regs[R_ESP] = regs->rsp;
1997 env->eip = regs->rip;
1998 #else
1999 env->regs[R_EAX] = regs->eax;
2000 env->regs[R_EBX] = regs->ebx;
2001 env->regs[R_ECX] = regs->ecx;
2002 env->regs[R_EDX] = regs->edx;
2003 env->regs[R_ESI] = regs->esi;
2004 env->regs[R_EDI] = regs->edi;
2005 env->regs[R_EBP] = regs->ebp;
2006 env->regs[R_ESP] = regs->esp;
2007 env->eip = regs->eip;
2008 #endif
2009
2010 /* linux interrupt setup */
2011 env->idt.base = h2g(idt_table);
2012 env->idt.limit = sizeof(idt_table) - 1;
2013 set_idt(0, 0);
2014 set_idt(1, 0);
2015 set_idt(2, 0);
2016 set_idt(3, 3);
2017 set_idt(4, 3);
2018 set_idt(5, 3);
2019 set_idt(6, 0);
2020 set_idt(7, 0);
2021 set_idt(8, 0);
2022 set_idt(9, 0);
2023 set_idt(10, 0);
2024 set_idt(11, 0);
2025 set_idt(12, 0);
2026 set_idt(13, 0);
2027 set_idt(14, 0);
2028 set_idt(15, 0);
2029 set_idt(16, 0);
2030 set_idt(17, 0);
2031 set_idt(18, 0);
2032 set_idt(19, 0);
2033 set_idt(0x80, 3);
2034
2035 /* linux segment setup */
2036 env->gdt.base = h2g(gdt_table);
2037 env->gdt.limit = sizeof(gdt_table) - 1;
2038 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2039 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2040 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2041 write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
2042 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2043 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
2044 cpu_x86_load_seg(env, R_CS, __USER_CS);
2045 cpu_x86_load_seg(env, R_DS, __USER_DS);
2046 cpu_x86_load_seg(env, R_ES, __USER_DS);
2047 cpu_x86_load_seg(env, R_SS, __USER_DS);
2048 cpu_x86_load_seg(env, R_FS, __USER_DS);
2049 cpu_x86_load_seg(env, R_GS, __USER_DS);
2050
2051 /* This hack makes Wine work... */
2052 env->segs[R_FS].selector = 0;
2053 #elif defined(TARGET_ARM)
2054 {
2055 int i;
2056 if (cpu_model == NULL)
2057 cpu_model = "arm926";
2058 cpu_arm_set_model(env, cpu_model);
2059 cpsr_write(env, regs->uregs[16], 0xffffffff);
2060 for(i = 0; i < 16; i++) {
2061 env->regs[i] = regs->uregs[i];
2062 }
2063 }
2064 #elif defined(TARGET_SPARC)
2065 {
2066 int i;
2067 const sparc_def_t *def;
2068 #ifdef TARGET_SPARC64
2069 if (cpu_model == NULL)
2070 cpu_model = "TI UltraSparc II";
2071 #else
2072 if (cpu_model == NULL)
2073 cpu_model = "Fujitsu MB86904";
2074 #endif
2075 sparc_find_by_name(cpu_model, &def);
2076 if (def == NULL) {
2077 fprintf(stderr, "Unable to find Sparc CPU definition\n");
2078 exit(1);
2079 }
2080 cpu_sparc_register(env, def);
2081 env->pc = regs->pc;
2082 env->npc = regs->npc;
2083 env->y = regs->y;
2084 for(i = 0; i < 8; i++)
2085 env->gregs[i] = regs->u_regs[i];
2086 for(i = 0; i < 8; i++)
2087 env->regwptr[i] = regs->u_regs[i + 8];
2088 }
2089 #elif defined(TARGET_PPC)
2090 {
2091 ppc_def_t *def;
2092 int i;
2093
2094 /* Choose and initialise CPU */
2095 if (cpu_model == NULL)
2096 cpu_model = "750";
2097 ppc_find_by_name(cpu_model, &def);
2098 if (def == NULL) {
2099 cpu_abort(env,
2100 "Unable to find PowerPC CPU definition\n");
2101 }
2102 cpu_ppc_register(env, def);
2103
2104 for (i = 0; i < 32; i++) {
2105 if (i != 12 && i != 6 && i != 13)
2106 env->msr[i] = (regs->msr >> i) & 1;
2107 }
2108 #if defined(TARGET_PPC64)
2109 msr_sf = 1;
2110 #endif
2111 env->nip = regs->nip;
2112 for(i = 0; i < 32; i++) {
2113 env->gpr[i] = regs->gpr[i];
2114 }
2115 }
2116 #elif defined(TARGET_M68K)
2117 {
2118 if (cpu_model == NULL)
2119 cpu_model = "any";
2120 if (cpu_m68k_set_model(env, cpu_model)) {
2121 cpu_abort(cpu_single_env,
2122 "Unable to find m68k CPU definition\n");
2123 }
2124 env->pc = regs->pc;
2125 env->dregs[0] = regs->d0;
2126 env->dregs[1] = regs->d1;
2127 env->dregs[2] = regs->d2;
2128 env->dregs[3] = regs->d3;
2129 env->dregs[4] = regs->d4;
2130 env->dregs[5] = regs->d5;
2131 env->dregs[6] = regs->d6;
2132 env->dregs[7] = regs->d7;
2133 env->aregs[0] = regs->a0;
2134 env->aregs[1] = regs->a1;
2135 env->aregs[2] = regs->a2;
2136 env->aregs[3] = regs->a3;
2137 env->aregs[4] = regs->a4;
2138 env->aregs[5] = regs->a5;
2139 env->aregs[6] = regs->a6;
2140 env->aregs[7] = regs->usp;
2141 env->sr = regs->sr;
2142 ts->sim_syscalls = 1;
2143 }
2144 #elif defined(TARGET_MIPS)
2145 {
2146 mips_def_t *def;
2147 int i;
2148
2149 /* Choose and initialise CPU */
2150 if (cpu_model == NULL)
2151 #if defined(TARGET_MIPSN32) || defined(TARGET_MIPS64)
2152 cpu_model = "20Kc";
2153 #else
2154 cpu_model = "24Kf";
2155 #endif
2156 mips_find_by_name(cpu_model, &def);
2157 if (def == NULL)
2158 cpu_abort(env, "Unable to find MIPS CPU definition\n");
2159 cpu_mips_register(env, def);
2160
2161 for(i = 0; i < 32; i++) {
2162 env->gpr[i][env->current_tc] = regs->regs[i];
2163 }
2164 env->PC[env->current_tc] = regs->cp0_epc;
2165 }
2166 #elif defined(TARGET_SH4)
2167 {
2168 int i;
2169
2170 for(i = 0; i < 16; i++) {
2171 env->gregs[i] = regs->regs[i];
2172 }
2173 env->pc = regs->pc;
2174 }
2175 #elif defined(TARGET_ALPHA)
2176 {
2177 int i;
2178
2179 for(i = 0; i < 28; i++) {
2180 env->ir[i] = ((target_ulong *)regs)[i];
2181 }
2182 env->ipr[IPR_USP] = regs->usp;
2183 env->ir[30] = regs->usp;
2184 env->pc = regs->pc;
2185 env->unique = regs->unique;
2186 }
2187 #else
2188 #error unsupported target CPU
2189 #endif
2190
2191 #if defined(TARGET_ARM) || defined(TARGET_M68K)
2192 ts->stack_base = info->start_stack;
2193 ts->heap_base = info->brk;
2194 /* This will be filled in on the first SYS_HEAPINFO call. */
2195 ts->heap_limit = 0;
2196 #endif
2197
2198 if (gdbstub_port) {
2199 gdbserver_start (gdbstub_port);
2200 gdb_handlesig(env, 0);
2201 }
2202 cpu_loop(env);
2203 /* never exits */
2204 return 0;
2205 }
Patches shipped by Fedora