4 * Copyright (c) 2003 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
29 #include "pixel_ops.h"
30 #include "qemu-timer.h"
34 //#define DEBUG_VGA_MEM
35 //#define DEBUG_VGA_REG
37 //#define DEBUG_BOCHS_VBE
39 /* force some bits to zero */
40 const uint8_t sr_mask
[8] = {
51 const uint8_t gr_mask
[16] = {
52 (uint8_t)~0xf0, /* 0x00 */
53 (uint8_t)~0xf0, /* 0x01 */
54 (uint8_t)~0xf0, /* 0x02 */
55 (uint8_t)~0xe0, /* 0x03 */
56 (uint8_t)~0xfc, /* 0x04 */
57 (uint8_t)~0x84, /* 0x05 */
58 (uint8_t)~0xf0, /* 0x06 */
59 (uint8_t)~0xf0, /* 0x07 */
60 (uint8_t)~0x00, /* 0x08 */
61 (uint8_t)~0xff, /* 0x09 */
62 (uint8_t)~0xff, /* 0x0a */
63 (uint8_t)~0xff, /* 0x0b */
64 (uint8_t)~0xff, /* 0x0c */
65 (uint8_t)~0xff, /* 0x0d */
66 (uint8_t)~0xff, /* 0x0e */
67 (uint8_t)~0xff, /* 0x0f */
70 #define cbswap_32(__x) \
72 (((uint32_t)(__x) & (uint32_t)0x000000ffUL) << 24) | \
73 (((uint32_t)(__x) & (uint32_t)0x0000ff00UL) << 8) | \
74 (((uint32_t)(__x) & (uint32_t)0x00ff0000UL) >> 8) | \
75 (((uint32_t)(__x) & (uint32_t)0xff000000UL) >> 24) ))
77 #ifdef WORDS_BIGENDIAN
78 #define PAT(x) cbswap_32(x)
83 #ifdef WORDS_BIGENDIAN
89 #ifdef WORDS_BIGENDIAN
90 #define GET_PLANE(data, p) (((data) >> (24 - (p) * 8)) & 0xff)
92 #define GET_PLANE(data, p) (((data) >> ((p) * 8)) & 0xff)
95 static const uint32_t mask16
[16] = {
116 #ifdef WORDS_BIGENDIAN
119 #define PAT(x) cbswap_32(x)
122 static const uint32_t dmask16
[16] = {
141 static const uint32_t dmask4
[4] = {
148 static uint32_t expand4
[256];
149 static uint16_t expand2
[256];
150 static uint8_t expand4to8
[16];
152 static void vga_screen_dump(void *opaque
, const char *filename
);
154 static void vga_dumb_update_retrace_info(VGAState
*s
)
159 static void vga_precise_update_retrace_info(VGAState
*s
)
162 int hretr_start_char
;
163 int hretr_skew_chars
;
167 int vretr_start_line
;
170 int div2
, sldiv2
, dots
;
173 const int clk_hz
[] = {25175000, 28322000, 25175000, 25175000};
174 int64_t chars_per_sec
;
175 struct vga_precise_retrace
*r
= &s
->retrace_info
.precise
;
177 htotal_chars
= s
->cr
[0x00] + 5;
178 hretr_start_char
= s
->cr
[0x04];
179 hretr_skew_chars
= (s
->cr
[0x05] >> 5) & 3;
180 hretr_end_char
= s
->cr
[0x05] & 0x1f;
182 vtotal_lines
= (s
->cr
[0x06]
183 | (((s
->cr
[0x07] & 1) | ((s
->cr
[0x07] >> 4) & 2)) << 8)) + 2
185 vretr_start_line
= s
->cr
[0x10]
186 | ((((s
->cr
[0x07] >> 2) & 1) | ((s
->cr
[0x07] >> 6) & 2)) << 8)
188 vretr_end_line
= s
->cr
[0x11] & 0xf;
191 div2
= (s
->cr
[0x17] >> 2) & 1;
192 sldiv2
= (s
->cr
[0x17] >> 3) & 1;
194 clocking_mode
= (s
->sr
[0x01] >> 3) & 1;
195 clock_sel
= (s
->msr
>> 2) & 3;
196 dots
= (s
->msr
& 1) ? 8 : 9;
198 chars_per_sec
= clk_hz
[clock_sel
] / dots
;
200 htotal_chars
<<= clocking_mode
;
202 r
->total_chars
= vtotal_lines
* htotal_chars
;
204 r
->ticks_per_char
= ticks_per_sec
/ (r
->total_chars
* r
->freq
);
206 r
->ticks_per_char
= ticks_per_sec
/ chars_per_sec
;
209 r
->vstart
= vretr_start_line
;
210 r
->vend
= r
->vstart
+ vretr_end_line
+ 1;
212 r
->hstart
= hretr_start_char
+ hretr_skew_chars
;
213 r
->hend
= r
->hstart
+ hretr_end_char
+ 1;
214 r
->htotal
= htotal_chars
;
226 "div2 = %d sldiv2 = %d\n"
227 "clocking_mode = %d\n"
228 "clock_sel = %d %d\n"
230 "ticks/char = %lld\n"
232 (double) ticks_per_sec
/ (r
->ticks_per_char
* r
->total_chars
),
250 static uint8_t vga_precise_retrace(VGAState
*s
)
252 struct vga_precise_retrace
*r
= &s
->retrace_info
.precise
;
253 uint8_t val
= s
->st01
& ~(ST01_V_RETRACE
| ST01_DISP_ENABLE
);
255 if (r
->total_chars
) {
256 int cur_line
, cur_line_char
, cur_char
;
259 cur_tick
= qemu_get_clock(vm_clock
);
261 cur_char
= (cur_tick
/ r
->ticks_per_char
) % r
->total_chars
;
262 cur_line
= cur_char
/ r
->htotal
;
264 if (cur_line
>= r
->vstart
&& cur_line
<= r
->vend
) {
265 val
|= ST01_V_RETRACE
| ST01_DISP_ENABLE
;
267 cur_line_char
= cur_char
% r
->htotal
;
268 if (cur_line_char
>= r
->hstart
&& cur_line_char
<= r
->hend
) {
269 val
|= ST01_DISP_ENABLE
;
275 return s
->st01
^ (ST01_V_RETRACE
| ST01_DISP_ENABLE
);
279 static uint8_t vga_dumb_retrace(VGAState
*s
)
281 return s
->st01
^ (ST01_V_RETRACE
| ST01_DISP_ENABLE
);
284 static uint32_t vga_ioport_read(void *opaque
, uint32_t addr
)
286 VGAState
*s
= opaque
;
289 /* check port range access depending on color/monochrome mode */
290 if ((addr
>= 0x3b0 && addr
<= 0x3bf && (s
->msr
& MSR_COLOR_EMULATION
)) ||
291 (addr
>= 0x3d0 && addr
<= 0x3df && !(s
->msr
& MSR_COLOR_EMULATION
))) {
296 if (s
->ar_flip_flop
== 0) {
303 index
= s
->ar_index
& 0x1f;
316 val
= s
->sr
[s
->sr_index
];
318 printf("vga: read SR%x = 0x%02x\n", s
->sr_index
, val
);
325 val
= s
->dac_write_index
;
328 val
= s
->palette
[s
->dac_read_index
* 3 + s
->dac_sub_index
];
329 if (++s
->dac_sub_index
== 3) {
330 s
->dac_sub_index
= 0;
344 val
= s
->gr
[s
->gr_index
];
346 printf("vga: read GR%x = 0x%02x\n", s
->gr_index
, val
);
355 val
= s
->cr
[s
->cr_index
];
357 printf("vga: read CR%x = 0x%02x\n", s
->cr_index
, val
);
362 /* just toggle to fool polling */
363 val
= s
->st01
= s
->retrace(s
);
371 #if defined(DEBUG_VGA)
372 printf("VGA: read addr=0x%04x data=0x%02x\n", addr
, val
);
377 static void vga_ioport_write(void *opaque
, uint32_t addr
, uint32_t val
)
379 VGAState
*s
= opaque
;
382 /* check port range access depending on color/monochrome mode */
383 if ((addr
>= 0x3b0 && addr
<= 0x3bf && (s
->msr
& MSR_COLOR_EMULATION
)) ||
384 (addr
>= 0x3d0 && addr
<= 0x3df && !(s
->msr
& MSR_COLOR_EMULATION
)))
388 printf("VGA: write addr=0x%04x data=0x%02x\n", addr
, val
);
393 if (s
->ar_flip_flop
== 0) {
397 index
= s
->ar_index
& 0x1f;
400 s
->ar
[index
] = val
& 0x3f;
403 s
->ar
[index
] = val
& ~0x10;
409 s
->ar
[index
] = val
& ~0xc0;
412 s
->ar
[index
] = val
& ~0xf0;
415 s
->ar
[index
] = val
& ~0xf0;
421 s
->ar_flip_flop
^= 1;
424 s
->msr
= val
& ~0x10;
425 s
->update_retrace_info(s
);
428 s
->sr_index
= val
& 7;
432 printf("vga: write SR%x = 0x%02x\n", s
->sr_index
, val
);
434 s
->sr
[s
->sr_index
] = val
& sr_mask
[s
->sr_index
];
435 if (s
->sr_index
== 1) s
->update_retrace_info(s
);
438 s
->dac_read_index
= val
;
439 s
->dac_sub_index
= 0;
443 s
->dac_write_index
= val
;
444 s
->dac_sub_index
= 0;
448 s
->dac_cache
[s
->dac_sub_index
] = val
;
449 if (++s
->dac_sub_index
== 3) {
450 memcpy(&s
->palette
[s
->dac_write_index
* 3], s
->dac_cache
, 3);
451 s
->dac_sub_index
= 0;
452 s
->dac_write_index
++;
456 s
->gr_index
= val
& 0x0f;
460 printf("vga: write GR%x = 0x%02x\n", s
->gr_index
, val
);
462 s
->gr
[s
->gr_index
] = val
& gr_mask
[s
->gr_index
];
471 printf("vga: write CR%x = 0x%02x\n", s
->cr_index
, val
);
473 /* handle CR0-7 protection */
474 if ((s
->cr
[0x11] & 0x80) && s
->cr_index
<= 7) {
475 /* can always write bit 4 of CR7 */
476 if (s
->cr_index
== 7)
477 s
->cr
[7] = (s
->cr
[7] & ~0x10) | (val
& 0x10);
480 switch(s
->cr_index
) {
481 case 0x01: /* horizontal display end */
486 case 0x12: /* vertical display end */
487 s
->cr
[s
->cr_index
] = val
;
490 s
->cr
[s
->cr_index
] = val
;
494 switch(s
->cr_index
) {
502 s
->update_retrace_info(s
);
513 #ifdef CONFIG_BOCHS_VBE
514 static uint32_t vbe_ioport_read_index(void *opaque
, uint32_t addr
)
516 VGAState
*s
= opaque
;
522 static uint32_t vbe_ioport_read_data(void *opaque
, uint32_t addr
)
524 VGAState
*s
= opaque
;
527 if (s
->vbe_index
<= VBE_DISPI_INDEX_NB
) {
528 if (s
->vbe_regs
[VBE_DISPI_INDEX_ENABLE
] & VBE_DISPI_GETCAPS
) {
529 switch(s
->vbe_index
) {
530 /* XXX: do not hardcode ? */
531 case VBE_DISPI_INDEX_XRES
:
532 val
= VBE_DISPI_MAX_XRES
;
534 case VBE_DISPI_INDEX_YRES
:
535 val
= VBE_DISPI_MAX_YRES
;
537 case VBE_DISPI_INDEX_BPP
:
538 val
= VBE_DISPI_MAX_BPP
;
541 val
= s
->vbe_regs
[s
->vbe_index
];
545 val
= s
->vbe_regs
[s
->vbe_index
];
550 #ifdef DEBUG_BOCHS_VBE
551 printf("VBE: read index=0x%x val=0x%x\n", s
->vbe_index
, val
);
556 static void vbe_ioport_write_index(void *opaque
, uint32_t addr
, uint32_t val
)
558 VGAState
*s
= opaque
;
562 static void vbe_ioport_write_data(void *opaque
, uint32_t addr
, uint32_t val
)
564 VGAState
*s
= opaque
;
566 if (s
->vbe_index
<= VBE_DISPI_INDEX_NB
) {
567 #ifdef DEBUG_BOCHS_VBE
568 printf("VBE: write index=0x%x val=0x%x\n", s
->vbe_index
, val
);
570 switch(s
->vbe_index
) {
571 case VBE_DISPI_INDEX_ID
:
572 if (val
== VBE_DISPI_ID0
||
573 val
== VBE_DISPI_ID1
||
574 val
== VBE_DISPI_ID2
||
575 val
== VBE_DISPI_ID3
||
576 val
== VBE_DISPI_ID4
) {
577 s
->vbe_regs
[s
->vbe_index
] = val
;
580 case VBE_DISPI_INDEX_XRES
:
581 if ((val
<= VBE_DISPI_MAX_XRES
) && ((val
& 7) == 0)) {
582 s
->vbe_regs
[s
->vbe_index
] = val
;
585 case VBE_DISPI_INDEX_YRES
:
586 if (val
<= VBE_DISPI_MAX_YRES
) {
587 s
->vbe_regs
[s
->vbe_index
] = val
;
590 case VBE_DISPI_INDEX_BPP
:
593 if (val
== 4 || val
== 8 || val
== 15 ||
594 val
== 16 || val
== 24 || val
== 32) {
595 s
->vbe_regs
[s
->vbe_index
] = val
;
598 case VBE_DISPI_INDEX_BANK
:
599 if (s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] == 4) {
600 val
&= (s
->vbe_bank_mask
>> 2);
602 val
&= s
->vbe_bank_mask
;
604 s
->vbe_regs
[s
->vbe_index
] = val
;
605 s
->bank_offset
= (val
<< 16);
607 case VBE_DISPI_INDEX_ENABLE
:
608 if ((val
& VBE_DISPI_ENABLED
) &&
609 !(s
->vbe_regs
[VBE_DISPI_INDEX_ENABLE
] & VBE_DISPI_ENABLED
)) {
610 int h
, shift_control
;
612 s
->vbe_regs
[VBE_DISPI_INDEX_VIRT_WIDTH
] =
613 s
->vbe_regs
[VBE_DISPI_INDEX_XRES
];
614 s
->vbe_regs
[VBE_DISPI_INDEX_VIRT_HEIGHT
] =
615 s
->vbe_regs
[VBE_DISPI_INDEX_YRES
];
616 s
->vbe_regs
[VBE_DISPI_INDEX_X_OFFSET
] = 0;
617 s
->vbe_regs
[VBE_DISPI_INDEX_Y_OFFSET
] = 0;
619 if (s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] == 4)
620 s
->vbe_line_offset
= s
->vbe_regs
[VBE_DISPI_INDEX_XRES
] >> 1;
622 s
->vbe_line_offset
= s
->vbe_regs
[VBE_DISPI_INDEX_XRES
] *
623 ((s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] + 7) >> 3);
624 s
->vbe_start_addr
= 0;
626 /* clear the screen (should be done in BIOS) */
627 if (!(val
& VBE_DISPI_NOCLEARMEM
)) {
628 memset(s
->vram_ptr
, 0,
629 s
->vbe_regs
[VBE_DISPI_INDEX_YRES
] * s
->vbe_line_offset
);
632 /* we initialize the VGA graphic mode (should be done
634 s
->gr
[0x06] = (s
->gr
[0x06] & ~0x0c) | 0x05; /* graphic mode + memory map 1 */
635 s
->cr
[0x17] |= 3; /* no CGA modes */
636 s
->cr
[0x13] = s
->vbe_line_offset
>> 3;
638 s
->cr
[0x01] = (s
->vbe_regs
[VBE_DISPI_INDEX_XRES
] >> 3) - 1;
639 /* height (only meaningful if < 1024) */
640 h
= s
->vbe_regs
[VBE_DISPI_INDEX_YRES
] - 1;
642 s
->cr
[0x07] = (s
->cr
[0x07] & ~0x42) |
643 ((h
>> 7) & 0x02) | ((h
>> 3) & 0x40);
644 /* line compare to 1023 */
649 if (s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] == 4) {
651 s
->sr
[0x01] &= ~8; /* no double line */
654 s
->sr
[4] |= 0x08; /* set chain 4 mode */
655 s
->sr
[2] |= 0x0f; /* activate all planes */
657 s
->gr
[0x05] = (s
->gr
[0x05] & ~0x60) | (shift_control
<< 5);
658 s
->cr
[0x09] &= ~0x9f; /* no double scan */
660 /* XXX: the bios should do that */
663 s
->dac_8bit
= (val
& VBE_DISPI_8BIT_DAC
) > 0;
664 s
->vbe_regs
[s
->vbe_index
] = val
;
666 case VBE_DISPI_INDEX_VIRT_WIDTH
:
668 int w
, h
, line_offset
;
670 if (val
< s
->vbe_regs
[VBE_DISPI_INDEX_XRES
])
673 if (s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] == 4)
674 line_offset
= w
>> 1;
676 line_offset
= w
* ((s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] + 7) >> 3);
677 h
= s
->vram_size
/ line_offset
;
678 /* XXX: support weird bochs semantics ? */
679 if (h
< s
->vbe_regs
[VBE_DISPI_INDEX_YRES
])
681 s
->vbe_regs
[VBE_DISPI_INDEX_VIRT_WIDTH
] = w
;
682 s
->vbe_regs
[VBE_DISPI_INDEX_VIRT_HEIGHT
] = h
;
683 s
->vbe_line_offset
= line_offset
;
686 case VBE_DISPI_INDEX_X_OFFSET
:
687 case VBE_DISPI_INDEX_Y_OFFSET
:
690 s
->vbe_regs
[s
->vbe_index
] = val
;
691 s
->vbe_start_addr
= s
->vbe_line_offset
* s
->vbe_regs
[VBE_DISPI_INDEX_Y_OFFSET
];
692 x
= s
->vbe_regs
[VBE_DISPI_INDEX_X_OFFSET
];
693 if (s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] == 4)
694 s
->vbe_start_addr
+= x
>> 1;
696 s
->vbe_start_addr
+= x
* ((s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] + 7) >> 3);
697 s
->vbe_start_addr
>>= 2;
707 /* called for accesses between 0xa0000 and 0xc0000 */
708 uint32_t vga_mem_readb(void *opaque
, target_phys_addr_t addr
)
710 VGAState
*s
= opaque
;
711 int memory_map_mode
, plane
;
714 /* convert to VGA memory offset */
715 memory_map_mode
= (s
->gr
[6] >> 2) & 3;
717 switch(memory_map_mode
) {
723 addr
+= s
->bank_offset
;
738 if (s
->sr
[4] & 0x08) {
739 /* chain 4 mode : simplest access */
740 ret
= s
->vram_ptr
[addr
];
741 } else if (s
->gr
[5] & 0x10) {
742 /* odd/even mode (aka text mode mapping) */
743 plane
= (s
->gr
[4] & 2) | (addr
& 1);
744 ret
= s
->vram_ptr
[((addr
& ~1) << 1) | plane
];
746 /* standard VGA latched access */
747 s
->latch
= ((uint32_t *)s
->vram_ptr
)[addr
];
749 if (!(s
->gr
[5] & 0x08)) {
752 ret
= GET_PLANE(s
->latch
, plane
);
755 ret
= (s
->latch
^ mask16
[s
->gr
[2]]) & mask16
[s
->gr
[7]];
764 static uint32_t vga_mem_readw(void *opaque
, target_phys_addr_t addr
)
767 #ifdef TARGET_WORDS_BIGENDIAN
768 v
= vga_mem_readb(opaque
, addr
) << 8;
769 v
|= vga_mem_readb(opaque
, addr
+ 1);
771 v
= vga_mem_readb(opaque
, addr
);
772 v
|= vga_mem_readb(opaque
, addr
+ 1) << 8;
777 static uint32_t vga_mem_readl(void *opaque
, target_phys_addr_t addr
)
780 #ifdef TARGET_WORDS_BIGENDIAN
781 v
= vga_mem_readb(opaque
, addr
) << 24;
782 v
|= vga_mem_readb(opaque
, addr
+ 1) << 16;
783 v
|= vga_mem_readb(opaque
, addr
+ 2) << 8;
784 v
|= vga_mem_readb(opaque
, addr
+ 3);
786 v
= vga_mem_readb(opaque
, addr
);
787 v
|= vga_mem_readb(opaque
, addr
+ 1) << 8;
788 v
|= vga_mem_readb(opaque
, addr
+ 2) << 16;
789 v
|= vga_mem_readb(opaque
, addr
+ 3) << 24;
794 /* called for accesses between 0xa0000 and 0xc0000 */
795 void vga_mem_writeb(void *opaque
, target_phys_addr_t addr
, uint32_t val
)
797 VGAState
*s
= opaque
;
798 int memory_map_mode
, plane
, write_mode
, b
, func_select
, mask
;
799 uint32_t write_mask
, bit_mask
, set_mask
;
802 printf("vga: [0x%x] = 0x%02x\n", addr
, val
);
804 /* convert to VGA memory offset */
805 memory_map_mode
= (s
->gr
[6] >> 2) & 3;
807 switch(memory_map_mode
) {
813 addr
+= s
->bank_offset
;
828 if (s
->sr
[4] & 0x08) {
829 /* chain 4 mode : simplest access */
832 if (s
->sr
[2] & mask
) {
833 s
->vram_ptr
[addr
] = val
;
835 printf("vga: chain4: [0x%x]\n", addr
);
837 s
->plane_updated
|= mask
; /* only used to detect font change */
838 cpu_physical_memory_set_dirty(s
->vram_offset
+ addr
);
840 } else if (s
->gr
[5] & 0x10) {
841 /* odd/even mode (aka text mode mapping) */
842 plane
= (s
->gr
[4] & 2) | (addr
& 1);
844 if (s
->sr
[2] & mask
) {
845 addr
= ((addr
& ~1) << 1) | plane
;
846 s
->vram_ptr
[addr
] = val
;
848 printf("vga: odd/even: [0x%x]\n", addr
);
850 s
->plane_updated
|= mask
; /* only used to detect font change */
851 cpu_physical_memory_set_dirty(s
->vram_offset
+ addr
);
854 /* standard VGA latched access */
855 write_mode
= s
->gr
[5] & 3;
861 val
= ((val
>> b
) | (val
<< (8 - b
))) & 0xff;
865 /* apply set/reset mask */
866 set_mask
= mask16
[s
->gr
[1]];
867 val
= (val
& ~set_mask
) | (mask16
[s
->gr
[0]] & set_mask
);
874 val
= mask16
[val
& 0x0f];
880 val
= (val
>> b
) | (val
<< (8 - b
));
882 bit_mask
= s
->gr
[8] & val
;
883 val
= mask16
[s
->gr
[0]];
887 /* apply logical operation */
888 func_select
= s
->gr
[3] >> 3;
889 switch(func_select
) {
909 bit_mask
|= bit_mask
<< 8;
910 bit_mask
|= bit_mask
<< 16;
911 val
= (val
& bit_mask
) | (s
->latch
& ~bit_mask
);
914 /* mask data according to sr[2] */
916 s
->plane_updated
|= mask
; /* only used to detect font change */
917 write_mask
= mask16
[mask
];
918 ((uint32_t *)s
->vram_ptr
)[addr
] =
919 (((uint32_t *)s
->vram_ptr
)[addr
] & ~write_mask
) |
922 printf("vga: latch: [0x%x] mask=0x%08x val=0x%08x\n",
923 addr
* 4, write_mask
, val
);
925 cpu_physical_memory_set_dirty(s
->vram_offset
+ (addr
<< 2));
929 static void vga_mem_writew(void *opaque
, target_phys_addr_t addr
, uint32_t val
)
931 #ifdef TARGET_WORDS_BIGENDIAN
932 vga_mem_writeb(opaque
, addr
, (val
>> 8) & 0xff);
933 vga_mem_writeb(opaque
, addr
+ 1, val
& 0xff);
935 vga_mem_writeb(opaque
, addr
, val
& 0xff);
936 vga_mem_writeb(opaque
, addr
+ 1, (val
>> 8) & 0xff);
940 static void vga_mem_writel(void *opaque
, target_phys_addr_t addr
, uint32_t val
)
942 #ifdef TARGET_WORDS_BIGENDIAN
943 vga_mem_writeb(opaque
, addr
, (val
>> 24) & 0xff);
944 vga_mem_writeb(opaque
, addr
+ 1, (val
>> 16) & 0xff);
945 vga_mem_writeb(opaque
, addr
+ 2, (val
>> 8) & 0xff);
946 vga_mem_writeb(opaque
, addr
+ 3, val
& 0xff);
948 vga_mem_writeb(opaque
, addr
, val
& 0xff);
949 vga_mem_writeb(opaque
, addr
+ 1, (val
>> 8) & 0xff);
950 vga_mem_writeb(opaque
, addr
+ 2, (val
>> 16) & 0xff);
951 vga_mem_writeb(opaque
, addr
+ 3, (val
>> 24) & 0xff);
955 typedef void vga_draw_glyph8_func(uint8_t *d
, int linesize
,
956 const uint8_t *font_ptr
, int h
,
957 uint32_t fgcol
, uint32_t bgcol
);
958 typedef void vga_draw_glyph9_func(uint8_t *d
, int linesize
,
959 const uint8_t *font_ptr
, int h
,
960 uint32_t fgcol
, uint32_t bgcol
, int dup9
);
961 typedef void vga_draw_line_func(VGAState
*s1
, uint8_t *d
,
962 const uint8_t *s
, int width
);
965 #include "vga_template.h"
968 #include "vga_template.h"
972 #include "vga_template.h"
975 #include "vga_template.h"
979 #include "vga_template.h"
982 #include "vga_template.h"
986 #include "vga_template.h"
988 static unsigned int rgb_to_pixel8_dup(unsigned int r
, unsigned int g
, unsigned b
)
991 col
= rgb_to_pixel8(r
, g
, b
);
997 static unsigned int rgb_to_pixel15_dup(unsigned int r
, unsigned int g
, unsigned b
)
1000 col
= rgb_to_pixel15(r
, g
, b
);
1005 static unsigned int rgb_to_pixel15bgr_dup(unsigned int r
, unsigned int g
,
1009 col
= rgb_to_pixel15bgr(r
, g
, b
);
1014 static unsigned int rgb_to_pixel16_dup(unsigned int r
, unsigned int g
, unsigned b
)
1017 col
= rgb_to_pixel16(r
, g
, b
);
1022 static unsigned int rgb_to_pixel16bgr_dup(unsigned int r
, unsigned int g
,
1026 col
= rgb_to_pixel16bgr(r
, g
, b
);
1031 static unsigned int rgb_to_pixel32_dup(unsigned int r
, unsigned int g
, unsigned b
)
1034 col
= rgb_to_pixel32(r
, g
, b
);
1038 static unsigned int rgb_to_pixel32bgr_dup(unsigned int r
, unsigned int g
, unsigned b
)
1041 col
= rgb_to_pixel32bgr(r
, g
, b
);
1045 /* return true if the palette was modified */
1046 static int update_palette16(VGAState
*s
)
1049 uint32_t v
, col
, *palette
;
1052 palette
= s
->last_palette
;
1053 for(i
= 0; i
< 16; i
++) {
1055 if (s
->ar
[0x10] & 0x80)
1056 v
= ((s
->ar
[0x14] & 0xf) << 4) | (v
& 0xf);
1058 v
= ((s
->ar
[0x14] & 0xc) << 4) | (v
& 0x3f);
1060 col
= s
->rgb_to_pixel(c6_to_8(s
->palette
[v
]),
1061 c6_to_8(s
->palette
[v
+ 1]),
1062 c6_to_8(s
->palette
[v
+ 2]));
1063 if (col
!= palette
[i
]) {
1071 /* return true if the palette was modified */
1072 static int update_palette256(VGAState
*s
)
1075 uint32_t v
, col
, *palette
;
1078 palette
= s
->last_palette
;
1080 for(i
= 0; i
< 256; i
++) {
1082 col
= s
->rgb_to_pixel(s
->palette
[v
],
1086 col
= s
->rgb_to_pixel(c6_to_8(s
->palette
[v
]),
1087 c6_to_8(s
->palette
[v
+ 1]),
1088 c6_to_8(s
->palette
[v
+ 2]));
1090 if (col
!= palette
[i
]) {
1099 static void vga_get_offsets(VGAState
*s
,
1100 uint32_t *pline_offset
,
1101 uint32_t *pstart_addr
,
1102 uint32_t *pline_compare
)
1104 uint32_t start_addr
, line_offset
, line_compare
;
1105 #ifdef CONFIG_BOCHS_VBE
1106 if (s
->vbe_regs
[VBE_DISPI_INDEX_ENABLE
] & VBE_DISPI_ENABLED
) {
1107 line_offset
= s
->vbe_line_offset
;
1108 start_addr
= s
->vbe_start_addr
;
1109 line_compare
= 65535;
1113 /* compute line_offset in bytes */
1114 line_offset
= s
->cr
[0x13];
1117 /* starting address */
1118 start_addr
= s
->cr
[0x0d] | (s
->cr
[0x0c] << 8);
1121 line_compare
= s
->cr
[0x18] |
1122 ((s
->cr
[0x07] & 0x10) << 4) |
1123 ((s
->cr
[0x09] & 0x40) << 3);
1125 *pline_offset
= line_offset
;
1126 *pstart_addr
= start_addr
;
1127 *pline_compare
= line_compare
;
1130 /* update start_addr and line_offset. Return TRUE if modified */
1131 static int update_basic_params(VGAState
*s
)
1134 uint32_t start_addr
, line_offset
, line_compare
;
1138 s
->get_offsets(s
, &line_offset
, &start_addr
, &line_compare
);
1140 if (line_offset
!= s
->line_offset
||
1141 start_addr
!= s
->start_addr
||
1142 line_compare
!= s
->line_compare
) {
1143 s
->line_offset
= line_offset
;
1144 s
->start_addr
= start_addr
;
1145 s
->line_compare
= line_compare
;
1153 static inline int get_depth_index(DisplayState
*s
)
1155 switch(ds_get_bits_per_pixel(s
)) {
1168 static vga_draw_glyph8_func
*vga_draw_glyph8_table
[NB_DEPTHS
] = {
1178 static vga_draw_glyph8_func
*vga_draw_glyph16_table
[NB_DEPTHS
] = {
1180 vga_draw_glyph16_16
,
1181 vga_draw_glyph16_16
,
1182 vga_draw_glyph16_32
,
1183 vga_draw_glyph16_32
,
1184 vga_draw_glyph16_16
,
1185 vga_draw_glyph16_16
,
1188 static vga_draw_glyph9_func
*vga_draw_glyph9_table
[NB_DEPTHS
] = {
1198 static const uint8_t cursor_glyph
[32 * 4] = {
1199 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1200 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1201 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1202 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1203 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1204 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1205 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1206 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1207 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1208 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1209 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1210 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1211 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1212 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1213 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1214 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1217 static void vga_get_text_resolution(VGAState
*s
, int *pwidth
, int *pheight
,
1218 int *pcwidth
, int *pcheight
)
1220 int width
, cwidth
, height
, cheight
;
1222 /* total width & height */
1223 cheight
= (s
->cr
[9] & 0x1f) + 1;
1225 if (!(s
->sr
[1] & 0x01))
1227 if (s
->sr
[1] & 0x08)
1228 cwidth
= 16; /* NOTE: no 18 pixel wide */
1229 width
= (s
->cr
[0x01] + 1);
1230 if (s
->cr
[0x06] == 100) {
1231 /* ugly hack for CGA 160x100x16 - explain me the logic */
1234 height
= s
->cr
[0x12] |
1235 ((s
->cr
[0x07] & 0x02) << 7) |
1236 ((s
->cr
[0x07] & 0x40) << 3);
1237 height
= (height
+ 1) / cheight
;
1243 *pcheight
= cheight
;
1246 typedef unsigned int rgb_to_pixel_dup_func(unsigned int r
, unsigned int g
, unsigned b
);
1248 static rgb_to_pixel_dup_func
*rgb_to_pixel_dup_table
[NB_DEPTHS
] = {
1253 rgb_to_pixel32bgr_dup
,
1254 rgb_to_pixel15bgr_dup
,
1255 rgb_to_pixel16bgr_dup
,
1266 static void vga_draw_text(VGAState
*s
, int full_update
)
1268 int cx
, cy
, cheight
, cw
, ch
, cattr
, height
, width
, ch_attr
;
1269 int cx_min
, cx_max
, linesize
, x_incr
;
1270 uint32_t offset
, fgcol
, bgcol
, v
, cursor_offset
;
1271 uint8_t *d1
, *d
, *src
, *s1
, *dest
, *cursor_ptr
;
1272 const uint8_t *font_ptr
, *font_base
[2];
1273 int dup9
, line_offset
, depth_index
;
1275 uint32_t *ch_attr_ptr
;
1276 vga_draw_glyph8_func
*vga_draw_glyph8
;
1277 vga_draw_glyph9_func
*vga_draw_glyph9
;
1279 vga_dirty_log_stop(s
);
1281 /* compute font data address (in plane 2) */
1283 offset
= (((v
>> 4) & 1) | ((v
<< 1) & 6)) * 8192 * 4 + 2;
1284 if (offset
!= s
->font_offsets
[0]) {
1285 s
->font_offsets
[0] = offset
;
1288 font_base
[0] = s
->vram_ptr
+ offset
;
1290 offset
= (((v
>> 5) & 1) | ((v
>> 1) & 6)) * 8192 * 4 + 2;
1291 font_base
[1] = s
->vram_ptr
+ offset
;
1292 if (offset
!= s
->font_offsets
[1]) {
1293 s
->font_offsets
[1] = offset
;
1296 if (s
->plane_updated
& (1 << 2)) {
1297 /* if the plane 2 was modified since the last display, it
1298 indicates the font may have been modified */
1299 s
->plane_updated
= 0;
1302 full_update
|= update_basic_params(s
);
1304 line_offset
= s
->line_offset
;
1305 s1
= s
->vram_ptr
+ (s
->start_addr
* 4);
1307 vga_get_text_resolution(s
, &width
, &height
, &cw
, &cheight
);
1308 x_incr
= cw
* ((ds_get_bits_per_pixel(s
->ds
) + 7) >> 3);
1309 if ((height
* width
) > CH_ATTR_SIZE
) {
1310 /* better than nothing: exit if transient size is too big */
1314 if (width
!= s
->last_width
|| height
!= s
->last_height
||
1315 cw
!= s
->last_cw
|| cheight
!= s
->last_ch
|| s
->last_depth
) {
1316 s
->last_scr_width
= width
* cw
;
1317 s
->last_scr_height
= height
* cheight
;
1318 qemu_console_resize(s
->ds
, s
->last_scr_width
, s
->last_scr_height
);
1320 s
->last_width
= width
;
1321 s
->last_height
= height
;
1322 s
->last_ch
= cheight
;
1327 rgb_to_pixel_dup_table
[get_depth_index(s
->ds
)];
1328 full_update
|= update_palette16(s
);
1329 palette
= s
->last_palette
;
1330 x_incr
= cw
* ((ds_get_bits_per_pixel(s
->ds
) + 7) >> 3);
1332 cursor_offset
= ((s
->cr
[0x0e] << 8) | s
->cr
[0x0f]) - s
->start_addr
;
1333 if (cursor_offset
!= s
->cursor_offset
||
1334 s
->cr
[0xa] != s
->cursor_start
||
1335 s
->cr
[0xb] != s
->cursor_end
) {
1336 /* if the cursor position changed, we update the old and new
1338 if (s
->cursor_offset
< CH_ATTR_SIZE
)
1339 s
->last_ch_attr
[s
->cursor_offset
] = -1;
1340 if (cursor_offset
< CH_ATTR_SIZE
)
1341 s
->last_ch_attr
[cursor_offset
] = -1;
1342 s
->cursor_offset
= cursor_offset
;
1343 s
->cursor_start
= s
->cr
[0xa];
1344 s
->cursor_end
= s
->cr
[0xb];
1346 cursor_ptr
= s
->vram_ptr
+ (s
->start_addr
+ cursor_offset
) * 4;
1348 depth_index
= get_depth_index(s
->ds
);
1350 vga_draw_glyph8
= vga_draw_glyph16_table
[depth_index
];
1352 vga_draw_glyph8
= vga_draw_glyph8_table
[depth_index
];
1353 vga_draw_glyph9
= vga_draw_glyph9_table
[depth_index
];
1355 dest
= ds_get_data(s
->ds
);
1356 linesize
= ds_get_linesize(s
->ds
);
1357 ch_attr_ptr
= s
->last_ch_attr
;
1358 for(cy
= 0; cy
< height
; cy
++) {
1363 for(cx
= 0; cx
< width
; cx
++) {
1364 ch_attr
= *(uint16_t *)src
;
1365 if (full_update
|| ch_attr
!= *ch_attr_ptr
) {
1370 *ch_attr_ptr
= ch_attr
;
1371 #ifdef WORDS_BIGENDIAN
1373 cattr
= ch_attr
& 0xff;
1375 ch
= ch_attr
& 0xff;
1376 cattr
= ch_attr
>> 8;
1378 font_ptr
= font_base
[(cattr
>> 3) & 1];
1379 font_ptr
+= 32 * 4 * ch
;
1380 bgcol
= palette
[cattr
>> 4];
1381 fgcol
= palette
[cattr
& 0x0f];
1383 vga_draw_glyph8(d1
, linesize
,
1384 font_ptr
, cheight
, fgcol
, bgcol
);
1387 if (ch
>= 0xb0 && ch
<= 0xdf && (s
->ar
[0x10] & 0x04))
1389 vga_draw_glyph9(d1
, linesize
,
1390 font_ptr
, cheight
, fgcol
, bgcol
, dup9
);
1392 if (src
== cursor_ptr
&&
1393 !(s
->cr
[0x0a] & 0x20)) {
1394 int line_start
, line_last
, h
;
1395 /* draw the cursor */
1396 line_start
= s
->cr
[0x0a] & 0x1f;
1397 line_last
= s
->cr
[0x0b] & 0x1f;
1398 /* XXX: check that */
1399 if (line_last
> cheight
- 1)
1400 line_last
= cheight
- 1;
1401 if (line_last
>= line_start
&& line_start
< cheight
) {
1402 h
= line_last
- line_start
+ 1;
1403 d
= d1
+ linesize
* line_start
;
1405 vga_draw_glyph8(d
, linesize
,
1406 cursor_glyph
, h
, fgcol
, bgcol
);
1408 vga_draw_glyph9(d
, linesize
,
1409 cursor_glyph
, h
, fgcol
, bgcol
, 1);
1419 dpy_update(s
->ds
, cx_min
* cw
, cy
* cheight
,
1420 (cx_max
- cx_min
+ 1) * cw
, cheight
);
1422 dest
+= linesize
* cheight
;
1441 static vga_draw_line_func
*vga_draw_line_table
[NB_DEPTHS
* VGA_DRAW_LINE_NB
] = {
1451 vga_draw_line2d2_16
,
1452 vga_draw_line2d2_16
,
1453 vga_draw_line2d2_32
,
1454 vga_draw_line2d2_32
,
1455 vga_draw_line2d2_16
,
1456 vga_draw_line2d2_16
,
1467 vga_draw_line4d2_16
,
1468 vga_draw_line4d2_16
,
1469 vga_draw_line4d2_32
,
1470 vga_draw_line4d2_32
,
1471 vga_draw_line4d2_16
,
1472 vga_draw_line4d2_16
,
1475 vga_draw_line8d2_16
,
1476 vga_draw_line8d2_16
,
1477 vga_draw_line8d2_32
,
1478 vga_draw_line8d2_32
,
1479 vga_draw_line8d2_16
,
1480 vga_draw_line8d2_16
,
1494 vga_draw_line15_32bgr
,
1495 vga_draw_line15_15bgr
,
1496 vga_draw_line15_16bgr
,
1502 vga_draw_line16_32bgr
,
1503 vga_draw_line16_15bgr
,
1504 vga_draw_line16_16bgr
,
1510 vga_draw_line24_32bgr
,
1511 vga_draw_line24_15bgr
,
1512 vga_draw_line24_16bgr
,
1518 vga_draw_line32_32bgr
,
1519 vga_draw_line32_15bgr
,
1520 vga_draw_line32_16bgr
,
1523 static int vga_get_bpp(VGAState
*s
)
1526 #ifdef CONFIG_BOCHS_VBE
1527 if (s
->vbe_regs
[VBE_DISPI_INDEX_ENABLE
] & VBE_DISPI_ENABLED
) {
1528 ret
= s
->vbe_regs
[VBE_DISPI_INDEX_BPP
];
1537 static void vga_get_resolution(VGAState
*s
, int *pwidth
, int *pheight
)
1541 #ifdef CONFIG_BOCHS_VBE
1542 if (s
->vbe_regs
[VBE_DISPI_INDEX_ENABLE
] & VBE_DISPI_ENABLED
) {
1543 width
= s
->vbe_regs
[VBE_DISPI_INDEX_XRES
];
1544 height
= s
->vbe_regs
[VBE_DISPI_INDEX_YRES
];
1548 width
= (s
->cr
[0x01] + 1) * 8;
1549 height
= s
->cr
[0x12] |
1550 ((s
->cr
[0x07] & 0x02) << 7) |
1551 ((s
->cr
[0x07] & 0x40) << 3);
1552 height
= (height
+ 1);
1558 void vga_invalidate_scanlines(VGAState
*s
, int y1
, int y2
)
1561 if (y1
>= VGA_MAX_HEIGHT
)
1563 if (y2
>= VGA_MAX_HEIGHT
)
1564 y2
= VGA_MAX_HEIGHT
;
1565 for(y
= y1
; y
< y2
; y
++) {
1566 s
->invalidated_y_table
[y
>> 5] |= 1 << (y
& 0x1f);
1570 static void vga_sync_dirty_bitmap(VGAState
*s
)
1573 cpu_physical_sync_dirty_bitmap(s
->map_addr
, s
->map_end
);
1575 if (s
->lfb_vram_mapped
) {
1576 cpu_physical_sync_dirty_bitmap(isa_mem_base
+ 0xa0000, 0xa8000);
1577 cpu_physical_sync_dirty_bitmap(isa_mem_base
+ 0xa8000, 0xb0000);
1579 vga_dirty_log_start(s
);
1585 static void vga_draw_graphic(VGAState
*s
, int full_update
)
1587 int y1
, y
, update
, page_min
, page_max
, linesize
, y_start
, double_scan
, mask
, depth
;
1588 int width
, height
, shift_control
, line_offset
, page0
, page1
, bwidth
, bits
;
1589 int disp_width
, multi_scan
, multi_run
;
1591 uint32_t v
, addr1
, addr
;
1592 vga_draw_line_func
*vga_draw_line
;
1594 full_update
|= update_basic_params(s
);
1597 vga_sync_dirty_bitmap(s
);
1599 s
->get_resolution(s
, &width
, &height
);
1602 shift_control
= (s
->gr
[0x05] >> 5) & 3;
1603 double_scan
= (s
->cr
[0x09] >> 7);
1604 if (shift_control
!= 1) {
1605 multi_scan
= (((s
->cr
[0x09] & 0x1f) + 1) << double_scan
) - 1;
1607 /* in CGA modes, multi_scan is ignored */
1608 /* XXX: is it correct ? */
1609 multi_scan
= double_scan
;
1611 multi_run
= multi_scan
;
1612 if (shift_control
!= s
->shift_control
||
1613 double_scan
!= s
->double_scan
) {
1615 s
->shift_control
= shift_control
;
1616 s
->double_scan
= double_scan
;
1619 if (shift_control
== 0) {
1620 if (s
->sr
[0x01] & 8) {
1623 } else if (shift_control
== 1) {
1624 if (s
->sr
[0x01] & 8) {
1629 depth
= s
->get_bpp(s
);
1630 if (s
->line_offset
!= s
->last_line_offset
||
1631 disp_width
!= s
->last_width
||
1632 height
!= s
->last_height
||
1633 s
->last_depth
!= depth
) {
1634 #if defined(WORDS_BIGENDIAN) == defined(TARGET_WORDS_BIGENDIAN)
1635 if (depth
== 16 || depth
== 32) {
1639 if (is_graphic_console()) {
1640 qemu_free_displaysurface(s
->ds
->surface
);
1641 s
->ds
->surface
= qemu_create_displaysurface_from(disp_width
, height
, depth
,
1643 s
->vram_ptr
+ (s
->start_addr
* 4));
1644 #if defined(WORDS_BIGENDIAN) != defined(TARGET_WORDS_BIGENDIAN)
1645 s
->ds
->surface
->pf
= qemu_different_endianness_pixelformat(depth
);
1649 qemu_console_resize(s
->ds
, disp_width
, height
);
1652 qemu_console_resize(s
->ds
, disp_width
, height
);
1654 s
->last_scr_width
= disp_width
;
1655 s
->last_scr_height
= height
;
1656 s
->last_width
= disp_width
;
1657 s
->last_height
= height
;
1658 s
->last_line_offset
= s
->line_offset
;
1659 s
->last_depth
= depth
;
1661 } else if (is_graphic_console() && is_buffer_shared(s
->ds
->surface
) &&
1662 (full_update
|| s
->ds
->surface
->data
!= s
->vram_ptr
+ (s
->start_addr
* 4))) {
1663 s
->ds
->surface
->data
= s
->vram_ptr
+ (s
->start_addr
* 4);
1668 rgb_to_pixel_dup_table
[get_depth_index(s
->ds
)];
1670 if (shift_control
== 0) {
1671 full_update
|= update_palette16(s
);
1672 if (s
->sr
[0x01] & 8) {
1673 v
= VGA_DRAW_LINE4D2
;
1678 } else if (shift_control
== 1) {
1679 full_update
|= update_palette16(s
);
1680 if (s
->sr
[0x01] & 8) {
1681 v
= VGA_DRAW_LINE2D2
;
1687 switch(s
->get_bpp(s
)) {
1690 full_update
|= update_palette256(s
);
1691 v
= VGA_DRAW_LINE8D2
;
1695 full_update
|= update_palette256(s
);
1700 v
= VGA_DRAW_LINE15
;
1704 v
= VGA_DRAW_LINE16
;
1708 v
= VGA_DRAW_LINE24
;
1712 v
= VGA_DRAW_LINE32
;
1717 vga_draw_line
= vga_draw_line_table
[v
* NB_DEPTHS
+ get_depth_index(s
->ds
)];
1719 if (!is_buffer_shared(s
->ds
->surface
) && s
->cursor_invalidate
)
1720 s
->cursor_invalidate(s
);
1722 line_offset
= s
->line_offset
;
1724 printf("w=%d h=%d v=%d line_offset=%d cr[0x09]=0x%02x cr[0x17]=0x%02x linecmp=%d sr[0x01]=0x%02x\n",
1725 width
, height
, v
, line_offset
, s
->cr
[9], s
->cr
[0x17], s
->line_compare
, s
->sr
[0x01]);
1727 addr1
= (s
->start_addr
* 4);
1728 bwidth
= (width
* bits
+ 7) / 8;
1730 page_min
= 0x7fffffff;
1732 d
= ds_get_data(s
->ds
);
1733 linesize
= ds_get_linesize(s
->ds
);
1735 for(y
= 0; y
< height
; y
++) {
1737 if (!(s
->cr
[0x17] & 1)) {
1739 /* CGA compatibility handling */
1740 shift
= 14 + ((s
->cr
[0x17] >> 6) & 1);
1741 addr
= (addr
& ~(1 << shift
)) | ((y1
& 1) << shift
);
1743 if (!(s
->cr
[0x17] & 2)) {
1744 addr
= (addr
& ~0x8000) | ((y1
& 2) << 14);
1746 page0
= s
->vram_offset
+ (addr
& TARGET_PAGE_MASK
);
1747 page1
= s
->vram_offset
+ ((addr
+ bwidth
- 1) & TARGET_PAGE_MASK
);
1748 update
= full_update
|
1749 cpu_physical_memory_get_dirty(page0
, VGA_DIRTY_FLAG
) |
1750 cpu_physical_memory_get_dirty(page1
, VGA_DIRTY_FLAG
);
1751 if ((page1
- page0
) > TARGET_PAGE_SIZE
) {
1752 /* if wide line, can use another page */
1753 update
|= cpu_physical_memory_get_dirty(page0
+ TARGET_PAGE_SIZE
,
1756 /* explicit invalidation for the hardware cursor */
1757 update
|= (s
->invalidated_y_table
[y
>> 5] >> (y
& 0x1f)) & 1;
1761 if (page0
< page_min
)
1763 if (page1
> page_max
)
1765 if (!(is_buffer_shared(s
->ds
->surface
))) {
1766 vga_draw_line(s
, d
, s
->vram_ptr
+ addr
, width
);
1767 if (s
->cursor_draw_line
)
1768 s
->cursor_draw_line(s
, d
, y
);
1772 /* flush to display */
1773 dpy_update(s
->ds
, 0, y_start
,
1774 disp_width
, y
- y_start
);
1779 mask
= (s
->cr
[0x17] & 3) ^ 3;
1780 if ((y1
& mask
) == mask
)
1781 addr1
+= line_offset
;
1783 multi_run
= multi_scan
;
1787 /* line compare acts on the displayed lines */
1788 if (y
== s
->line_compare
)
1793 /* flush to display */
1794 dpy_update(s
->ds
, 0, y_start
,
1795 disp_width
, y
- y_start
);
1797 /* reset modified pages */
1798 if (page_max
!= -1) {
1799 cpu_physical_memory_reset_dirty(page_min
, page_max
+ TARGET_PAGE_SIZE
,
1802 memset(s
->invalidated_y_table
, 0, ((height
+ 31) >> 5) * 4);
1805 static void vga_draw_blank(VGAState
*s
, int full_update
)
1812 if (s
->last_scr_width
<= 0 || s
->last_scr_height
<= 0)
1814 vga_dirty_log_stop(s
);
1817 rgb_to_pixel_dup_table
[get_depth_index(s
->ds
)];
1818 if (ds_get_bits_per_pixel(s
->ds
) == 8)
1819 val
= s
->rgb_to_pixel(0, 0, 0);
1822 w
= s
->last_scr_width
* ((ds_get_bits_per_pixel(s
->ds
) + 7) >> 3);
1823 d
= ds_get_data(s
->ds
);
1824 for(i
= 0; i
< s
->last_scr_height
; i
++) {
1826 d
+= ds_get_linesize(s
->ds
);
1828 dpy_update(s
->ds
, 0, 0,
1829 s
->last_scr_width
, s
->last_scr_height
);
1832 #define GMODE_TEXT 0
1833 #define GMODE_GRAPH 1
1834 #define GMODE_BLANK 2
1836 static void vga_update_display(void *opaque
)
1838 VGAState
*s
= (VGAState
*)opaque
;
1839 int full_update
, graphic_mode
;
1841 if (ds_get_bits_per_pixel(s
->ds
) == 0) {
1845 if (!(s
->ar_index
& 0x20)) {
1846 graphic_mode
= GMODE_BLANK
;
1848 graphic_mode
= s
->gr
[6] & 1;
1850 if (graphic_mode
!= s
->graphic_mode
) {
1851 s
->graphic_mode
= graphic_mode
;
1854 switch(graphic_mode
) {
1856 vga_draw_text(s
, full_update
);
1859 vga_draw_graphic(s
, full_update
);
1863 vga_draw_blank(s
, full_update
);
1869 /* force a full display refresh */
1870 static void vga_invalidate_display(void *opaque
)
1872 VGAState
*s
= (VGAState
*)opaque
;
1875 s
->last_height
= -1;
1878 void vga_reset(void *opaque
)
1880 VGAState
*s
= (VGAState
*) opaque
;
1886 s
->lfb_vram_mapped
= 0;
1890 memset(s
->sr
, '\0', sizeof(s
->sr
));
1892 memset(s
->gr
, '\0', sizeof(s
->gr
));
1894 memset(s
->ar
, '\0', sizeof(s
->ar
));
1895 s
->ar_flip_flop
= 0;
1897 memset(s
->cr
, '\0', sizeof(s
->cr
));
1903 s
->dac_sub_index
= 0;
1904 s
->dac_read_index
= 0;
1905 s
->dac_write_index
= 0;
1906 memset(s
->dac_cache
, '\0', sizeof(s
->dac_cache
));
1908 memset(s
->palette
, '\0', sizeof(s
->palette
));
1910 #ifdef CONFIG_BOCHS_VBE
1912 memset(s
->vbe_regs
, '\0', sizeof(s
->vbe_regs
));
1913 s
->vbe_regs
[VBE_DISPI_INDEX_ID
] = VBE_DISPI_ID0
;
1914 s
->vbe_start_addr
= 0;
1915 s
->vbe_line_offset
= 0;
1916 s
->vbe_bank_mask
= (s
->vram_size
>> 16) - 1;
1918 memset(s
->font_offsets
, '\0', sizeof(s
->font_offsets
));
1919 s
->graphic_mode
= -1; /* force full update */
1920 s
->shift_control
= 0;
1923 s
->line_compare
= 0;
1925 s
->plane_updated
= 0;
1930 s
->last_scr_width
= 0;
1931 s
->last_scr_height
= 0;
1932 s
->cursor_start
= 0;
1934 s
->cursor_offset
= 0;
1935 memset(s
->invalidated_y_table
, '\0', sizeof(s
->invalidated_y_table
));
1936 memset(s
->last_palette
, '\0', sizeof(s
->last_palette
));
1937 memset(s
->last_ch_attr
, '\0', sizeof(s
->last_ch_attr
));
1938 switch (vga_retrace_method
) {
1939 case VGA_RETRACE_DUMB
:
1941 case VGA_RETRACE_PRECISE
:
1942 memset(&s
->retrace_info
, 0, sizeof (s
->retrace_info
));
1947 #define TEXTMODE_X(x) ((x) % width)
1948 #define TEXTMODE_Y(x) ((x) / width)
1949 #define VMEM2CHTYPE(v) ((v & 0xff0007ff) | \
1950 ((v & 0x00000800) << 10) | ((v & 0x00007000) >> 1))
1951 /* relay text rendering to the display driver
1952 * instead of doing a full vga_update_display() */
1953 static void vga_update_text(void *opaque
, console_ch_t
*chardata
)
1955 VGAState
*s
= (VGAState
*) opaque
;
1956 int graphic_mode
, i
, cursor_offset
, cursor_visible
;
1957 int cw
, cheight
, width
, height
, size
, c_min
, c_max
;
1959 console_ch_t
*dst
, val
;
1960 char msg_buffer
[80];
1961 int full_update
= 0;
1963 if (!(s
->ar_index
& 0x20)) {
1964 graphic_mode
= GMODE_BLANK
;
1966 graphic_mode
= s
->gr
[6] & 1;
1968 if (graphic_mode
!= s
->graphic_mode
) {
1969 s
->graphic_mode
= graphic_mode
;
1972 if (s
->last_width
== -1) {
1977 switch (graphic_mode
) {
1979 /* TODO: update palette */
1980 full_update
|= update_basic_params(s
);
1982 /* total width & height */
1983 cheight
= (s
->cr
[9] & 0x1f) + 1;
1985 if (!(s
->sr
[1] & 0x01))
1987 if (s
->sr
[1] & 0x08)
1988 cw
= 16; /* NOTE: no 18 pixel wide */
1989 width
= (s
->cr
[0x01] + 1);
1990 if (s
->cr
[0x06] == 100) {
1991 /* ugly hack for CGA 160x100x16 - explain me the logic */
1994 height
= s
->cr
[0x12] |
1995 ((s
->cr
[0x07] & 0x02) << 7) |
1996 ((s
->cr
[0x07] & 0x40) << 3);
1997 height
= (height
+ 1) / cheight
;
2000 size
= (height
* width
);
2001 if (size
> CH_ATTR_SIZE
) {
2005 snprintf(msg_buffer
, sizeof(msg_buffer
), "%i x %i Text mode",
2010 if (width
!= s
->last_width
|| height
!= s
->last_height
||
2011 cw
!= s
->last_cw
|| cheight
!= s
->last_ch
) {
2012 s
->last_scr_width
= width
* cw
;
2013 s
->last_scr_height
= height
* cheight
;
2014 s
->ds
->surface
->width
= width
;
2015 s
->ds
->surface
->height
= height
;
2017 s
->last_width
= width
;
2018 s
->last_height
= height
;
2019 s
->last_ch
= cheight
;
2024 /* Update "hardware" cursor */
2025 cursor_offset
= ((s
->cr
[0x0e] << 8) | s
->cr
[0x0f]) - s
->start_addr
;
2026 if (cursor_offset
!= s
->cursor_offset
||
2027 s
->cr
[0xa] != s
->cursor_start
||
2028 s
->cr
[0xb] != s
->cursor_end
|| full_update
) {
2029 cursor_visible
= !(s
->cr
[0xa] & 0x20);
2030 if (cursor_visible
&& cursor_offset
< size
&& cursor_offset
>= 0)
2032 TEXTMODE_X(cursor_offset
),
2033 TEXTMODE_Y(cursor_offset
));
2035 dpy_cursor(s
->ds
, -1, -1);
2036 s
->cursor_offset
= cursor_offset
;
2037 s
->cursor_start
= s
->cr
[0xa];
2038 s
->cursor_end
= s
->cr
[0xb];
2041 src
= (uint32_t *) s
->vram_ptr
+ s
->start_addr
;
2045 for (i
= 0; i
< size
; src
++, dst
++, i
++)
2046 console_write_ch(dst
, VMEM2CHTYPE(*src
));
2048 dpy_update(s
->ds
, 0, 0, width
, height
);
2052 for (i
= 0; i
< size
; src
++, dst
++, i
++) {
2053 console_write_ch(&val
, VMEM2CHTYPE(*src
));
2061 for (; i
< size
; src
++, dst
++, i
++) {
2062 console_write_ch(&val
, VMEM2CHTYPE(*src
));
2069 if (c_min
<= c_max
) {
2070 i
= TEXTMODE_Y(c_min
);
2071 dpy_update(s
->ds
, 0, i
, width
, TEXTMODE_Y(c_max
) - i
+ 1);
2080 s
->get_resolution(s
, &width
, &height
);
2081 snprintf(msg_buffer
, sizeof(msg_buffer
), "%i x %i Graphic mode",
2089 snprintf(msg_buffer
, sizeof(msg_buffer
), "VGA Blank mode");
2093 /* Display a message */
2095 s
->last_height
= height
= 3;
2096 dpy_cursor(s
->ds
, -1, -1);
2097 s
->ds
->surface
->width
= s
->last_width
;
2098 s
->ds
->surface
->height
= height
;
2101 for (dst
= chardata
, i
= 0; i
< s
->last_width
* height
; i
++)
2102 console_write_ch(dst
++, ' ');
2104 size
= strlen(msg_buffer
);
2105 width
= (s
->last_width
- size
) / 2;
2106 dst
= chardata
+ s
->last_width
+ width
;
2107 for (i
= 0; i
< size
; i
++)
2108 console_write_ch(dst
++, 0x00200100 | msg_buffer
[i
]);
2110 dpy_update(s
->ds
, 0, 0, s
->last_width
, height
);
2113 static CPUReadMemoryFunc
*vga_mem_read
[3] = {
2119 static CPUWriteMemoryFunc
*vga_mem_write
[3] = {
2125 static void vga_save(QEMUFile
*f
, void *opaque
)
2127 VGAState
*s
= opaque
;
2131 pci_device_save(s
->pci_dev
, f
);
2133 qemu_put_be32s(f
, &s
->latch
);
2134 qemu_put_8s(f
, &s
->sr_index
);
2135 qemu_put_buffer(f
, s
->sr
, 8);
2136 qemu_put_8s(f
, &s
->gr_index
);
2137 qemu_put_buffer(f
, s
->gr
, 16);
2138 qemu_put_8s(f
, &s
->ar_index
);
2139 qemu_put_buffer(f
, s
->ar
, 21);
2140 qemu_put_be32(f
, s
->ar_flip_flop
);
2141 qemu_put_8s(f
, &s
->cr_index
);
2142 qemu_put_buffer(f
, s
->cr
, 256);
2143 qemu_put_8s(f
, &s
->msr
);
2144 qemu_put_8s(f
, &s
->fcr
);
2145 qemu_put_byte(f
, s
->st00
);
2146 qemu_put_8s(f
, &s
->st01
);
2148 qemu_put_8s(f
, &s
->dac_state
);
2149 qemu_put_8s(f
, &s
->dac_sub_index
);
2150 qemu_put_8s(f
, &s
->dac_read_index
);
2151 qemu_put_8s(f
, &s
->dac_write_index
);
2152 qemu_put_buffer(f
, s
->dac_cache
, 3);
2153 qemu_put_buffer(f
, s
->palette
, 768);
2155 qemu_put_be32(f
, s
->bank_offset
);
2156 #ifdef CONFIG_BOCHS_VBE
2157 qemu_put_byte(f
, 1);
2158 qemu_put_be16s(f
, &s
->vbe_index
);
2159 for(i
= 0; i
< VBE_DISPI_INDEX_NB
; i
++)
2160 qemu_put_be16s(f
, &s
->vbe_regs
[i
]);
2161 qemu_put_be32s(f
, &s
->vbe_start_addr
);
2162 qemu_put_be32s(f
, &s
->vbe_line_offset
);
2163 qemu_put_be32s(f
, &s
->vbe_bank_mask
);
2165 qemu_put_byte(f
, 0);
2169 static int vga_load(QEMUFile
*f
, void *opaque
, int version_id
)
2171 VGAState
*s
= opaque
;
2177 if (s
->pci_dev
&& version_id
>= 2) {
2178 ret
= pci_device_load(s
->pci_dev
, f
);
2183 qemu_get_be32s(f
, &s
->latch
);
2184 qemu_get_8s(f
, &s
->sr_index
);
2185 qemu_get_buffer(f
, s
->sr
, 8);
2186 qemu_get_8s(f
, &s
->gr_index
);
2187 qemu_get_buffer(f
, s
->gr
, 16);
2188 qemu_get_8s(f
, &s
->ar_index
);
2189 qemu_get_buffer(f
, s
->ar
, 21);
2190 s
->ar_flip_flop
=qemu_get_be32(f
);
2191 qemu_get_8s(f
, &s
->cr_index
);
2192 qemu_get_buffer(f
, s
->cr
, 256);
2193 qemu_get_8s(f
, &s
->msr
);
2194 qemu_get_8s(f
, &s
->fcr
);
2195 qemu_get_8s(f
, &s
->st00
);
2196 qemu_get_8s(f
, &s
->st01
);
2198 qemu_get_8s(f
, &s
->dac_state
);
2199 qemu_get_8s(f
, &s
->dac_sub_index
);
2200 qemu_get_8s(f
, &s
->dac_read_index
);
2201 qemu_get_8s(f
, &s
->dac_write_index
);
2202 qemu_get_buffer(f
, s
->dac_cache
, 3);
2203 qemu_get_buffer(f
, s
->palette
, 768);
2205 s
->bank_offset
=qemu_get_be32(f
);
2206 is_vbe
= qemu_get_byte(f
);
2207 #ifdef CONFIG_BOCHS_VBE
2210 qemu_get_be16s(f
, &s
->vbe_index
);
2211 for(i
= 0; i
< VBE_DISPI_INDEX_NB
; i
++)
2212 qemu_get_be16s(f
, &s
->vbe_regs
[i
]);
2213 qemu_get_be32s(f
, &s
->vbe_start_addr
);
2214 qemu_get_be32s(f
, &s
->vbe_line_offset
);
2215 qemu_get_be32s(f
, &s
->vbe_bank_mask
);
2222 s
->graphic_mode
= -1;
2226 typedef struct PCIVGAState
{
2231 void vga_dirty_log_start(VGAState
*s
)
2233 if (kvm_enabled() && s
->map_addr
)
2234 kvm_log_start(s
->map_addr
, s
->map_end
- s
->map_addr
);
2236 if (kvm_enabled() && s
->lfb_vram_mapped
) {
2237 kvm_log_start(isa_mem_base
+ 0xa0000, 0x8000);
2238 kvm_log_start(isa_mem_base
+ 0xa8000, 0x8000);
2242 void vga_dirty_log_stop(VGAState
*s
)
2244 if (kvm_enabled() && s
->map_addr
)
2245 kvm_log_stop(s
->map_addr
, s
->map_end
- s
->map_addr
);
2247 if (kvm_enabled() && s
->lfb_vram_mapped
) {
2248 kvm_log_stop(isa_mem_base
+ 0xa0000, 0x8000);
2249 kvm_log_stop(isa_mem_base
+ 0xa8000, 0x8000);
2253 static void vga_map(PCIDevice
*pci_dev
, int region_num
,
2254 uint32_t addr
, uint32_t size
, int type
)
2256 PCIVGAState
*d
= (PCIVGAState
*)pci_dev
;
2257 VGAState
*s
= &d
->vga_state
;
2258 if (region_num
== PCI_ROM_SLOT
) {
2259 cpu_register_physical_memory(addr
, s
->bios_size
, s
->bios_offset
);
2261 cpu_register_physical_memory(addr
, s
->vram_size
, s
->vram_offset
);
2265 s
->map_end
= addr
+ VGA_RAM_SIZE
;
2267 vga_dirty_log_start(s
);
2270 void vga_common_init(VGAState
*s
, uint8_t *vga_ram_base
,
2271 ram_addr_t vga_ram_offset
, int vga_ram_size
)
2275 for(i
= 0;i
< 256; i
++) {
2277 for(j
= 0; j
< 8; j
++) {
2278 v
|= ((i
>> j
) & 1) << (j
* 4);
2283 for(j
= 0; j
< 4; j
++) {
2284 v
|= ((i
>> (2 * j
)) & 3) << (j
* 4);
2288 for(i
= 0; i
< 16; i
++) {
2290 for(j
= 0; j
< 4; j
++) {
2293 v
|= b
<< (2 * j
+ 1);
2298 s
->vram_ptr
= vga_ram_base
;
2299 s
->vram_offset
= vga_ram_offset
;
2300 s
->vram_size
= vga_ram_size
;
2301 s
->get_bpp
= vga_get_bpp
;
2302 s
->get_offsets
= vga_get_offsets
;
2303 s
->get_resolution
= vga_get_resolution
;
2304 s
->update
= vga_update_display
;
2305 s
->invalidate
= vga_invalidate_display
;
2306 s
->screen_dump
= vga_screen_dump
;
2307 s
->text_update
= vga_update_text
;
2308 switch (vga_retrace_method
) {
2309 case VGA_RETRACE_DUMB
:
2310 s
->retrace
= vga_dumb_retrace
;
2311 s
->update_retrace_info
= vga_dumb_update_retrace_info
;
2314 case VGA_RETRACE_PRECISE
:
2315 s
->retrace
= vga_precise_retrace
;
2316 s
->update_retrace_info
= vga_precise_update_retrace_info
;
2322 /* used by both ISA and PCI */
2323 void vga_init(VGAState
*s
)
2327 qemu_register_reset(vga_reset
, s
);
2328 register_savevm("vga", 0, 2, vga_save
, vga_load
, s
);
2330 register_ioport_write(0x3c0, 16, 1, vga_ioport_write
, s
);
2332 register_ioport_write(0x3b4, 2, 1, vga_ioport_write
, s
);
2333 register_ioport_write(0x3d4, 2, 1, vga_ioport_write
, s
);
2334 register_ioport_write(0x3ba, 1, 1, vga_ioport_write
, s
);
2335 register_ioport_write(0x3da, 1, 1, vga_ioport_write
, s
);
2337 register_ioport_read(0x3c0, 16, 1, vga_ioport_read
, s
);
2339 register_ioport_read(0x3b4, 2, 1, vga_ioport_read
, s
);
2340 register_ioport_read(0x3d4, 2, 1, vga_ioport_read
, s
);
2341 register_ioport_read(0x3ba, 1, 1, vga_ioport_read
, s
);
2342 register_ioport_read(0x3da, 1, 1, vga_ioport_read
, s
);
2345 #ifdef CONFIG_BOCHS_VBE
2346 #if defined (TARGET_I386)
2347 register_ioport_read(0x1ce, 1, 2, vbe_ioport_read_index
, s
);
2348 register_ioport_read(0x1cf, 1, 2, vbe_ioport_read_data
, s
);
2350 register_ioport_write(0x1ce, 1, 2, vbe_ioport_write_index
, s
);
2351 register_ioport_write(0x1cf, 1, 2, vbe_ioport_write_data
, s
);
2353 /* old Bochs IO ports */
2354 register_ioport_read(0xff80, 1, 2, vbe_ioport_read_index
, s
);
2355 register_ioport_read(0xff81, 1, 2, vbe_ioport_read_data
, s
);
2357 register_ioport_write(0xff80, 1, 2, vbe_ioport_write_index
, s
);
2358 register_ioport_write(0xff81, 1, 2, vbe_ioport_write_data
, s
);
2360 register_ioport_read(0x1ce, 1, 2, vbe_ioport_read_index
, s
);
2361 register_ioport_read(0x1d0, 1, 2, vbe_ioport_read_data
, s
);
2363 register_ioport_write(0x1ce, 1, 2, vbe_ioport_write_index
, s
);
2364 register_ioport_write(0x1d0, 1, 2, vbe_ioport_write_data
, s
);
2366 #endif /* CONFIG_BOCHS_VBE */
2368 vga_io_memory
= cpu_register_io_memory(0, vga_mem_read
, vga_mem_write
, s
);
2369 cpu_register_physical_memory(isa_mem_base
+ 0x000a0000, 0x20000,
2371 qemu_register_coalesced_mmio(isa_mem_base
+ 0x000a0000, 0x20000);
2374 /* Memory mapped interface */
2375 static uint32_t vga_mm_readb (void *opaque
, target_phys_addr_t addr
)
2377 VGAState
*s
= opaque
;
2379 return vga_ioport_read(s
, addr
>> s
->it_shift
) & 0xff;
2382 static void vga_mm_writeb (void *opaque
,
2383 target_phys_addr_t addr
, uint32_t value
)
2385 VGAState
*s
= opaque
;
2387 vga_ioport_write(s
, addr
>> s
->it_shift
, value
& 0xff);
2390 static uint32_t vga_mm_readw (void *opaque
, target_phys_addr_t addr
)
2392 VGAState
*s
= opaque
;
2394 return vga_ioport_read(s
, addr
>> s
->it_shift
) & 0xffff;
2397 static void vga_mm_writew (void *opaque
,
2398 target_phys_addr_t addr
, uint32_t value
)
2400 VGAState
*s
= opaque
;
2402 vga_ioport_write(s
, addr
>> s
->it_shift
, value
& 0xffff);
2405 static uint32_t vga_mm_readl (void *opaque
, target_phys_addr_t addr
)
2407 VGAState
*s
= opaque
;
2409 return vga_ioport_read(s
, addr
>> s
->it_shift
);
2412 static void vga_mm_writel (void *opaque
,
2413 target_phys_addr_t addr
, uint32_t value
)
2415 VGAState
*s
= opaque
;
2417 vga_ioport_write(s
, addr
>> s
->it_shift
, value
);
2420 static CPUReadMemoryFunc
*vga_mm_read_ctrl
[] = {
2426 static CPUWriteMemoryFunc
*vga_mm_write_ctrl
[] = {
2432 static void vga_mm_init(VGAState
*s
, target_phys_addr_t vram_base
,
2433 target_phys_addr_t ctrl_base
, int it_shift
)
2435 int s_ioport_ctrl
, vga_io_memory
;
2437 s
->it_shift
= it_shift
;
2438 s_ioport_ctrl
= cpu_register_io_memory(0, vga_mm_read_ctrl
, vga_mm_write_ctrl
, s
);
2439 vga_io_memory
= cpu_register_io_memory(0, vga_mem_read
, vga_mem_write
, s
);
2441 register_savevm("vga", 0, 2, vga_save
, vga_load
, s
);
2443 cpu_register_physical_memory(ctrl_base
, 0x100000, s_ioport_ctrl
);
2445 cpu_register_physical_memory(vram_base
+ 0x000a0000, 0x20000, vga_io_memory
);
2446 qemu_register_coalesced_mmio(vram_base
+ 0x000a0000, 0x20000);
2449 int isa_vga_init(uint8_t *vga_ram_base
,
2450 unsigned long vga_ram_offset
, int vga_ram_size
)
2454 s
= qemu_mallocz(sizeof(VGAState
));
2456 vga_common_init(s
, vga_ram_base
, vga_ram_offset
, vga_ram_size
);
2459 s
->ds
= graphic_console_init(s
->update
, s
->invalidate
,
2460 s
->screen_dump
, s
->text_update
, s
);
2462 #ifdef CONFIG_BOCHS_VBE
2463 /* XXX: use optimized standard vga accesses */
2464 cpu_register_physical_memory(VBE_DISPI_LFB_PHYSICAL_ADDRESS
,
2465 vga_ram_size
, vga_ram_offset
);
2470 int isa_vga_mm_init(uint8_t *vga_ram_base
,
2471 unsigned long vga_ram_offset
, int vga_ram_size
,
2472 target_phys_addr_t vram_base
, target_phys_addr_t ctrl_base
,
2477 s
= qemu_mallocz(sizeof(VGAState
));
2479 vga_common_init(s
, vga_ram_base
, vga_ram_offset
, vga_ram_size
);
2480 vga_mm_init(s
, vram_base
, ctrl_base
, it_shift
);
2482 s
->ds
= graphic_console_init(s
->update
, s
->invalidate
,
2483 s
->screen_dump
, s
->text_update
, s
);
2485 #ifdef CONFIG_BOCHS_VBE
2486 /* XXX: use optimized standard vga accesses */
2487 cpu_register_physical_memory(VBE_DISPI_LFB_PHYSICAL_ADDRESS
,
2488 vga_ram_size
, vga_ram_offset
);
2493 static void pci_vga_write_config(PCIDevice
*d
,
2494 uint32_t address
, uint32_t val
, int len
)
2496 PCIVGAState
*pvs
= container_of(d
, PCIVGAState
, dev
);
2497 VGAState
*s
= &pvs
->vga_state
;
2499 vga_dirty_log_stop(s
);
2500 pci_default_write_config(d
, address
, val
, len
);
2501 vga_dirty_log_start(s
);
2504 int pci_vga_init(PCIBus
*bus
, uint8_t *vga_ram_base
,
2505 unsigned long vga_ram_offset
, int vga_ram_size
,
2506 unsigned long vga_bios_offset
, int vga_bios_size
)
2512 d
= (PCIVGAState
*)pci_register_device(bus
, "VGA",
2513 sizeof(PCIVGAState
),
2514 -1, NULL
, pci_vga_write_config
);
2519 vga_common_init(s
, vga_ram_base
, vga_ram_offset
, vga_ram_size
);
2522 s
->ds
= graphic_console_init(s
->update
, s
->invalidate
,
2523 s
->screen_dump
, s
->text_update
, s
);
2525 s
->pci_dev
= &d
->dev
;
2527 pci_conf
= d
->dev
.config
;
2528 // dummy VGA (same as Bochs ID)
2529 pci_config_set_vendor_id(pci_conf
, PCI_VENDOR_ID_QEMU
);
2530 pci_config_set_device_id(pci_conf
, PCI_DEVICE_ID_QEMU_VGA
);
2531 pci_config_set_class(pci_conf
, PCI_CLASS_DISPLAY_VGA
);
2532 pci_conf
[0x0e] = 0x00; // header_type
2534 /* XXX: vga_ram_size must be a power of two */
2535 pci_register_io_region(&d
->dev
, 0, vga_ram_size
,
2536 PCI_ADDRESS_SPACE_MEM_PREFETCH
, vga_map
);
2537 if (vga_bios_size
!= 0) {
2538 unsigned int bios_total_size
;
2539 s
->bios_offset
= vga_bios_offset
;
2540 s
->bios_size
= vga_bios_size
;
2541 /* must be a power of two */
2542 bios_total_size
= 1;
2543 while (bios_total_size
< vga_bios_size
)
2544 bios_total_size
<<= 1;
2545 pci_register_io_region(&d
->dev
, PCI_ROM_SLOT
, bios_total_size
,
2546 PCI_ADDRESS_SPACE_MEM_PREFETCH
, vga_map
);
2551 /********************************************************/
2552 /* vga screen dump */
2554 static void vga_save_dpy_update(DisplayState
*s
,
2555 int x
, int y
, int w
, int h
)
2559 static void vga_save_dpy_resize(DisplayState
*s
)
2563 static void vga_save_dpy_refresh(DisplayState
*s
)
2567 int ppm_save(const char *filename
, struct DisplaySurface
*ds
)
2575 f
= fopen(filename
, "wb");
2578 fprintf(f
, "P6\n%d %d\n%d\n",
2579 ds
->width
, ds
->height
, 255);
2581 for(y
= 0; y
< ds
->height
; y
++) {
2583 for(x
= 0; x
< ds
->width
; x
++) {
2584 if (ds
->pf
.bits_per_pixel
== 32)
2587 v
= (uint32_t) (*(uint16_t *)d
);
2588 r
= ((v
>> ds
->pf
.rshift
) & ds
->pf
.rmax
) * 256 /
2590 g
= ((v
>> ds
->pf
.gshift
) & ds
->pf
.gmax
) * 256 /
2592 b
= ((v
>> ds
->pf
.bshift
) & ds
->pf
.bmax
) * 256 /
2597 d
+= ds
->pf
.bytes_per_pixel
;
2605 static void vga_screen_dump_blank(VGAState
*s
, const char *filename
)
2608 unsigned int y
, x
, w
, h
;
2610 w
= s
->last_scr_width
* sizeof(uint32_t);
2611 h
= s
->last_scr_height
;
2613 f
= fopen(filename
, "wb");
2616 fprintf(f
, "P6\n%d %d\n%d\n", w
, h
, 255);
2617 for (y
= 0; y
< h
; y
++) {
2618 for (x
= 0; x
< w
; x
++) {
2625 static void vga_screen_dump_common(VGAState
*s
, const char *filename
,
2628 DisplayState
*saved_ds
, ds1
, *ds
= &ds1
;
2629 DisplayChangeListener dcl
;
2631 /* XXX: this is a little hackish */
2632 vga_invalidate_display(s
);
2635 memset(ds
, 0, sizeof(DisplayState
));
2636 memset(&dcl
, 0, sizeof(DisplayChangeListener
));
2637 dcl
.dpy_update
= vga_save_dpy_update
;
2638 dcl
.dpy_resize
= vga_save_dpy_resize
;
2639 dcl
.dpy_refresh
= vga_save_dpy_refresh
;
2640 register_displaychangelistener(ds
, &dcl
);
2641 ds
->surface
= qemu_create_displaysurface(w
, h
, 32, 4 * w
);
2644 s
->graphic_mode
= -1;
2645 vga_update_display(s
);
2647 ppm_save(filename
, ds
->surface
);
2649 qemu_free_displaysurface(ds
->surface
);
2653 static void vga_screen_dump_graphic(VGAState
*s
, const char *filename
)
2657 s
->get_resolution(s
, &w
, &h
);
2658 vga_screen_dump_common(s
, filename
, w
, h
);
2661 static void vga_screen_dump_text(VGAState
*s
, const char *filename
)
2663 int w
, h
, cwidth
, cheight
;
2665 vga_get_text_resolution(s
, &w
, &h
, &cwidth
, &cheight
);
2666 vga_screen_dump_common(s
, filename
, w
* cwidth
, h
* cheight
);
2669 /* save the vga display in a PPM image even if no display is
2671 static void vga_screen_dump(void *opaque
, const char *filename
)
2673 VGAState
*s
= (VGAState
*)opaque
;
2675 if (!(s
->ar_index
& 0x20))
2676 vga_screen_dump_blank(s
, filename
);
2677 else if (s
->gr
[6] & 1)
2678 vga_screen_dump_graphic(s
, filename
);
2680 vga_screen_dump_text(s
, filename
);