qemu-kvm-powerpc.c

   1
   2 #include "config.h"
   3 #include "config-host.h"
   4
   5 extern int kvm_allowed;
   6 extern int kvm_irqchip;
   7
   8 #ifdef USE_KVM
   9
  10 #include <string.h>
  11 #include "hw/hw.h"
  12 #include "sysemu.h"
  13 #include "cpu.h"
  14 #include "helper_regs.h"
  15
  16 #include "qemu-kvm.h"
  17 #include <libkvm.h>
  18 #include <pthread.h>
  19 #include <sys/utsname.h>
  20
  21 extern kvm_context_t kvm_context;
  22
  23 void cpu_reset(CPUState *env)
  24 {
  25         cpu_ppc_reset(env);
  26 }
  27
  28
  29 int kvm_arch_qemu_create_context(void)
  30 {
  31         return 0;
  32 }
  33
  34 void kvm_arch_load_regs(CPUState *env)
  35 {
  36     struct kvm_regs regs;
  37     int rc,i;
  38
  39     rc = kvm_get_regs(kvm_context, env->cpu_index, &regs);
  40     if (rc == -1)
  41         perror("kvm_get_regs FAILED");
  42
  43     /* cr is untouched in qemu and not existant in CPUState fr ppr */
  44     /* hflags is a morphed to MSR on ppc, no need to sync that down to kvm */
  45
  46     regs.pc = env->nip;
  47
  48     regs.ctr = env->ctr;
  49     regs.lr  = env->lr;
  50     regs.xer = ppc_load_xer(env);
  51     regs.msr = env->msr;
  52
  53     regs.srr0 = env->spr[SPR_SRR0];
  54     regs.srr1 = env->spr[SPR_SRR1];
  55
  56     regs.sprg0 = env->spr[SPR_SPRG0];
  57     regs.sprg1 = env->spr[SPR_SPRG1];
  58     regs.sprg2 = env->spr[SPR_SPRG2];
  59     regs.sprg3 = env->spr[SPR_SPRG3];
  60     regs.sprg4 = env->spr[SPR_SPRG4];
  61     regs.sprg5 = env->spr[SPR_SPRG5];
  62     regs.sprg6 = env->spr[SPR_SPRG6];
  63     regs.sprg7 = env->spr[SPR_SPRG7];
  64
  65     for (i = 0;i < 32; i++){
  66         regs.gpr[i] = env->gpr[i];
  67         regs.fpr[i] = env->fpr[i];
  68     }
  69
  70     rc = kvm_set_regs(kvm_context, env->cpu_index, &regs);
  71     if (rc == -1)
  72         perror("kvm_set_regs FAILED");
  73 }
  74
  75
  76 void kvm_arch_save_regs(CPUState *env)
  77 {
  78     struct kvm_regs regs;
  79     uint32_t i, rc;
  80
  81     rc = kvm_get_regs(kvm_context, env->cpu_index, &regs);
  82     if (rc == -1)
  83         perror("kvm_get_regs FAILED");
  84
  85     env->ctr =regs.ctr;
  86     env->lr = regs.lr;
  87     ppc_store_xer(env,regs.xer);
  88     env->msr = regs.msr;
  89     /* calculate hflags based on the current msr using the ppc qemu helper */
  90     hreg_compute_hflags(env);
  91
  92     env->nip = regs.pc;
  93
  94     env->spr[SPR_SRR0] = regs.srr0;
  95     env->spr[SPR_SRR1] = regs.srr1;
  96
  97     env->spr[SPR_SPRG0] = regs.sprg0;
  98     env->spr[SPR_SPRG1] = regs.sprg1;
  99     env->spr[SPR_SPRG2] = regs.sprg2;
 100     env->spr[SPR_SPRG3] = regs.sprg3;
 101     env->spr[SPR_SPRG4] = regs.sprg4;
 102     env->spr[SPR_SPRG5] = regs.sprg5;
 103     env->spr[SPR_SPRG6] = regs.sprg6;
 104     env->spr[SPR_SPRG7] = regs.sprg7;
 105
 106     for (i = 0;i < 32; i++){
 107         env->gpr[i] = regs.gpr[i];
 108         env->fpr[i] = regs.fpr[i];
 109     }
 110
 111 }
 112
 113 int kvm_arch_qemu_init_env(CPUState *cenv)
 114 {
 115     return 0;
 116 }
 117
 118 int kvm_arch_halt(void *opaque, int vcpu)
 119 {
 120     CPUState *env = cpu_single_env;
 121
 122     if (!(env->interrupt_request & CPU_INTERRUPT_HARD)
 123         && (msr_ee))
 124     {
 125             env->halted = 1;
 126             env->exception_index = EXCP_HLT;
 127     }
 128     return 1;
 129 }
 130
 131 void kvm_arch_pre_kvm_run(void *opaque, int vcpu)
 132 {
 133         return;
 134 }
 135
 136 void kvm_arch_post_kvm_run(void *opaque, int vcpu)
 137 {
 138     CPUState *env = qemu_kvm_cpu_env(vcpu);
 139     cpu_single_env = env;
 140     env->ready_for_interrupt_injection = \
 141         kvm_is_ready_for_interrupt_injection(kvm_context, vcpu);
 142 }
 143
 144 int kvm_arch_has_work(CPUState *env)
 145 {
 146     if ((env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXIT)) &&
 147         (msr_ee))
 148         return 1;
 149     return 0;
 150 }
 151
 152 int kvm_arch_try_push_interrupts(void *opaque)
 153 {
 154     CPUState *env = cpu_single_env;
 155     int r;
 156     unsigned irq;
 157
 158     if (env->ready_for_interrupt_injection &&
 159         (env->interrupt_request & CPU_INTERRUPT_HARD))
 160        {
 161             env->interrupt_request &= ~CPU_INTERRUPT_HARD;
 162
 163             /* For now KVM disregards the 'irq' argument. However, in the
 164              * future KVM could cache it in-kernel to avoid a heavyweight exit
 165              * when reading the UIC.
 166              */
 167             irq = -1U;
 168
 169             r = kvm_inject_irq(kvm_context, env->cpu_index, irq);
 170             if (r < 0)
 171                 printf("cpu %d fail inject %x\n", env->cpu_index, irq);
 172     }
 173
 174     return (env->interrupt_request & CPU_INTERRUPT_HARD) != 0;
 175 }
 176
 177 void kvm_arch_update_regs_for_sipi(CPUState *env)
 178 {
 179     printf("%s: no kvm-powerpc multi processor support yet!\n", __func__);
 180 }
 181
 182 /* map dcr access to existing qemu dcr emulation */
 183 int handle_powerpc_dcr_read(int vcpu, uint32_t dcrn, uint32_t *data)
 184 {
 185     CPUState *env = cpu_single_env;
 186     ppc_dcr_read(env->dcr_env, dcrn, data);
 187     return 0; /* XXX ignore failed DCR ops */
 188 }
 189
 190 int handle_powerpc_dcr_write(int vcpu, uint32_t dcrn, uint32_t data)
 191 {
 192     CPUState *env = cpu_single_env;
 193     ppc_dcr_write(env->dcr_env, dcrn, data);
 194     return 0; /* XXX ignore failed DCR ops */
 195 }
 196
 197 #endif