2 * Copyright (C) 2006 InnoTek Systemberatung GmbH
4 * This file is part of VirtualBox Open Source Edition (OSE), as
5 * available from http://www.virtualbox.org. This file is free software;
6 * you can redistribute it and/or modify it under the terms of the GNU
7 * General Public License as published by the Free Software Foundation,
8 * in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
9 * distribution. VirtualBox OSE is distributed in the hope that it will
10 * be useful, but WITHOUT ANY WARRANTY of any kind.
12 * If you received this file as part of a commercial VirtualBox
13 * distribution, then only the terms of your commercial VirtualBox
14 * license agreement apply instead of the previous paragraph.
19 #include "audio/audio.h"
24 AC97_Master_Volume_Mute
= 0x02,
25 AC97_Headphone_Volume_Mute
= 0x04,
26 AC97_Master_Volume_Mono_Mute
= 0x06,
27 AC97_Master_Tone_RL
= 0x08,
28 AC97_PC_BEEP_Volume_Mute
= 0x0A,
29 AC97_Phone_Volume_Mute
= 0x0C,
30 AC97_Mic_Volume_Mute
= 0x0E,
31 AC97_Line_In_Volume_Mute
= 0x10,
32 AC97_CD_Volume_Mute
= 0x12,
33 AC97_Video_Volume_Mute
= 0x14,
34 AC97_Aux_Volume_Mute
= 0x16,
35 AC97_PCM_Out_Volume_Mute
= 0x18,
36 AC97_Record_Select
= 0x1A,
37 AC97_Record_Gain_Mute
= 0x1C,
38 AC97_Record_Gain_Mic_Mute
= 0x1E,
39 AC97_General_Purpose
= 0x20,
40 AC97_3D_Control
= 0x22,
41 AC97_AC_97_RESERVED
= 0x24,
42 AC97_Powerdown_Ctrl_Stat
= 0x26,
43 AC97_Extended_Audio_ID
= 0x28,
44 AC97_Extended_Audio_Ctrl_Stat
= 0x2A,
45 AC97_PCM_Front_DAC_Rate
= 0x2C,
46 AC97_PCM_Surround_DAC_Rate
= 0x2E,
47 AC97_PCM_LFE_DAC_Rate
= 0x30,
48 AC97_PCM_LR_ADC_Rate
= 0x32,
49 AC97_MIC_ADC_Rate
= 0x34,
50 AC97_6Ch_Vol_C_LFE_Mute
= 0x36,
51 AC97_6Ch_Vol_L_R_Surround_Mute
= 0x38,
52 AC97_Vendor_Reserved
= 0x58,
53 AC97_Vendor_ID1
= 0x7c,
54 AC97_Vendor_ID2
= 0x7e
58 #define SR_FIFOE 16 /* rwc */
59 #define SR_BCIS 8 /* rwc */
60 #define SR_LVBCI 4 /* rwc */
61 #define SR_CELV 2 /* ro */
62 #define SR_DCH 1 /* ro */
63 #define SR_VALID_MASK ((1 << 5) - 1)
64 #define SR_WCLEAR_MASK (SR_FIFOE | SR_BCIS | SR_LVBCI)
65 #define SR_RO_MASK (SR_DCH | SR_CELV)
66 #define SR_INT_MASK (SR_FIFOE | SR_BCIS | SR_LVBCI)
68 #define CR_IOCE 16 /* rw */
69 #define CR_FEIE 8 /* rw */
70 #define CR_LVBIE 4 /* rw */
71 #define CR_RR 2 /* rw */
72 #define CR_RPBM 1 /* rw */
73 #define CR_VALID_MASK ((1 << 5) - 1)
74 #define CR_DONT_CLEAR_MASK (CR_IOCE | CR_FEIE | CR_LVBIE)
76 #define GC_WR 4 /* rw */
77 #define GC_CR 2 /* rw */
78 #define GC_VALID_MASK ((1 << 6) - 1)
80 #define GS_MD3 (1<<17) /* rw */
81 #define GS_AD3 (1<<16) /* rw */
82 #define GS_RCS (1<<15) /* rwc */
83 #define GS_B3S12 (1<<14) /* ro */
84 #define GS_B2S12 (1<<13) /* ro */
85 #define GS_B1S12 (1<<12) /* ro */
86 #define GS_S1R1 (1<<11) /* rwc */
87 #define GS_S0R1 (1<<10) /* rwc */
88 #define GS_S1CR (1<<9) /* ro */
89 #define GS_S0CR (1<<8) /* ro */
90 #define GS_MINT (1<<7) /* ro */
91 #define GS_POINT (1<<6) /* ro */
92 #define GS_PIINT (1<<5) /* ro */
93 #define GS_RSRVD ((1<<4)|(1<<3))
94 #define GS_MOINT (1<<2) /* ro */
95 #define GS_MIINT (1<<1) /* ro */
96 #define GS_GSCI 1 /* rwc */
97 #define GS_RO_MASK (GS_B3S12| \
108 #define GS_VALID_MASK ((1 << 18) - 1)
109 #define GS_WCLEAR_MASK (GS_RCS|GS_S1R1|GS_S0R1|GS_GSCI)
111 #define BD_IOC (1<<31)
112 #define BD_BUP (1<<30)
117 #define VOL_MASK 0x1f
118 #define MUTE_SHIFT 15
137 typedef struct AC97BusMasterRegs
{
138 uint32_t bdbar
; /* rw 0 */
139 uint8_t civ
; /* ro 0 */
140 uint8_t lvi
; /* rw 0 */
141 uint16_t sr
; /* rw 1 */
142 uint16_t picb
; /* ro 0 */
143 uint8_t piv
; /* ro 0 */
144 uint8_t cr
; /* rw 0 */
145 unsigned int bd_valid
;
149 typedef struct AC97LinkState
{
156 AC97BusMasterRegs bm_regs
[3];
157 uint8_t mixer_data
[256];
159 SWVoiceOut
*voice_po
;
161 uint8_t silence
[128];
172 #define dolog(...) AUD_log ("ac97", __VA_ARGS__)
177 typedef struct PCIAC97LinkState
{
182 #define MKREGS(prefix, start) \
184 prefix ## _BDBAR = start, \
185 prefix ## _CIV = start + 4, \
186 prefix ## _LVI = start + 5, \
187 prefix ## _SR = start + 6, \
188 prefix ## _PICB = start + 8, \
189 prefix ## _PIV = start + 10, \
190 prefix ## _CR = start + 11 \
200 MKREGS (PI
, PI_INDEX
* 16);
201 MKREGS (PO
, PO_INDEX
* 16);
202 MKREGS (MC
, MC_INDEX
* 16);
210 #define GET_BM(index) (((index) >> 4) & 3)
212 static void po_callback (void *opaque
, int free
);
213 static void pi_callback (void *opaque
, int avail
);
214 static void mc_callback (void *opaque
, int avail
);
216 static void warm_reset (AC97LinkState
*s
)
221 static void cold_reset (AC97LinkState
* s
)
226 static void fetch_bd (AC97LinkState
*s
, AC97BusMasterRegs
*r
)
230 cpu_physical_memory_read (r
->bdbar
+ r
->civ
* 8, b
, 8);
232 r
->bd
.addr
= le32_to_cpu (*(uint32_t *) &b
[0]) & ~3;
233 r
->bd
.ctl_len
= le32_to_cpu (*(uint32_t *) &b
[4]);
234 r
->picb
= r
->bd
.ctl_len
& 0xffff;
235 dolog ("bd %2d addr=%#x ctl=%#06x len=%#x(%d bytes)\n",
236 r
->civ
, r
->bd
.addr
, r
->bd
.ctl_len
>> 16,
237 r
->bd
.ctl_len
& 0xffff,
238 (r
->bd
.ctl_len
& 0xffff) << 1);
241 static void update_sr (AC97LinkState
*s
, AC97BusMasterRegs
*r
, uint32_t new_sr
)
245 uint32_t new_mask
= new_sr
& SR_INT_MASK
;
246 uint32_t old_mask
= r
->sr
& SR_INT_MASK
;
247 uint32_t masks
[] = {GS_PIINT
, GS_POINT
, GS_MINT
};
249 if (new_mask
^ old_mask
) {
250 /** @todo is IRQ deasserted when only one of status bits is cleared? */
256 if ((new_mask
& SR_LVBCI
) && (r
->cr
& CR_LVBIE
)) {
260 if ((new_mask
& SR_BCIS
) && (r
->cr
& CR_IOCE
)) {
269 dolog ("IOC%d LVB%d sr=%#x event=%d level=%d\n",
270 r
->sr
& SR_BCIS
, r
->sr
& SR_LVBCI
,
278 s
->glob_sta
|= masks
[r
- s
->bm_regs
];
279 dolog ("set irq level=1\n");
280 qemu_set_irq(s
->pci_dev
->irq
[0], 1);
283 s
->glob_sta
&= ~masks
[r
- s
->bm_regs
];
284 dolog ("set irq level=0\n");
285 qemu_set_irq(s
->pci_dev
->irq
[0], 0);
289 static void voice_set_active (AC97LinkState
*s
, int bm_index
, int on
)
293 AUD_set_active_in (s
->voice_pi
, on
);
297 AUD_set_active_out (s
->voice_po
, on
);
301 AUD_set_active_in (s
->voice_mc
, on
);
305 AUD_log ("ac97", "invalid bm_index(%d) in voice_set_active", bm_index
);
310 static void reset_bm_regs (AC97LinkState
*s
, AC97BusMasterRegs
*r
)
312 dolog ("reset_bm_regs\n");
316 /** todo do we need to do that? */
317 update_sr (s
, r
, SR_DCH
);
320 r
->cr
= r
->cr
& CR_DONT_CLEAR_MASK
;
323 voice_set_active (s
, r
- s
->bm_regs
, 0);
324 memset (s
->silence
, 0, sizeof (s
->silence
));
327 static void mixer_store (AC97LinkState
*s
, uint32_t i
, uint16_t v
)
329 if (i
+ 2 > sizeof (s
->mixer_data
)) {
330 dolog ("mixer_store: index %d out of bounds %d\n",
331 i
, sizeof (s
->mixer_data
));
335 s
->mixer_data
[i
+ 0] = v
& 0xff;
336 s
->mixer_data
[i
+ 1] = v
>> 8;
339 static uint16_t mixer_load (AC97LinkState
*s
, uint32_t i
)
341 uint16_t val
= 0xffff;
343 if (i
+ 2 > sizeof (s
->mixer_data
)) {
344 dolog ("mixer_store: index %d out of bounds %d\n",
345 i
, sizeof (s
->mixer_data
));
348 val
= s
->mixer_data
[i
+ 0] | (s
->mixer_data
[i
+ 1] << 8);
354 static void open_voice (AC97LinkState
*s
, int index
, int freq
)
360 as
.fmt
= AUD_FMT_S16
;
365 s
->voice_pi
= AUD_open_in (
376 s
->voice_po
= AUD_open_out (
387 s
->voice_mc
= AUD_open_in (
399 static void reset_voices (AC97LinkState
*s
, uint8_t active
[LAST_INDEX
])
403 freq
= mixer_load (s
, AC97_PCM_LR_ADC_Rate
);
404 open_voice (s
, PI_INDEX
, freq
);
405 AUD_set_active_in (s
->voice_pi
, active
[PI_INDEX
]);
407 freq
= mixer_load (s
, AC97_PCM_Front_DAC_Rate
);
408 open_voice (s
, PO_INDEX
, freq
);
409 AUD_set_active_out (s
->voice_po
, active
[PO_INDEX
]);
411 freq
= mixer_load (s
, AC97_MIC_ADC_Rate
);
412 open_voice (s
, MC_INDEX
, freq
);
413 AUD_set_active_in (s
->voice_mc
, active
[MC_INDEX
]);
417 static void set_volume (AC97LinkState
*s
, int index
,
418 audmixerctl_t mt
, uint32_t val
)
420 int mute
= (val
>> MUTE_SHIFT
) & 1;
421 uint8_t rvol
= VOL_MASK
- (val
& VOL_MASK
);
422 uint8_t lvol
= VOL_MASK
- ((val
>> 8) & VOL_MASK
);
423 rvol
= 255 * rvol
/ VOL_MASK
;
424 lvol
= 255 * lvol
/ VOL_MASK
;
427 if (index
== AC97_Master_Volume_Mute
) {
428 AUD_set_volume_out (s
->voice_po
, mute
, lvol
, rvol
);
431 AUD_set_volume (mt
, &mute
, &lvol
, &rvol
);
434 AUD_set_volume (mt
, &mute
, &lvol
, &rvol
);
437 rvol
= VOL_MASK
- ((VOL_MASK
* rvol
) / 255);
438 lvol
= VOL_MASK
- ((VOL_MASK
* lvol
) / 255);
439 mixer_store (s
, index
, val
);
442 static audrecsource_t
ac97_to_aud_record_source (uint8_t i
)
452 return AUD_REC_VIDEO
;
458 return AUD_REC_LINE_IN
;
461 return AUD_REC_PHONE
;
464 dolog ("Unknown record source %d, using MIC\n", i
);
469 static uint8_t aud_to_ac97_record_source (audrecsource_t rs
)
484 case AUD_REC_LINE_IN
:
491 dolog ("Unknown audio recording source %d using MIC\n", rs
);
496 static void record_select (AC97LinkState
*s
, uint32_t val
)
498 uint8_t rs
= val
& REC_MASK
;
499 uint8_t ls
= (val
>> 8) & REC_MASK
;
500 audrecsource_t ars
= ac97_to_aud_record_source (rs
);
501 audrecsource_t als
= ac97_to_aud_record_source (ls
);
502 AUD_set_record_source (&als
, &ars
);
503 rs
= aud_to_ac97_record_source (ars
);
504 ls
= aud_to_ac97_record_source (als
);
505 mixer_store (s
, AC97_Record_Select
, rs
| (ls
<< 8));
509 static void mixer_reset (AC97LinkState
*s
)
511 uint8_t active
[LAST_INDEX
];
513 dolog ("mixer_reset\n");
514 memset (s
->mixer_data
, 0, sizeof (s
->mixer_data
));
515 memset (active
, 0, sizeof (active
));
516 mixer_store (s
, AC97_Reset
, 0x0000); /* 6940 */
517 mixer_store (s
, AC97_Master_Volume_Mono_Mute
, 0x8000);
518 mixer_store (s
, AC97_PC_BEEP_Volume_Mute
, 0x0000);
520 mixer_store (s
, AC97_Phone_Volume_Mute
, 0x8008);
521 mixer_store (s
, AC97_Mic_Volume_Mute
, 0x8008);
522 mixer_store (s
, AC97_CD_Volume_Mute
, 0x8808);
523 mixer_store (s
, AC97_Aux_Volume_Mute
, 0x8808);
524 mixer_store (s
, AC97_Record_Gain_Mic_Mute
, 0x8000);
525 mixer_store (s
, AC97_General_Purpose
, 0x0000);
526 mixer_store (s
, AC97_3D_Control
, 0x0000);
527 mixer_store (s
, AC97_Powerdown_Ctrl_Stat
, 0x000f);
530 * Sigmatel 9700 (STAC9700)
532 mixer_store (s
, AC97_Vendor_ID1
, 0x8384);
533 mixer_store (s
, AC97_Vendor_ID2
, 0x7600); /* 7608 */
535 mixer_store (s
, AC97_Extended_Audio_ID
, 0x0809);
536 mixer_store (s
, AC97_Extended_Audio_Ctrl_Stat
, 0x0009);
537 mixer_store (s
, AC97_PCM_Front_DAC_Rate
, 0xbb80);
538 mixer_store (s
, AC97_PCM_Surround_DAC_Rate
, 0xbb80);
539 mixer_store (s
, AC97_PCM_LFE_DAC_Rate
, 0xbb80);
540 mixer_store (s
, AC97_PCM_LR_ADC_Rate
, 0xbb80);
541 mixer_store (s
, AC97_MIC_ADC_Rate
, 0xbb80);
544 record_select (s
, 0);
545 set_volume (s
, AC97_Master_Volume_Mute
, AUD_MIXER_VOLUME
, 0x8000);
546 set_volume (s
, AC97_PCM_Out_Volume_Mute
, AUD_MIXER_PCM
, 0x8808);
547 set_volume (s
, AC97_Line_In_Volume_Mute
, AUD_MIXER_LINE_IN
, 0x8808);
549 reset_voices (s
, active
);
556 static uint32_t nam_readb (void *opaque
, uint32_t addr
)
558 PCIAC97LinkState
*d
= opaque
;
559 AC97LinkState
*s
= &d
->ac97
;
560 dolog ("U nam readb %#x\n", addr
);
565 static uint32_t nam_readw (void *opaque
, uint32_t addr
)
567 PCIAC97LinkState
*d
= opaque
;
568 AC97LinkState
*s
= &d
->ac97
;
570 uint32_t index
= addr
- s
->base
[0];
572 val
= mixer_load (s
, index
);
576 static uint32_t nam_readl (void *opaque
, uint32_t addr
)
578 PCIAC97LinkState
*d
= opaque
;
579 AC97LinkState
*s
= &d
->ac97
;
580 dolog ("U nam readl %#x\n", addr
);
589 static void nam_writeb (void *opaque
, uint32_t addr
, uint32_t val
)
591 PCIAC97LinkState
*d
= opaque
;
592 AC97LinkState
*s
= &d
->ac97
;
593 dolog ("U nam writeb %#x <- %#x\n", addr
, val
);
597 static void nam_writew (void *opaque
, uint32_t addr
, uint32_t val
)
599 PCIAC97LinkState
*d
= opaque
;
600 AC97LinkState
*s
= &d
->ac97
;
601 uint32_t index
= addr
- s
->base
[0];
607 case AC97_Powerdown_Ctrl_Stat
:
609 val
|= mixer_load (s
, index
) & 0xf;
610 mixer_store (s
, index
, val
);
613 case AC97_Master_Volume_Mute
:
614 set_volume (s
, index
, AUD_MIXER_VOLUME
, val
);
616 case AC97_PCM_Out_Volume_Mute
:
617 set_volume (s
, index
, AUD_MIXER_PCM
, val
);
619 case AC97_Line_In_Volume_Mute
:
620 set_volume (s
, index
, AUD_MIXER_LINE_IN
, val
);
622 case AC97_Record_Select
:
623 record_select (s
, val
);
626 case AC97_Vendor_ID1
:
627 case AC97_Vendor_ID2
:
628 dolog ("Attempt to write vendor ID to %#x\n", val
);
630 case AC97_Extended_Audio_ID
:
631 dolog ("Attempt to write extended audio ID to %#x\n", val
);
633 case AC97_Extended_Audio_Ctrl_Stat
:
634 if (!(val
& EACS_VRA
)) {
635 mixer_store (s
, AC97_PCM_Front_DAC_Rate
, 0xbb80);
636 mixer_store (s
, AC97_PCM_LR_ADC_Rate
, 0xbb80);
637 open_voice (s
, PI_INDEX
, 48000);
638 open_voice (s
, PO_INDEX
, 48000);
640 if (!(val
& EACS_VRM
)) {
641 mixer_store (s
, AC97_MIC_ADC_Rate
, 0xbb80);
642 open_voice (s
, MC_INDEX
, 48000);
644 dolog ("Setting extended audio control to %#x\n", val
);
645 mixer_store (s
, AC97_Extended_Audio_Ctrl_Stat
, val
);
647 case AC97_PCM_Front_DAC_Rate
:
648 if (mixer_load (s
, AC97_Extended_Audio_Ctrl_Stat
) & EACS_VRA
) {
649 mixer_store (s
, index
, val
);
650 dolog ("Set front DAC rate to %d\n", val
);
651 open_voice (s
, PO_INDEX
, val
);
654 dolog ("Attempt to set front DAC rate to %d, "
655 "but VRA is not set\n",
659 case AC97_MIC_ADC_Rate
:
660 if (mixer_load (s
, AC97_Extended_Audio_Ctrl_Stat
) & EACS_VRM
) {
661 mixer_store (s
, index
, val
);
662 dolog ("Set MIC ADC rate to %d\n", val
);
663 open_voice (s
, MC_INDEX
, val
);
666 dolog ("Attempt to set MIC ADC rate to %d, "
667 "but VRM is not set\n",
671 case AC97_PCM_LR_ADC_Rate
:
672 if (mixer_load (s
, AC97_Extended_Audio_Ctrl_Stat
) & EACS_VRA
) {
673 mixer_store (s
, index
, val
);
674 dolog ("Set front LR ADC rate to %d\n", val
);
675 open_voice (s
, PI_INDEX
, val
);
678 dolog ("Attempt to set LR ADC rate to %d, but VRA is not set\n",
683 dolog ("U nam writew %#x <- %#x\n", addr
, val
);
684 mixer_store (s
, index
, val
);
689 static void nam_writel (void *opaque
, uint32_t addr
, uint32_t val
)
691 PCIAC97LinkState
*d
= opaque
;
692 AC97LinkState
*s
= &d
->ac97
;
693 dolog ("U nam writel %#x <- %#x\n", addr
, val
);
698 * Native audio bus master
701 static uint32_t nabm_readb (void *opaque
, uint32_t addr
)
703 PCIAC97LinkState
*d
= opaque
;
704 AC97LinkState
*s
= &d
->ac97
;
705 AC97BusMasterRegs
*r
= NULL
;
706 uint32_t index
= addr
- s
->base
[1];
711 dolog ("CAS %d\n", s
->cas
);
718 r
= &s
->bm_regs
[GET_BM (index
)];
720 dolog ("CIV[%d] -> %#x\n", GET_BM (index
), val
);
725 r
= &s
->bm_regs
[GET_BM (index
)];
727 dolog ("LVI[%d] -> %#x\n", GET_BM (index
), val
);
732 r
= &s
->bm_regs
[GET_BM (index
)];
734 dolog ("PIV[%d] -> %#x\n", GET_BM (index
), val
);
739 r
= &s
->bm_regs
[GET_BM (index
)];
741 dolog ("CR[%d] -> %#x\n", GET_BM (index
), val
);
746 r
= &s
->bm_regs
[GET_BM (index
)];
748 dolog ("SRb[%d] -> %#x\n", GET_BM (index
), val
);
751 dolog ("U nabm readb %#x -> %#x\n", addr
, val
);
757 static uint32_t nabm_readw (void *opaque
, uint32_t addr
)
759 PCIAC97LinkState
*d
= opaque
;
760 AC97LinkState
*s
= &d
->ac97
;
761 AC97BusMasterRegs
*r
= NULL
;
762 uint32_t index
= addr
- s
->base
[1];
769 r
= &s
->bm_regs
[GET_BM (index
)];
771 dolog ("SR[%d] -> %#x\n", GET_BM (index
), val
);
776 r
= &s
->bm_regs
[GET_BM (index
)];
778 dolog ("PICB[%d] -> %#x\n", GET_BM (index
), val
);
781 dolog ("U nabm readw %#x -> %#x\n", addr
, val
);
787 static uint32_t nabm_readl (void *opaque
, uint32_t addr
)
789 PCIAC97LinkState
*d
= opaque
;
790 AC97LinkState
*s
= &d
->ac97
;
791 AC97BusMasterRegs
*r
= NULL
;
792 uint32_t index
= addr
- s
->base
[1];
799 r
= &s
->bm_regs
[GET_BM (index
)];
801 dolog ("BMADDR[%d] -> %#x\n", GET_BM (index
), val
);
806 r
= &s
->bm_regs
[GET_BM (index
)];
807 val
= r
->civ
| (r
->lvi
<< 8) | (r
->sr
<< 16);
808 dolog ("CIV LVI SR[%d] -> %#x, %#x, %#x\n", GET_BM (index
),
809 r
->civ
, r
->lvi
, r
->sr
);
814 r
= &s
->bm_regs
[GET_BM (index
)];
815 val
= r
->picb
| (r
->piv
<< 16) | (r
->cr
<< 24);
816 dolog ("PICB PIV CR[%d] -> %#x %#x %#x %#x\n", GET_BM (index
),
817 val
, r
->picb
, r
->piv
, r
->cr
);
821 dolog ("glob_cnt -> %#x\n", val
);
824 val
= s
->glob_sta
| GS_S0CR
;
825 dolog ("glob_sta -> %#x\n", val
);
828 dolog ("U nabm readl %#x -> %#x\n", addr
, val
);
835 * Native audio bus master
838 static void nabm_writeb (void *opaque
, uint32_t addr
, uint32_t val
)
840 PCIAC97LinkState
*d
= opaque
;
841 AC97LinkState
*s
= &d
->ac97
;
842 AC97BusMasterRegs
*r
= NULL
;
843 uint32_t index
= addr
- s
->base
[1];
848 r
= &s
->bm_regs
[GET_BM (index
)];
849 if ((r
->cr
& CR_RPBM
) && (r
->sr
& SR_DCH
)) {
850 r
->sr
&= ~(SR_DCH
| SR_CELV
);
852 r
->piv
= (r
->piv
+ 1) % 32;
856 dolog ("LVI[%d] <- %#x\n", GET_BM (index
), val
);
861 r
= &s
->bm_regs
[GET_BM (index
)];
863 reset_bm_regs (s
, r
);
866 r
->cr
= val
& CR_VALID_MASK
;
867 if (!(r
->cr
& CR_RPBM
)) {
868 voice_set_active (s
, r
- s
->bm_regs
, 0);
873 r
->piv
= (r
->piv
+ 1) % 32;
876 voice_set_active (s
, r
- s
->bm_regs
, 1);
879 dolog ("CR[%d] <- %#x (cr %#x)\n", GET_BM (index
), val
, r
->cr
);
884 r
= &s
->bm_regs
[GET_BM (index
)];
885 r
->sr
|= val
& ~(SR_RO_MASK
| SR_WCLEAR_MASK
);
886 update_sr (s
, r
, r
->sr
& ~(val
& SR_WCLEAR_MASK
));
887 dolog ("SR[%d] <- %#x (sr %#x)\n", GET_BM (index
), val
, r
->sr
);
890 dolog ("U nabm writeb %#x <- %#x\n", addr
, val
);
895 static void nabm_writew (void *opaque
, uint32_t addr
, uint32_t val
)
897 PCIAC97LinkState
*d
= opaque
;
898 AC97LinkState
*s
= &d
->ac97
;
899 AC97BusMasterRegs
*r
= NULL
;
900 uint32_t index
= addr
- s
->base
[1];
905 r
= &s
->bm_regs
[GET_BM (index
)];
906 r
->sr
|= val
& ~(SR_RO_MASK
| SR_WCLEAR_MASK
);
907 update_sr (s
, r
, r
->sr
& ~(val
& SR_WCLEAR_MASK
));
908 dolog ("SR[%d] <- %#x (sr %#x)\n", GET_BM (index
), val
, r
->sr
);
911 dolog ("U nabm writew %#x <- %#x\n", addr
, val
);
916 static void nabm_writel (void *opaque
, uint32_t addr
, uint32_t val
)
918 PCIAC97LinkState
*d
= opaque
;
919 AC97LinkState
*s
= &d
->ac97
;
920 AC97BusMasterRegs
*r
= NULL
;
921 uint32_t index
= addr
- s
->base
[1];
926 r
= &s
->bm_regs
[GET_BM (index
)];
928 dolog ("BDBAR[%d] <- %#x (bdbar %#x)\n",
929 GET_BM (index
), val
, r
->bdbar
);
936 if (!(val
& (GC_WR
| GC_CR
)))
937 s
->glob_cnt
= val
& GC_VALID_MASK
;
938 dolog ("glob_cnt <- %#x (glob_cnt %#x)\n", val
, s
->glob_cnt
);
941 s
->glob_sta
&= ~(val
& GS_WCLEAR_MASK
);
942 s
->glob_sta
|= (val
& ~(GS_WCLEAR_MASK
| GS_RO_MASK
)) & GS_VALID_MASK
;
943 dolog ("glob_sta <- %#x (glob_sta %#x)\n", val
, s
->glob_sta
);
946 dolog ("U nabm writel %#x <- %#x\n", addr
, val
);
951 static int write_audio (AC97LinkState
*s
, AC97BusMasterRegs
*r
,
954 uint8_t tmpbuf
[4096];
955 uint32_t addr
= r
->bd
.addr
;
956 uint32_t temp
= r
->picb
<< 1;
957 uint32_t written
= 0;
959 temp
= audio_MIN (temp
, max
);
968 to_copy
= audio_MIN (temp
, sizeof (tmpbuf
));
969 cpu_physical_memory_read (addr
, tmpbuf
, to_copy
);
970 copied
= AUD_write (s
->voice_po
, tmpbuf
, to_copy
);
971 dolog ("write_audio max=%x to_copy=%x copied=%x\n",
972 max
, to_copy
, copied
);
988 s
->last_samp
= *(uint32_t *) &tmpbuf
[to_copy
- 4];
996 static void write_bup (AC97LinkState
*s
, int elapsed
)
1000 dolog ("write_bup\n");
1001 if (!(s
->bup_flag
& BUP_SET
)) {
1002 if (s
->bup_flag
& BUP_LAST
) {
1004 uint8_t *p
= s
->silence
;
1005 for (i
= 0; i
< sizeof (s
->silence
) / 4; i
++, p
+= 4) {
1006 *(uint32_t *) p
= s
->last_samp
;
1010 memset (s
->silence
, 0, sizeof (s
->silence
));
1012 s
->bup_flag
|= BUP_SET
;
1016 int temp
= audio_MIN (elapsed
, sizeof (s
->silence
));
1018 int copied
= AUD_write (s
->voice_po
, s
->silence
, temp
);
1028 static int read_audio (AC97LinkState
*s
, AC97BusMasterRegs
*r
,
1031 uint8_t tmpbuf
[4096];
1032 uint32_t addr
= r
->bd
.addr
;
1033 uint32_t temp
= r
->picb
<< 1;
1036 SWVoiceIn
*voice
= (r
- s
->bm_regs
) == MC_INDEX
? s
->voice_mc
: s
->voice_pi
;
1038 temp
= audio_MIN (temp
, max
);
1047 to_copy
= audio_MIN (temp
, sizeof (tmpbuf
));
1048 acquired
= AUD_read (voice
, tmpbuf
, to_copy
);
1053 cpu_physical_memory_write (addr
, tmpbuf
, acquired
);
1063 static void transfer_audio (AC97LinkState
*s
, int index
, int elapsed
)
1065 AC97BusMasterRegs
*r
= &s
->bm_regs
[index
];
1066 int written
= 0, stop
= 0;
1068 if (r
->sr
& SR_DCH
) {
1069 if (r
->cr
& CR_RPBM
) {
1072 write_bup (s
, elapsed
);
1079 while ((elapsed
>> 1) && !stop
) {
1083 dolog ("invalid bd\n");
1088 dolog ("fresh bd %d is empty %#x %#x\n",
1089 r
->civ
, r
->bd
.addr
, r
->bd
.ctl_len
);
1090 if (r
->civ
== r
->lvi
) {
1091 r
->sr
|= SR_DCH
; /* CELV? */
1097 r
->piv
= (r
->piv
+ 1) % 32;
1104 temp
= write_audio (s
, r
, elapsed
, &stop
);
1107 r
->picb
-= (temp
>> 1);
1112 temp
= read_audio (s
, r
, elapsed
, &stop
);
1114 r
->picb
-= (temp
>> 1);
1119 uint32_t new_sr
= r
->sr
& ~SR_CELV
;
1121 if (r
->bd
.ctl_len
& BD_IOC
) {
1125 if (r
->civ
== r
->lvi
) {
1126 dolog ("Underrun civ (%d) == lvi (%d)\n", r
->civ
, r
->lvi
);
1128 new_sr
|= SR_LVBCI
| SR_DCH
| SR_CELV
;
1130 s
->bup_flag
= (r
->bd
.ctl_len
& BD_BUP
) ? BUP_LAST
: 0;
1134 r
->piv
= (r
->piv
+ 1) % 32;
1138 update_sr (s
, r
, new_sr
);
1143 static void pi_callback (void *opaque
, int avail
)
1145 transfer_audio (opaque
, PI_INDEX
, avail
);
1148 static void mc_callback (void *opaque
, int avail
)
1150 transfer_audio (opaque
, MC_INDEX
, avail
);
1153 static void po_callback (void *opaque
, int free
)
1155 transfer_audio (opaque
, PO_INDEX
, free
);
1158 static void ac97_save (QEMUFile
*f
, void *opaque
)
1161 uint8_t active
[LAST_INDEX
];
1162 AC97LinkState
*s
= opaque
;
1164 qemu_put_be32s (f
, &s
->glob_cnt
);
1165 qemu_put_be32s (f
, &s
->glob_sta
);
1166 qemu_put_be32s (f
, &s
->cas
);
1168 for (i
= 0; i
< sizeof (s
->bm_regs
) / sizeof (s
->bm_regs
[0]); ++i
) {
1169 AC97BusMasterRegs
*r
= &s
->bm_regs
[i
];
1170 qemu_put_be32s (f
, &r
->bdbar
);
1171 qemu_put_8s (f
, &r
->civ
);
1172 qemu_put_8s (f
, &r
->lvi
);
1173 qemu_put_be16s (f
, &r
->sr
);
1174 qemu_put_be16s (f
, &r
->picb
);
1175 qemu_put_8s (f
, &r
->piv
);
1176 qemu_put_8s (f
, &r
->cr
);
1177 qemu_put_be32s (f
, &r
->bd_valid
);
1178 qemu_put_be32s (f
, &r
->bd
.addr
);
1179 qemu_put_be32s (f
, &r
->bd
.ctl_len
);
1181 qemu_put_buffer (f
, s
->mixer_data
, sizeof (s
->mixer_data
));
1183 active
[PI_INDEX
] = AUD_is_active_in (s
->voice_pi
) ? 1 : 0;
1184 active
[PO_INDEX
] = AUD_is_active_out (s
->voice_po
) ? 1 : 0;
1185 active
[MC_INDEX
] = AUD_is_active_in (s
->voice_mc
) ? 1 : 0;
1186 qemu_put_buffer (f
, active
, sizeof (active
));
1189 static int ac97_load (QEMUFile
*f
, void *opaque
, int version_id
)
1192 uint8_t active
[LAST_INDEX
];
1193 AC97LinkState
*s
= opaque
;
1195 if (version_id
!= 1)
1198 qemu_get_be32s (f
, &s
->glob_cnt
);
1199 qemu_get_be32s (f
, &s
->glob_sta
);
1200 qemu_get_be32s (f
, &s
->cas
);
1202 for (i
= 0; i
< sizeof (s
->bm_regs
) / sizeof (s
->bm_regs
[0]); ++i
) {
1203 AC97BusMasterRegs
*r
= &s
->bm_regs
[i
];
1204 qemu_get_be32s (f
, &r
->bdbar
);
1205 qemu_get_8s (f
, &r
->civ
);
1206 qemu_get_8s (f
, &r
->lvi
);
1207 qemu_get_be16s (f
, &r
->sr
);
1208 qemu_get_be16s (f
, &r
->picb
);
1209 qemu_get_8s (f
, &r
->piv
);
1210 qemu_get_8s (f
, &r
->cr
);
1211 qemu_get_be32s (f
, &r
->bd_valid
);
1212 qemu_get_be32s (f
, &r
->bd
.addr
);
1213 qemu_get_be32s (f
, &r
->bd
.ctl_len
);
1215 qemu_get_buffer (f
, s
->mixer_data
, sizeof (s
->mixer_data
));
1216 qemu_get_buffer (f
, active
, sizeof (active
));
1219 record_select (s
, mixer_load (s
, AC97_Record_Select
));
1220 #define V_(a, b) set_volume (s, a, b, mixer_load (s, a))
1221 V_ (AC97_Master_Volume_Mute
, AUD_MIXER_VOLUME
);
1222 V_ (AC97_PCM_Out_Volume_Mute
, AUD_MIXER_PCM
);
1223 V_ (AC97_Line_In_Volume_Mute
, AUD_MIXER_LINE_IN
);
1226 reset_voices (s
, active
);
1233 static void ac97_map (PCIDevice
*pci_dev
, int region_num
,
1234 uint32_t addr
, uint32_t size
, int type
)
1236 PCIAC97LinkState
*d
= (PCIAC97LinkState
*) pci_dev
;
1237 AC97LinkState
*s
= &d
->ac97
;
1241 register_ioport_read (addr
, 256 * 1, 1, nam_readb
, d
);
1242 register_ioport_read (addr
, 256 * 2, 2, nam_readw
, d
);
1243 register_ioport_read (addr
, 256 * 4, 4, nam_readl
, d
);
1244 register_ioport_write (addr
, 256 * 1, 1, nam_writeb
, d
);
1245 register_ioport_write (addr
, 256 * 2, 2, nam_writew
, d
);
1246 register_ioport_write (addr
, 256 * 4, 4, nam_writel
, d
);
1250 register_ioport_read (addr
, 64 * 1, 1, nabm_readb
, d
);
1251 register_ioport_read (addr
, 64 * 2, 2, nabm_readw
, d
);
1252 register_ioport_read (addr
, 64 * 4, 4, nabm_readl
, d
);
1253 register_ioport_write (addr
, 64 * 1, 1, nabm_writeb
, d
);
1254 register_ioport_write (addr
, 64 * 2, 2, nabm_writew
, d
);
1255 register_ioport_write (addr
, 64 * 4, 4, nabm_writel
, d
);
1259 static void ac97_on_reset (void *opaque
)
1261 AC97LinkState
*s
= opaque
;
1263 reset_bm_regs (s
, &s
->bm_regs
[0]);
1264 reset_bm_regs (s
, &s
->bm_regs
[1]);
1265 reset_bm_regs (s
, &s
->bm_regs
[2]);
1268 * Reset the mixer too. The Windows XP driver seems to rely on
1269 * this. At least it wants to read the vendor id before it resets
1270 * the codec manually.
1275 int ac97_init (PCIBus
*bus
, AudioState
*audio
)
1277 PCIAC97LinkState
*d
;
1282 AUD_log ("ac97", "No PCI bus\n");
1287 AUD_log ("ac97", "No audio state\n");
1291 d
= (PCIAC97LinkState
*) pci_register_device (bus
, "AC97",
1292 sizeof (PCIAC97LinkState
),
1296 AUD_log ("ac97", "Failed to register PCI device\n");
1301 s
->pci_dev
= &d
->dev
;
1303 c
[0x00] = 0x86; /* vid vendor id intel ro */
1304 c
[0x01] = 0x80; /* intel */
1306 c
[0x02] = 0x15; /* did device id 82801 ro */
1307 c
[0x03] = 0x24; /* 82801aa */
1309 c
[0x04] = 0x00; /* pcicmd pci command rw, ro */
1312 c
[0x06] = 0x80; /* pcists pci status rwc, ro */
1315 c
[0x08] = 0x01; /* rid revision ro */
1316 c
[0x09] = 0x00; /* pi programming interface ro */
1317 c
[0x0a] = 0x01; /* scc sub class code ro */
1318 c
[0x0b] = 0x04; /* bcc base class code ro */
1319 c
[0x0e] = 0x00; /* headtyp header type ro */
1321 c
[0x10] = 0x01; /* nabmar native audio mixer base
1327 c
[0x14] = 0x01; /* nabmbar native audio bus mastering
1333 c
[0x2c] = 0x86; /* svid subsystem vendor id rwo */
1336 c
[0x2e] = 0x00; /* sid subsystem id rwo */
1339 c
[0x3c] = 0x00; /* intr_ln interrupt line rw */
1340 c
[0x3d] = 0x01; /* intr_pn interrupt pin ro */
1342 pci_register_io_region (&d
->dev
, 0, 256 * 4, PCI_ADDRESS_SPACE_IO
, ac97_map
);
1343 pci_register_io_region (&d
->dev
, 1, 64 * 4, PCI_ADDRESS_SPACE_IO
, ac97_map
);
1344 register_savevm ("ac97", 0, 1, ac97_save
, ac97_load
, s
);
1345 qemu_register_reset (ac97_on_reset
, s
);
1346 AUD_register_card (audio
, "ac97", &s
->card
);