2 * Itanium Platform Emulator derived from QEMU PC System Emulator
4 * Copyright (c) 2003-2004 Fabrice Bellard
6 * Copyright (c) 2007 Intel
7 * Ported for IA64 Platform Zhang Xiantao <xiantao.zhang@intel.com>
9 * Permission is hereby granted, free of charge, to any person obtaining a copy
10 * of this software and associated documentation files (the "Software"), to deal
11 * in the Software without restriction, including without limitation the rights
12 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
13 * copies of the Software, and to permit persons to whom the Software is
14 * furnished to do so, subject to the following conditions:
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
34 #include "audio/audio.h"
39 #include "ia64intrin.h"
41 #include "device-assignment.h"
45 #define FW_FILENAME "Flash.fd"
47 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
48 #define ACPI_DATA_SIZE 0x10000
52 static fdctrl_t
*floppy_controller
;
53 static RTCState
*rtc_state
;
54 static PCIDevice
*i440fx_state
;
56 static uint32_t ipf_to_legacy_io(target_phys_addr_t addr
)
58 return (uint32_t)(((addr
&0x3ffffff) >> 12 << 2)|((addr
) & 0x3));
61 static void ipf_legacy_io_writeb(void *opaque
, target_phys_addr_t addr
,
63 uint32_t port
= ipf_to_legacy_io(addr
);
65 cpu_outb(0, port
, val
);
68 static void ipf_legacy_io_writew(void *opaque
, target_phys_addr_t addr
,
70 uint32_t port
= ipf_to_legacy_io(addr
);
72 cpu_outw(0, port
, val
);
75 static void ipf_legacy_io_writel(void *opaque
, target_phys_addr_t addr
,
77 uint32_t port
= ipf_to_legacy_io(addr
);
79 cpu_outl(0, port
, val
);
82 static uint32_t ipf_legacy_io_readb(void *opaque
, target_phys_addr_t addr
)
84 uint32_t port
= ipf_to_legacy_io(addr
);
86 return cpu_inb(0, port
);
89 static uint32_t ipf_legacy_io_readw(void *opaque
, target_phys_addr_t addr
)
91 uint32_t port
= ipf_to_legacy_io(addr
);
93 return cpu_inw(0, port
);
96 static uint32_t ipf_legacy_io_readl(void *opaque
, target_phys_addr_t addr
)
98 uint32_t port
= ipf_to_legacy_io(addr
);
100 return cpu_inl(0, port
);
103 static CPUReadMemoryFunc
*ipf_legacy_io_read
[3] = {
109 static CPUWriteMemoryFunc
*ipf_legacy_io_write
[3] = {
110 ipf_legacy_io_writeb
,
111 ipf_legacy_io_writew
,
112 ipf_legacy_io_writel
,
115 static void pic_irq_request(void *opaque
, int irq
, int level
)
117 fprintf(stderr
,"pic_irq_request called!\n");
120 /* PC cmos mappings */
122 #define REG_EQUIPMENT_BYTE 0x14
124 static int cmos_get_fd_drive_type(int fd0
)
130 /* 1.44 Mb 3"5 drive */
134 /* 2.88 Mb 3"5 drive */
138 /* 1.2 Mb 5"5 drive */
148 static void cmos_init_hd(int type_ofs
, int info_ofs
, BlockDriverState
*hd
)
150 RTCState
*s
= rtc_state
;
151 int cylinders
, heads
, sectors
;
153 bdrv_get_geometry_hint(hd
, &cylinders
, &heads
, §ors
);
154 rtc_set_memory(s
, type_ofs
, 47);
155 rtc_set_memory(s
, info_ofs
, cylinders
);
156 rtc_set_memory(s
, info_ofs
+ 1, cylinders
>> 8);
157 rtc_set_memory(s
, info_ofs
+ 2, heads
);
158 rtc_set_memory(s
, info_ofs
+ 3, 0xff);
159 rtc_set_memory(s
, info_ofs
+ 4, 0xff);
160 rtc_set_memory(s
, info_ofs
+ 5, 0xc0 | ((heads
> 8) << 3));
161 rtc_set_memory(s
, info_ofs
+ 6, cylinders
);
162 rtc_set_memory(s
, info_ofs
+ 7, cylinders
>> 8);
163 rtc_set_memory(s
, info_ofs
+ 8, sectors
);
166 /* convert boot_device letter to something recognizable by the bios */
167 static int boot_device2nibble(char boot_device
)
169 switch(boot_device
) {
172 return 0x01; /* floppy boot */
174 return 0x02; /* hard drive boot */
176 return 0x03; /* CD-ROM boot */
178 return 0x04; /* Network boot */
183 /* hd_table must contain 4 block drivers */
184 static void cmos_init(ram_addr_t ram_size
, ram_addr_t above_4g_mem_size
,
185 const char *boot_device
, BlockDriverState
**hd_table
)
187 RTCState
*s
= rtc_state
;
188 int nbds
, bds
[3] = { 0, };
193 /* various important CMOS locations needed by PC/Bochs bios */
196 val
= 640; /* base memory in K */
197 rtc_set_memory(s
, 0x15, val
);
198 rtc_set_memory(s
, 0x16, val
>> 8);
200 val
= (ram_size
/ 1024) - 1024;
203 rtc_set_memory(s
, 0x17, val
);
204 rtc_set_memory(s
, 0x18, val
>> 8);
205 rtc_set_memory(s
, 0x30, val
);
206 rtc_set_memory(s
, 0x31, val
>> 8);
208 if (above_4g_mem_size
) {
209 rtc_set_memory(s
, 0x5b, (unsigned int)above_4g_mem_size
>> 16);
210 rtc_set_memory(s
, 0x5c, (unsigned int)above_4g_mem_size
>> 24);
211 rtc_set_memory(s
, 0x5d, above_4g_mem_size
>> 32);
213 rtc_set_memory(s
, 0x5f, smp_cpus
- 1);
215 if (ram_size
> (16 * 1024 * 1024))
216 val
= (ram_size
/ 65536) - ((16 * 1024 * 1024) / 65536);
221 rtc_set_memory(s
, 0x34, val
);
222 rtc_set_memory(s
, 0x35, val
>> 8);
224 /* set boot devices, and disable floppy signature check if requested */
225 #define PC_MAX_BOOT_DEVICES 3
226 nbds
= strlen(boot_device
);
228 if (nbds
> PC_MAX_BOOT_DEVICES
) {
229 fprintf(stderr
, "Too many boot devices for PC\n");
233 for (i
= 0; i
< nbds
; i
++) {
234 bds
[i
] = boot_device2nibble(boot_device
[i
]);
236 fprintf(stderr
, "Invalid boot device for PC: '%c'\n",
242 rtc_set_memory(s
, 0x3d, (bds
[1] << 4) | bds
[0]);
243 rtc_set_memory(s
, 0x38, (bds
[2] << 4) | (fd_bootchk
? 0x0 : 0x1));
247 fd0
= fdctrl_get_drive_type(floppy_controller
, 0);
248 fd1
= fdctrl_get_drive_type(floppy_controller
, 1);
250 val
= (cmos_get_fd_drive_type(fd0
) << 4) | cmos_get_fd_drive_type(fd1
);
251 rtc_set_memory(s
, 0x10, val
);
264 val
|= 0x01; /* 1 drive, ready for boot */
267 val
|= 0x41; /* 2 drives, ready for boot */
271 val
|= 0x02; /* FPU is there */
272 val
|= 0x04; /* PS/2 mouse installed */
273 rtc_set_memory(s
, REG_EQUIPMENT_BYTE
, val
);
277 rtc_set_memory(s
, 0x12, (hd_table
[0] ? 0xf0 : 0) | (hd_table
[1] ? 0x0f : 0));
279 cmos_init_hd(0x19, 0x1b, hd_table
[0]);
281 cmos_init_hd(0x1a, 0x24, hd_table
[1]);
284 for (i
= 0; i
< 4; i
++) {
286 int cylinders
, heads
, sectors
, translation
;
287 /* NOTE: bdrv_get_geometry_hint() returns the physical
288 geometry. It is always such that: 1 <= sects <= 63, 1
289 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
290 geometry can be different if a translation is done. */
291 translation
= bdrv_get_translation_hint(hd_table
[i
]);
292 if (translation
== BIOS_ATA_TRANSLATION_AUTO
) {
293 bdrv_get_geometry_hint(hd_table
[i
], &cylinders
,
295 if (cylinders
<= 1024 && heads
<= 16 && sectors
<= 63) {
296 /* No translation. */
299 /* LBA translation. */
305 val
|= translation
<< (i
* 2);
308 rtc_set_memory(s
, 0x39, val
);
311 static void main_cpu_reset(void *opaque
)
313 CPUState
*env
= opaque
;
317 static const int ide_iobase
[2] = { 0x1f0, 0x170 };
318 static const int ide_iobase2
[2] = { 0x3f6, 0x376 };
319 static const int ide_irq
[2] = { 14, 15 };
321 #define NE2000_NB_MAX 6
323 static int ne2000_io
[NE2000_NB_MAX
] = { 0x300, 0x320, 0x340,
324 0x360, 0x280, 0x380 };
325 static int ne2000_irq
[NE2000_NB_MAX
] = { 9, 10, 11, 3, 4, 5 };
327 static int serial_io
[MAX_SERIAL_PORTS
] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
328 static int serial_irq
[MAX_SERIAL_PORTS
] = { 4, 3, 4, 3 };
330 static int parallel_io
[MAX_PARALLEL_PORTS
] = { 0x378, 0x278, 0x3bc };
331 static int parallel_irq
[MAX_PARALLEL_PORTS
] = { 7, 7, 7 };
334 static void audio_init (PCIBus
*pci_bus
, qemu_irq
*pic
)
337 int audio_enabled
= 0;
339 for (c
= soundhw
; !audio_enabled
&& c
->name
; ++c
) {
340 audio_enabled
= c
->enabled
;
348 for (c
= soundhw
; c
->name
; ++c
) {
351 c
->init
.init_isa (s
, pic
);
354 c
->init
.init_pci (pci_bus
, s
);
364 static void pc_init_ne2k_isa(NICInfo
*nd
, qemu_irq
*pic
)
366 static int nb_ne2k
= 0;
368 if (nb_ne2k
== NE2000_NB_MAX
)
370 isa_ne2000_init(ne2000_io
[nb_ne2k
], pic
[ne2000_irq
[nb_ne2k
]], nd
);
374 /* Itanium hardware initialisation */
375 static void ipf_init1(ram_addr_t ram_size
, int vga_ram_size
,
376 const char *boot_device
, DisplayState
*ds
,
377 const char *kernel_filename
, const char *kernel_cmdline
,
378 const char *initrd_filename
,
379 int pci_enabled
, const char *cpu_model
)
383 ram_addr_t ram_addr
, vga_ram_addr
;
384 ram_addr_t above_4g_mem_size
= 0;
386 int piix3_devfn
= -1;
393 unsigned long ipf_legacy_io_base
, ipf_legacy_io_mem
;
394 BlockDriverState
*hd
[MAX_IDE_BUS
* MAX_IDE_DEVS
];
395 BlockDriverState
*fd
[MAX_FD
];
397 page_size
= getpagesize();
398 if (page_size
!= TARGET_PAGE_SIZE
) {
399 fprintf(stderr
,"Error! Host page size != qemu target page size,"
400 " you may need to change TARGET_PAGE_BITS in qemu!"
401 "host page size:0x%x\n", page_size
);
405 if (ram_size
>= 0xc0000000 ) {
406 above_4g_mem_size
= ram_size
- 0xc0000000;
407 ram_size
= 0xc0000000;
411 if (cpu_model
== NULL
) {
415 for(i
= 0; i
< smp_cpus
; i
++) {
416 env
= cpu_init(cpu_model
);
418 fprintf(stderr
, "Unable to find CPU definition\n");
422 env
->hflags
|= HF_HALTED_MASK
;
423 register_savevm("cpu", i
, 4, cpu_save
, cpu_load
, env
);
424 qemu_register_reset(main_cpu_reset
, env
);
429 ram_addr
= qemu_ram_alloc(0xa0000);
430 cpu_register_physical_memory(0, 0xa0000, ram_addr
);
432 ram_addr
= qemu_ram_alloc(0x20000); // Workaround 0xa0000-0xc0000
434 ram_addr
= qemu_ram_alloc(0x40000);
435 cpu_register_physical_memory(0xc0000, 0x40000, ram_addr
);
437 ram_addr
= qemu_ram_alloc(ram_size
- 0x100000);
438 cpu_register_physical_memory(0x100000, ram_size
- 0x100000, ram_addr
);
440 ram_addr
= qemu_ram_alloc(ram_size
);
441 cpu_register_physical_memory(0, ram_size
, ram_addr
);
443 /* allocate VGA RAM */
444 vga_ram_addr
= qemu_ram_alloc(vga_ram_size
);
446 /* above 4giga memory allocation */
447 if (above_4g_mem_size
> 0) {
448 ram_addr
= qemu_ram_alloc(above_4g_mem_size
);
449 cpu_register_physical_memory(0x100000000, above_4g_mem_size
, ram_addr
);
452 /*Load firware to its proper position.*/
454 unsigned long image_size
;
456 uint8_t *fw_image_start
;
457 ram_addr_t fw_offset
= qemu_ram_alloc(GFW_SIZE
);
458 uint8_t *fw_start
= phys_ram_base
+ fw_offset
;
460 snprintf(buf
, sizeof(buf
), "%s/%s", bios_dir
, FW_FILENAME
);
461 image
= read_image(buf
, &image_size
);
462 if (NULL
== image
|| !image_size
) {
463 fprintf(stderr
, "Error when reading Guest Firmware!\n");
464 fprintf(stderr
, "Please check Guest firmware at %s\n", buf
);
467 fw_image_start
= fw_start
+ GFW_SIZE
- image_size
;
469 cpu_register_physical_memory(GFW_START
, GFW_SIZE
, fw_offset
);
470 memcpy(fw_image_start
, image
, image_size
);
473 flush_icache_range((unsigned long)fw_image_start
,
474 (unsigned long)fw_image_start
+ image_size
);
475 kvm_ia64_build_hob(ram_size
+ above_4g_mem_size
, smp_cpus
, fw_start
);
478 /*Register legacy io address space, size:64M*/
479 ipf_legacy_io_base
= 0xE0000000;
480 ipf_legacy_io_mem
= cpu_register_io_memory(0, ipf_legacy_io_read
,
481 ipf_legacy_io_write
, NULL
);
482 cpu_register_physical_memory(ipf_legacy_io_base
, 64*1024*1024,
485 cpu_irq
= qemu_allocate_irqs(pic_irq_request
, first_cpu
, 1);
486 i8259
= i8259_init(cpu_irq
[0]);
489 pci_bus
= i440fx_init(&i440fx_state
, i8259
);
490 piix3_devfn
= piix3_init(pci_bus
, -1);
495 if (cirrus_vga_enabled
) {
497 pci_cirrus_vga_init(pci_bus
, ds
, phys_ram_base
+ vga_ram_addr
,
498 vga_ram_addr
, vga_ram_size
);
500 isa_cirrus_vga_init(ds
, phys_ram_base
+ vga_ram_addr
,
501 vga_ram_addr
, vga_ram_size
);
505 pci_vga_init(pci_bus
, ds
, phys_ram_base
+ vga_ram_addr
,
506 vga_ram_addr
, vga_ram_size
, 0, 0);
508 isa_vga_init(ds
, phys_ram_base
+ vga_ram_addr
,
509 vga_ram_addr
, vga_ram_size
);
513 rtc_state
= rtc_init(0x70, i8259
[8]);
516 pic_set_alt_irq_func(isa_pic
, NULL
, NULL
);
519 for(i
= 0; i
< MAX_SERIAL_PORTS
; i
++) {
521 serial_init(serial_io
[i
], i8259
[serial_irq
[i
]], 115200,
526 for(i
= 0; i
< MAX_PARALLEL_PORTS
; i
++) {
527 if (parallel_hds
[i
]) {
528 parallel_init(parallel_io
[i
], i8259
[parallel_irq
[i
]],
533 for(i
= 0; i
< nb_nics
; i
++) {
537 nd
->model
= "ne2k_pci";
539 nd
->model
= "ne2k_isa";
542 if (strcmp(nd
->model
, "ne2k_isa") == 0) {
543 pc_init_ne2k_isa(nd
, i8259
);
544 } else if (pci_enabled
) {
545 if (strcmp(nd
->model
, "?") == 0)
546 fprintf(stderr
, "qemu: Supported ISA NICs: ne2k_isa\n");
547 if (!pci_nic_init(pci_bus
, nd
, -1))
549 } else if (strcmp(nd
->model
, "?") == 0) {
550 fprintf(stderr
, "qemu: Supported ISA NICs: ne2k_isa\n");
553 fprintf(stderr
, "qemu: Unsupported NIC: %s\n", nd
->model
);
558 #undef USE_HYPERCALL //Disable it now, need to implement later!
560 pci_hypercall_init(pci_bus
);
563 if (drive_get_max_bus(IF_IDE
) >= MAX_IDE_BUS
) {
564 fprintf(stderr
, "qemu: too many IDE bus\n");
568 for(i
= 0; i
< MAX_IDE_BUS
* MAX_IDE_DEVS
; i
++) {
569 index
= drive_get_index(IF_IDE
, i
/ MAX_IDE_DEVS
, i
% MAX_IDE_DEVS
);
571 hd
[i
] = drives_table
[index
].bdrv
;
577 pci_piix3_ide_init(pci_bus
, hd
, piix3_devfn
+ 1, i8259
);
579 for(i
= 0; i
< MAX_IDE_BUS
; i
++) {
580 isa_ide_init(ide_iobase
[i
], ide_iobase2
[i
], i8259
[ide_irq
[i
]],
581 hd
[MAX_IDE_DEVS
* i
], hd
[MAX_IDE_DEVS
* i
+ 1]);
585 i8042_init(i8259
[1], i8259
[12], 0x60);
588 audio_init(pci_enabled
? pci_bus
: NULL
, i8259
);
591 for(i
= 0; i
< MAX_FD
; i
++) {
592 index
= drive_get_index(IF_FLOPPY
, 0, i
);
594 fd
[i
] = drives_table
[index
].bdrv
;
598 floppy_controller
= fdctrl_init(i8259
[6], 2, 0, 0x3f0, fd
);
600 cmos_init(ram_size
, above_4g_mem_size
, boot_device
, hd
);
602 if (pci_enabled
&& usb_enabled
) {
603 usb_uhci_piix3_init(pci_bus
, piix3_devfn
+ 2);
606 if (pci_enabled
&& acpi_enabled
) {
607 uint8_t *eeprom_buf
= qemu_mallocz(8 * 256); /* XXX: make this persistent */
610 /* TODO: Populate SPD eeprom data. */
611 smbus
= piix4_pm_init(pci_bus
, piix3_devfn
+ 3, 0xb100, i8259
[9]);
612 for (i
= 0; i
< 8; i
++) {
613 smbus_eeprom_device_init(smbus
, 0x50 + i
, eeprom_buf
+ (i
* 256));
618 i440fx_init_memory_mappings(i440fx_state
);
626 max_bus
= drive_get_max_bus(IF_SCSI
);
628 for (bus
= 0; bus
<= max_bus
; bus
++) {
629 scsi
= lsi_scsi_init(pci_bus
, -1);
630 for (unit
= 0; unit
< LSI_MAX_DEVS
; unit
++) {
631 index
= drive_get_index(IF_SCSI
, bus
, unit
);
634 lsi_scsi_attach(scsi
, drives_table
[index
].bdrv
, unit
);
638 /* Add virtio block devices */
643 while ((index
= drive_get_index(IF_VIRTIO
, 0, unit_id
)) != -1) {
644 virtio_blk_init(pci_bus
, 0x1AF4, 0x1001, drives_table
[index
].bdrv
);
649 #ifdef USE_KVM_DEVICE_ASSIGNMENT
651 add_assigned_devices(pci_bus
, assigned_devices
, assigned_devices_index
);
652 #endif /* USE_KVM_DEVICE_ASSIGNMENT */
656 static void ipf_init_pci(ram_addr_t ram_size
, int vga_ram_size
,
657 const char *boot_device
, DisplayState
*ds
,
658 const char *kernel_filename
,
659 const char *kernel_cmdline
,
660 const char *initrd_filename
,
661 const char *cpu_model
)
663 ipf_init1(ram_size
, vga_ram_size
, boot_device
, ds
, kernel_filename
,
664 kernel_cmdline
, initrd_filename
, 1, cpu_model
);
667 QEMUMachine ipf_machine
= {
669 .desc
= "Itanium Platform",
670 .init
= ipf_init_pci
,
671 .ram_require
= VGA_RAM_SIZE
+ GFW_SIZE
,
675 #define IOAPIC_NUM_PINS 48
677 static int ioapic_irq_count
[IOAPIC_NUM_PINS
];
679 static int ioapic_map_irq(int devfn
, int irq_num
)
683 irq
= ((((dev
<< 2) + (dev
>> 3) + irq_num
) & 31) + 16);
687 void ioapic_set_irq(void *opaque
, int irq_num
, int level
)
691 PCIDevice
*pci_dev
= (PCIDevice
*)opaque
;
692 vector
= ioapic_map_irq(pci_dev
->devfn
, irq_num
);
695 ioapic_irq_count
[vector
] += 1;
697 ioapic_irq_count
[vector
] -= 1;
700 if (kvm_set_irq(vector
, ioapic_irq_count
[vector
] == 0))
705 int ipf_map_irq(PCIDevice
*pci_dev
, int irq_num
)
707 return ioapic_map_irq(pci_dev
->devfn
, irq_num
);