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kvm: user: set $PROCESSOR from configure --arch=<arch>-<processor>
[qemu-kvm/fedora.git] / linux-user / main.c
blobbfb796b9d226ecba15de484dd3e12e9573d60d06
1 /*
2 * qemu user main
3 *
4 * Copyright (c) 2003-2008 Fabrice Bellard
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20 #include <stdlib.h>
21 #include <stdio.h>
22 #include <stdarg.h>
23 #include <string.h>
24 #include <errno.h>
25 #include <unistd.h>
26
27 #include "qemu.h"
28 #include "qemu-common.h"
29 /* For tb_lock */
30 #include "exec-all.h"
31
32 #define DEBUG_LOGFILE "/tmp/qemu.log"
33
34 static const char *interp_prefix = CONFIG_QEMU_PREFIX;
35 const char *qemu_uname_release = CONFIG_UNAME_RELEASE;
36 const char *cpu_vendor_string = NULL;
37
38 #if defined(__i386__) && !defined(CONFIG_STATIC)
39 /* Force usage of an ELF interpreter even if it is an ELF shared
40 object ! */
41 const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2";
42 #endif
43
44 /* for recent libc, we add these dummy symbols which are not declared
45 when generating a linked object (bug in ld ?) */
46 #if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(CONFIG_STATIC)
47 asm(".globl __preinit_array_start\n"
48 ".globl __preinit_array_end\n"
49 ".globl __init_array_start\n"
50 ".globl __init_array_end\n"
51 ".globl __fini_array_start\n"
52 ".globl __fini_array_end\n"
53 ".section \".rodata\"\n"
54 "__preinit_array_start:\n"
55 "__preinit_array_end:\n"
56 "__init_array_start:\n"
57 "__init_array_end:\n"
58 "__fini_array_start:\n"
59 "__fini_array_end:\n"
60 ".long 0\n"
61 ".previous\n");
62 #endif
63
64 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
65 we allocate a bigger stack. Need a better solution, for example
66 by remapping the process stack directly at the right place */
67 unsigned long x86_stack_size = 512 * 1024;
68
69 void gemu_log(const char *fmt, ...)
70 {
71 va_list ap;
72
73 va_start(ap, fmt);
74 vfprintf(stderr, fmt, ap);
75 va_end(ap);
76 }
77
78 void cpu_outb(CPUState *env, int addr, int val)
79 {
80 fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val);
81 }
82
83 void cpu_outw(CPUState *env, int addr, int val)
84 {
85 fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val);
86 }
87
88 void cpu_outl(CPUState *env, int addr, int val)
89 {
90 fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val);
91 }
92
93 int cpu_inb(CPUState *env, int addr)
94 {
95 fprintf(stderr, "inb: port=0x%04x\n", addr);
96 return 0;
97 }
98
99 int cpu_inw(CPUState *env, int addr)
100 {
101 fprintf(stderr, "inw: port=0x%04x\n", addr);
102 return 0;
103 }
104
105 int cpu_inl(CPUState *env, int addr)
106 {
107 fprintf(stderr, "inl: port=0x%04x\n", addr);
108 return 0;
109 }
110
111 #if defined(TARGET_I386)
112 int cpu_get_pic_interrupt(CPUState *env)
113 {
114 return -1;
115 }
116 #endif
117
118 /* timers for rdtsc */
119
120 #if 0
121
122 static uint64_t emu_time;
123
124 int64_t cpu_get_real_ticks(void)
125 {
126 return emu_time++;
127 }
128
129 #endif
130
131 #if defined(USE_NPTL)
132 /***********************************************************/
133 /* Helper routines for implementing atomic operations. */
134
135 /* To implement exclusive operations we force all cpus to syncronise.
136 We don't require a full sync, only that no cpus are executing guest code.
137 The alternative is to map target atomic ops onto host equivalents,
138 which requires quite a lot of per host/target work. */
139 static pthread_mutex_t exclusive_lock = PTHREAD_MUTEX_INITIALIZER;
140 static pthread_cond_t exclusive_cond = PTHREAD_COND_INITIALIZER;
141 static pthread_cond_t exclusive_resume = PTHREAD_COND_INITIALIZER;
142 static int pending_cpus;
143
144 /* Make sure everything is in a consistent state for calling fork(). */
145 void fork_start(void)
146 {
147 mmap_fork_start();
148 pthread_mutex_lock(&tb_lock);
149 pthread_mutex_lock(&exclusive_lock);
150 }
151
152 void fork_end(int child)
153 {
154 if (child) {
155 /* Child processes created by fork() only have a single thread.
156 Discard information about the parent threads. */
157 first_cpu = thread_env;
158 thread_env->next_cpu = NULL;
159 pending_cpus = 0;
160 pthread_mutex_init(&exclusive_lock, NULL);
161 pthread_cond_init(&exclusive_cond, NULL);
162 pthread_cond_init(&exclusive_resume, NULL);
163 pthread_mutex_init(&tb_lock, NULL);
164 } else {
165 pthread_mutex_unlock(&exclusive_lock);
166 pthread_mutex_unlock(&tb_lock);
167 }
168 mmap_fork_end(child);
169 }
170
171 /* Wait for pending exclusive operations to complete. The exclusive lock
172 must be held. */
173 static inline void exclusive_idle(void)
174 {
175 while (pending_cpus) {
176 pthread_cond_wait(&exclusive_resume, &exclusive_lock);
177 }
178 }
179
180 /* Start an exclusive operation.
181 Must only be called from outside cpu_arm_exec. */
182 static inline void start_exclusive(void)
183 {
184 CPUState *other;
185 pthread_mutex_lock(&exclusive_lock);
186 exclusive_idle();
187
188 pending_cpus = 1;
189 /* Make all other cpus stop executing. */
190 for (other = first_cpu; other; other = other->next_cpu) {
191 if (other->running) {
192 pending_cpus++;
193 cpu_interrupt(other, CPU_INTERRUPT_EXIT);
194 }
195 }
196 if (pending_cpus > 1) {
197 pthread_cond_wait(&exclusive_cond, &exclusive_lock);
198 }
199 }
200
201 /* Finish an exclusive operation. */
202 static inline void end_exclusive(void)
203 {
204 pending_cpus = 0;
205 pthread_cond_broadcast(&exclusive_resume);
206 pthread_mutex_unlock(&exclusive_lock);
207 }
208
209 /* Wait for exclusive ops to finish, and begin cpu execution. */
210 static inline void cpu_exec_start(CPUState *env)
211 {
212 pthread_mutex_lock(&exclusive_lock);
213 exclusive_idle();
214 env->running = 1;
215 pthread_mutex_unlock(&exclusive_lock);
216 }
217
218 /* Mark cpu as not executing, and release pending exclusive ops. */
219 static inline void cpu_exec_end(CPUState *env)
220 {
221 pthread_mutex_lock(&exclusive_lock);
222 env->running = 0;
223 if (pending_cpus > 1) {
224 pending_cpus--;
225 if (pending_cpus == 1) {
226 pthread_cond_signal(&exclusive_cond);
227 }
228 }
229 exclusive_idle();
230 pthread_mutex_unlock(&exclusive_lock);
231 }
232 #else /* if !USE_NPTL */
233 /* These are no-ops because we are not threadsafe. */
234 static inline void cpu_exec_start(CPUState *env)
235 {
236 }
237
238 static inline void cpu_exec_end(CPUState *env)
239 {
240 }
241
242 static inline void start_exclusive(void)
243 {
244 }
245
246 static inline void end_exclusive(void)
247 {
248 }
249
250 void fork_start(void)
251 {
252 }
253
254 void fork_end(int child)
255 {
256 }
257 #endif
258
259
260 #ifdef TARGET_I386
261 /***********************************************************/
262 /* CPUX86 core interface */
263
264 void cpu_smm_update(CPUState *env)
265 {
266 }
267
268 uint64_t cpu_get_tsc(CPUX86State *env)
269 {
270 return cpu_get_real_ticks();
271 }
272
273 static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
274 int flags)
275 {
276 unsigned int e1, e2;
277 uint32_t *p;
278 e1 = (addr << 16) | (limit & 0xffff);
279 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
280 e2 |= flags;
281 p = ptr;
282 p[0] = tswap32(e1);
283 p[1] = tswap32(e2);
284 }
285
286 #ifdef TARGET_X86_64
287 static uint64_t idt_table[512];
288
289 static void set_gate64(void *ptr, unsigned int type, unsigned int dpl,
290 uint64_t addr, unsigned int sel)
291 {
292 uint32_t *p, e1, e2;
293 e1 = (addr & 0xffff) | (sel << 16);
294 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
295 p = ptr;
296 p[0] = tswap32(e1);
297 p[1] = tswap32(e2);
298 p[2] = tswap32(addr >> 32);
299 p[3] = 0;
300 }
301 /* only dpl matters as we do only user space emulation */
302 static void set_idt(int n, unsigned int dpl)
303 {
304 set_gate64(idt_table + n * 2, 0, dpl, 0, 0);
305 }
306 #else
307 static uint64_t idt_table[256];
308
309 static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
310 uint32_t addr, unsigned int sel)
311 {
312 uint32_t *p, e1, e2;
313 e1 = (addr & 0xffff) | (sel << 16);
314 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
315 p = ptr;
316 p[0] = tswap32(e1);
317 p[1] = tswap32(e2);
318 }
319
320 /* only dpl matters as we do only user space emulation */
321 static void set_idt(int n, unsigned int dpl)
322 {
323 set_gate(idt_table + n, 0, dpl, 0, 0);
324 }
325 #endif
326
327 void cpu_loop(CPUX86State *env)
328 {
329 int trapnr;
330 abi_ulong pc;
331 target_siginfo_t info;
332
333 for(;;) {
334 trapnr = cpu_x86_exec(env);
335 switch(trapnr) {
336 case 0x80:
337 /* linux syscall from int $0x80 */
338 env->regs[R_EAX] = do_syscall(env,
339 env->regs[R_EAX],
340 env->regs[R_EBX],
341 env->regs[R_ECX],
342 env->regs[R_EDX],
343 env->regs[R_ESI],
344 env->regs[R_EDI],
345 env->regs[R_EBP]);
346 break;
347 #ifndef TARGET_ABI32
348 case EXCP_SYSCALL:
349 /* linux syscall from syscall intruction */
350 env->regs[R_EAX] = do_syscall(env,
351 env->regs[R_EAX],
352 env->regs[R_EDI],
353 env->regs[R_ESI],
354 env->regs[R_EDX],
355 env->regs[10],
356 env->regs[8],
357 env->regs[9]);
358 env->eip = env->exception_next_eip;
359 break;
360 #endif
361 case EXCP0B_NOSEG:
362 case EXCP0C_STACK:
363 info.si_signo = SIGBUS;
364 info.si_errno = 0;
365 info.si_code = TARGET_SI_KERNEL;
366 info._sifields._sigfault._addr = 0;
367 queue_signal(env, info.si_signo, &info);
368 break;
369 case EXCP0D_GPF:
370 /* XXX: potential problem if ABI32 */
371 #ifndef TARGET_X86_64
372 if (env->eflags & VM_MASK) {
373 handle_vm86_fault(env);
374 } else
375 #endif
376 {
377 info.si_signo = SIGSEGV;
378 info.si_errno = 0;
379 info.si_code = TARGET_SI_KERNEL;
380 info._sifields._sigfault._addr = 0;
381 queue_signal(env, info.si_signo, &info);
382 }
383 break;
384 case EXCP0E_PAGE:
385 info.si_signo = SIGSEGV;
386 info.si_errno = 0;
387 if (!(env->error_code & 1))
388 info.si_code = TARGET_SEGV_MAPERR;
389 else
390 info.si_code = TARGET_SEGV_ACCERR;
391 info._sifields._sigfault._addr = env->cr[2];
392 queue_signal(env, info.si_signo, &info);
393 break;
394 case EXCP00_DIVZ:
395 #ifndef TARGET_X86_64
396 if (env->eflags & VM_MASK) {
397 handle_vm86_trap(env, trapnr);
398 } else
399 #endif
400 {
401 /* division by zero */
402 info.si_signo = SIGFPE;
403 info.si_errno = 0;
404 info.si_code = TARGET_FPE_INTDIV;
405 info._sifields._sigfault._addr = env->eip;
406 queue_signal(env, info.si_signo, &info);
407 }
408 break;
409 case EXCP01_SSTP:
410 case EXCP03_INT3:
411 #ifndef TARGET_X86_64
412 if (env->eflags & VM_MASK) {
413 handle_vm86_trap(env, trapnr);
414 } else
415 #endif
416 {
417 info.si_signo = SIGTRAP;
418 info.si_errno = 0;
419 if (trapnr == EXCP01_SSTP) {
420 info.si_code = TARGET_TRAP_BRKPT;
421 info._sifields._sigfault._addr = env->eip;
422 } else {
423 info.si_code = TARGET_SI_KERNEL;
424 info._sifields._sigfault._addr = 0;
425 }
426 queue_signal(env, info.si_signo, &info);
427 }
428 break;
429 case EXCP04_INTO:
430 case EXCP05_BOUND:
431 #ifndef TARGET_X86_64
432 if (env->eflags & VM_MASK) {
433 handle_vm86_trap(env, trapnr);
434 } else
435 #endif
436 {
437 info.si_signo = SIGSEGV;
438 info.si_errno = 0;
439 info.si_code = TARGET_SI_KERNEL;
440 info._sifields._sigfault._addr = 0;
441 queue_signal(env, info.si_signo, &info);
442 }
443 break;
444 case EXCP06_ILLOP:
445 info.si_signo = SIGILL;
446 info.si_errno = 0;
447 info.si_code = TARGET_ILL_ILLOPN;
448 info._sifields._sigfault._addr = env->eip;
449 queue_signal(env, info.si_signo, &info);
450 break;
451 case EXCP_INTERRUPT:
452 /* just indicate that signals should be handled asap */
453 break;
454 case EXCP_DEBUG:
455 {
456 int sig;
457
458 sig = gdb_handlesig (env, TARGET_SIGTRAP);
459 if (sig)
460 {
461 info.si_signo = sig;
462 info.si_errno = 0;
463 info.si_code = TARGET_TRAP_BRKPT;
464 queue_signal(env, info.si_signo, &info);
465 }
466 }
467 break;
468 default:
469 pc = env->segs[R_CS].base + env->eip;
470 fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
471 (long)pc, trapnr);
472 abort();
473 }
474 process_pending_signals(env);
475 }
476 }
477 #endif
478
479 #ifdef TARGET_ARM
480
481 static void arm_cache_flush(abi_ulong start, abi_ulong last)
482 {
483 abi_ulong addr, last1;
484
485 if (last < start)
486 return;
487 addr = start;
488 for(;;) {
489 last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1;
490 if (last1 > last)
491 last1 = last;
492 tb_invalidate_page_range(addr, last1 + 1);
493 if (last1 == last)
494 break;
495 addr = last1 + 1;
496 }
497 }
498
499 /* Handle a jump to the kernel code page. */
500 static int
501 do_kernel_trap(CPUARMState *env)
502 {
503 uint32_t addr;
504 uint32_t cpsr;
505 uint32_t val;
506
507 switch (env->regs[15]) {
508 case 0xffff0fa0: /* __kernel_memory_barrier */
509 /* ??? No-op. Will need to do better for SMP. */
510 break;
511 case 0xffff0fc0: /* __kernel_cmpxchg */
512 /* XXX: This only works between threads, not between processes.
513 It's probably possible to implement this with native host
514 operations. However things like ldrex/strex are much harder so
515 there's not much point trying. */
516 start_exclusive();
517 cpsr = cpsr_read(env);
518 addr = env->regs[2];
519 /* FIXME: This should SEGV if the access fails. */
520 if (get_user_u32(val, addr))
521 val = ~env->regs[0];
522 if (val == env->regs[0]) {
523 val = env->regs[1];
524 /* FIXME: Check for segfaults. */
525 put_user_u32(val, addr);
526 env->regs[0] = 0;
527 cpsr |= CPSR_C;
528 } else {
529 env->regs[0] = -1;
530 cpsr &= ~CPSR_C;
531 }
532 cpsr_write(env, cpsr, CPSR_C);
533 end_exclusive();
534 break;
535 case 0xffff0fe0: /* __kernel_get_tls */
536 env->regs[0] = env->cp15.c13_tls2;
537 break;
538 default:
539 return 1;
540 }
541 /* Jump back to the caller. */
542 addr = env->regs[14];
543 if (addr & 1) {
544 env->thumb = 1;
545 addr &= ~1;
546 }
547 env->regs[15] = addr;
548
549 return 0;
550 }
551
552 void cpu_loop(CPUARMState *env)
553 {
554 int trapnr;
555 unsigned int n, insn;
556 target_siginfo_t info;
557 uint32_t addr;
558
559 for(;;) {
560 cpu_exec_start(env);
561 trapnr = cpu_arm_exec(env);
562 cpu_exec_end(env);
563 switch(trapnr) {
564 case EXCP_UDEF:
565 {
566 TaskState *ts = env->opaque;
567 uint32_t opcode;
568 int rc;
569
570 /* we handle the FPU emulation here, as Linux */
571 /* we get the opcode */
572 /* FIXME - what to do if get_user() fails? */
573 get_user_u32(opcode, env->regs[15]);
574
575 rc = EmulateAll(opcode, &ts->fpa, env);
576 if (rc == 0) { /* illegal instruction */
577 info.si_signo = SIGILL;
578 info.si_errno = 0;
579 info.si_code = TARGET_ILL_ILLOPN;
580 info._sifields._sigfault._addr = env->regs[15];
581 queue_signal(env, info.si_signo, &info);
582 } else if (rc < 0) { /* FP exception */
583 int arm_fpe=0;
584
585 /* translate softfloat flags to FPSR flags */
586 if (-rc & float_flag_invalid)
587 arm_fpe |= BIT_IOC;
588 if (-rc & float_flag_divbyzero)
589 arm_fpe |= BIT_DZC;
590 if (-rc & float_flag_overflow)
591 arm_fpe |= BIT_OFC;
592 if (-rc & float_flag_underflow)
593 arm_fpe |= BIT_UFC;
594 if (-rc & float_flag_inexact)
595 arm_fpe |= BIT_IXC;
596
597 FPSR fpsr = ts->fpa.fpsr;
598 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
599
600 if (fpsr & (arm_fpe << 16)) { /* exception enabled? */
601 info.si_signo = SIGFPE;
602 info.si_errno = 0;
603
604 /* ordered by priority, least first */
605 if (arm_fpe & BIT_IXC) info.si_code = TARGET_FPE_FLTRES;
606 if (arm_fpe & BIT_UFC) info.si_code = TARGET_FPE_FLTUND;
607 if (arm_fpe & BIT_OFC) info.si_code = TARGET_FPE_FLTOVF;
608 if (arm_fpe & BIT_DZC) info.si_code = TARGET_FPE_FLTDIV;
609 if (arm_fpe & BIT_IOC) info.si_code = TARGET_FPE_FLTINV;
610
611 info._sifields._sigfault._addr = env->regs[15];
612 queue_signal(env, info.si_signo, &info);
613 } else {
614 env->regs[15] += 4;
615 }
616
617 /* accumulate unenabled exceptions */
618 if ((!(fpsr & BIT_IXE)) && (arm_fpe & BIT_IXC))
619 fpsr |= BIT_IXC;
620 if ((!(fpsr & BIT_UFE)) && (arm_fpe & BIT_UFC))
621 fpsr |= BIT_UFC;
622 if ((!(fpsr & BIT_OFE)) && (arm_fpe & BIT_OFC))
623 fpsr |= BIT_OFC;
624 if ((!(fpsr & BIT_DZE)) && (arm_fpe & BIT_DZC))
625 fpsr |= BIT_DZC;
626 if ((!(fpsr & BIT_IOE)) && (arm_fpe & BIT_IOC))
627 fpsr |= BIT_IOC;
628 ts->fpa.fpsr=fpsr;
629 } else { /* everything OK */
630 /* increment PC */
631 env->regs[15] += 4;
632 }
633 }
634 break;
635 case EXCP_SWI:
636 case EXCP_BKPT:
637 {
638 env->eabi = 1;
639 /* system call */
640 if (trapnr == EXCP_BKPT) {
641 if (env->thumb) {
642 /* FIXME - what to do if get_user() fails? */
643 get_user_u16(insn, env->regs[15]);
644 n = insn & 0xff;
645 env->regs[15] += 2;
646 } else {
647 /* FIXME - what to do if get_user() fails? */
648 get_user_u32(insn, env->regs[15]);
649 n = (insn & 0xf) | ((insn >> 4) & 0xff0);
650 env->regs[15] += 4;
651 }
652 } else {
653 if (env->thumb) {
654 /* FIXME - what to do if get_user() fails? */
655 get_user_u16(insn, env->regs[15] - 2);
656 n = insn & 0xff;
657 } else {
658 /* FIXME - what to do if get_user() fails? */
659 get_user_u32(insn, env->regs[15] - 4);
660 n = insn & 0xffffff;
661 }
662 }
663
664 if (n == ARM_NR_cacheflush) {
665 arm_cache_flush(env->regs[0], env->regs[1]);
666 } else if (n == ARM_NR_semihosting
667 || n == ARM_NR_thumb_semihosting) {
668 env->regs[0] = do_arm_semihosting (env);
669 } else if (n == 0 || n >= ARM_SYSCALL_BASE
670 || (env->thumb && n == ARM_THUMB_SYSCALL)) {
671 /* linux syscall */
672 if (env->thumb || n == 0) {
673 n = env->regs[7];
674 } else {
675 n -= ARM_SYSCALL_BASE;
676 env->eabi = 0;
677 }
678 if ( n > ARM_NR_BASE) {
679 switch (n) {
680 case ARM_NR_cacheflush:
681 arm_cache_flush(env->regs[0], env->regs[1]);
682 break;
683 case ARM_NR_set_tls:
684 cpu_set_tls(env, env->regs[0]);
685 env->regs[0] = 0;
686 break;
687 default:
688 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
689 n);
690 env->regs[0] = -TARGET_ENOSYS;
691 break;
692 }
693 } else {
694 env->regs[0] = do_syscall(env,
695 n,
696 env->regs[0],
697 env->regs[1],
698 env->regs[2],
699 env->regs[3],
700 env->regs[4],
701 env->regs[5]);
702 }
703 } else {
704 goto error;
705 }
706 }
707 break;
708 case EXCP_INTERRUPT:
709 /* just indicate that signals should be handled asap */
710 break;
711 case EXCP_PREFETCH_ABORT:
712 addr = env->cp15.c6_insn;
713 goto do_segv;
714 case EXCP_DATA_ABORT:
715 addr = env->cp15.c6_data;
716 goto do_segv;
717 do_segv:
718 {
719 info.si_signo = SIGSEGV;
720 info.si_errno = 0;
721 /* XXX: check env->error_code */
722 info.si_code = TARGET_SEGV_MAPERR;
723 info._sifields._sigfault._addr = addr;
724 queue_signal(env, info.si_signo, &info);
725 }
726 break;
727 case EXCP_DEBUG:
728 {
729 int sig;
730
731 sig = gdb_handlesig (env, TARGET_SIGTRAP);
732 if (sig)
733 {
734 info.si_signo = sig;
735 info.si_errno = 0;
736 info.si_code = TARGET_TRAP_BRKPT;
737 queue_signal(env, info.si_signo, &info);
738 }
739 }
740 break;
741 case EXCP_KERNEL_TRAP:
742 if (do_kernel_trap(env))
743 goto error;
744 break;
745 default:
746 error:
747 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
748 trapnr);
749 cpu_dump_state(env, stderr, fprintf, 0);
750 abort();
751 }
752 process_pending_signals(env);
753 }
754 }
755
756 #endif
757
758 #ifdef TARGET_SPARC
759 #define SPARC64_STACK_BIAS 2047
760
761 //#define DEBUG_WIN
762
763 /* WARNING: dealing with register windows _is_ complicated. More info
764 can be found at http://www.sics.se/~psm/sparcstack.html */
765 static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
766 {
767 index = (index + cwp * 16) % (16 * env->nwindows);
768 /* wrap handling : if cwp is on the last window, then we use the
769 registers 'after' the end */
770 if (index < 8 && env->cwp == env->nwindows - 1)
771 index += 16 * env->nwindows;
772 return index;
773 }
774
775 /* save the register window 'cwp1' */
776 static inline void save_window_offset(CPUSPARCState *env, int cwp1)
777 {
778 unsigned int i;
779 abi_ulong sp_ptr;
780
781 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
782 #ifdef TARGET_SPARC64
783 if (sp_ptr & 3)
784 sp_ptr += SPARC64_STACK_BIAS;
785 #endif
786 #if defined(DEBUG_WIN)
787 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx " save_cwp=%d\n",
788 sp_ptr, cwp1);
789 #endif
790 for(i = 0; i < 16; i++) {
791 /* FIXME - what to do if put_user() fails? */
792 put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
793 sp_ptr += sizeof(abi_ulong);
794 }
795 }
796
797 static void save_window(CPUSPARCState *env)
798 {
799 #ifndef TARGET_SPARC64
800 unsigned int new_wim;
801 new_wim = ((env->wim >> 1) | (env->wim << (env->nwindows - 1))) &
802 ((1LL << env->nwindows) - 1);
803 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
804 env->wim = new_wim;
805 #else
806 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
807 env->cansave++;
808 env->canrestore--;
809 #endif
810 }
811
812 static void restore_window(CPUSPARCState *env)
813 {
814 #ifndef TARGET_SPARC64
815 unsigned int new_wim;
816 #endif
817 unsigned int i, cwp1;
818 abi_ulong sp_ptr;
819
820 #ifndef TARGET_SPARC64
821 new_wim = ((env->wim << 1) | (env->wim >> (env->nwindows - 1))) &
822 ((1LL << env->nwindows) - 1);
823 #endif
824
825 /* restore the invalid window */
826 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
827 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
828 #ifdef TARGET_SPARC64
829 if (sp_ptr & 3)
830 sp_ptr += SPARC64_STACK_BIAS;
831 #endif
832 #if defined(DEBUG_WIN)
833 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx " load_cwp=%d\n",
834 sp_ptr, cwp1);
835 #endif
836 for(i = 0; i < 16; i++) {
837 /* FIXME - what to do if get_user() fails? */
838 get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
839 sp_ptr += sizeof(abi_ulong);
840 }
841 #ifdef TARGET_SPARC64
842 env->canrestore++;
843 if (env->cleanwin < env->nwindows - 1)
844 env->cleanwin++;
845 env->cansave--;
846 #else
847 env->wim = new_wim;
848 #endif
849 }
850
851 static void flush_windows(CPUSPARCState *env)
852 {
853 int offset, cwp1;
854
855 offset = 1;
856 for(;;) {
857 /* if restore would invoke restore_window(), then we can stop */
858 cwp1 = cpu_cwp_inc(env, env->cwp + offset);
859 #ifndef TARGET_SPARC64
860 if (env->wim & (1 << cwp1))
861 break;
862 #else
863 if (env->canrestore == 0)
864 break;
865 env->cansave++;
866 env->canrestore--;
867 #endif
868 save_window_offset(env, cwp1);
869 offset++;
870 }
871 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
872 #ifndef TARGET_SPARC64
873 /* set wim so that restore will reload the registers */
874 env->wim = 1 << cwp1;
875 #endif
876 #if defined(DEBUG_WIN)
877 printf("flush_windows: nb=%d\n", offset - 1);
878 #endif
879 }
880
881 void cpu_loop (CPUSPARCState *env)
882 {
883 int trapnr, ret;
884 target_siginfo_t info;
885
886 while (1) {
887 trapnr = cpu_sparc_exec (env);
888
889 switch (trapnr) {
890 #ifndef TARGET_SPARC64
891 case 0x88:
892 case 0x90:
893 #else
894 case 0x110:
895 case 0x16d:
896 #endif
897 ret = do_syscall (env, env->gregs[1],
898 env->regwptr[0], env->regwptr[1],
899 env->regwptr[2], env->regwptr[3],
900 env->regwptr[4], env->regwptr[5]);
901 if ((unsigned int)ret >= (unsigned int)(-515)) {
902 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
903 env->xcc |= PSR_CARRY;
904 #else
905 env->psr |= PSR_CARRY;
906 #endif
907 ret = -ret;
908 } else {
909 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
910 env->xcc &= ~PSR_CARRY;
911 #else
912 env->psr &= ~PSR_CARRY;
913 #endif
914 }
915 env->regwptr[0] = ret;
916 /* next instruction */
917 env->pc = env->npc;
918 env->npc = env->npc + 4;
919 break;
920 case 0x83: /* flush windows */
921 #ifdef TARGET_ABI32
922 case 0x103:
923 #endif
924 flush_windows(env);
925 /* next instruction */
926 env->pc = env->npc;
927 env->npc = env->npc + 4;
928 break;
929 #ifndef TARGET_SPARC64
930 case TT_WIN_OVF: /* window overflow */
931 save_window(env);
932 break;
933 case TT_WIN_UNF: /* window underflow */
934 restore_window(env);
935 break;
936 case TT_TFAULT:
937 case TT_DFAULT:
938 {
939 info.si_signo = SIGSEGV;
940 info.si_errno = 0;
941 /* XXX: check env->error_code */
942 info.si_code = TARGET_SEGV_MAPERR;
943 info._sifields._sigfault._addr = env->mmuregs[4];
944 queue_signal(env, info.si_signo, &info);
945 }
946 break;
947 #else
948 case TT_SPILL: /* window overflow */
949 save_window(env);
950 break;
951 case TT_FILL: /* window underflow */
952 restore_window(env);
953 break;
954 case TT_TFAULT:
955 case TT_DFAULT:
956 {
957 info.si_signo = SIGSEGV;
958 info.si_errno = 0;
959 /* XXX: check env->error_code */
960 info.si_code = TARGET_SEGV_MAPERR;
961 if (trapnr == TT_DFAULT)
962 info._sifields._sigfault._addr = env->dmmuregs[4];
963 else
964 info._sifields._sigfault._addr = env->tsptr->tpc;
965 queue_signal(env, info.si_signo, &info);
966 }
967 break;
968 #ifndef TARGET_ABI32
969 case 0x16e:
970 flush_windows(env);
971 sparc64_get_context(env);
972 break;
973 case 0x16f:
974 flush_windows(env);
975 sparc64_set_context(env);
976 break;
977 #endif
978 #endif
979 case EXCP_INTERRUPT:
980 /* just indicate that signals should be handled asap */
981 break;
982 case EXCP_DEBUG:
983 {
984 int sig;
985
986 sig = gdb_handlesig (env, TARGET_SIGTRAP);
987 if (sig)
988 {
989 info.si_signo = sig;
990 info.si_errno = 0;
991 info.si_code = TARGET_TRAP_BRKPT;
992 queue_signal(env, info.si_signo, &info);
993 }
994 }
995 break;
996 default:
997 printf ("Unhandled trap: 0x%x\n", trapnr);
998 cpu_dump_state(env, stderr, fprintf, 0);
999 exit (1);
1000 }
1001 process_pending_signals (env);
1002 }
1003 }
1004
1005 #endif
1006
1007 #ifdef TARGET_PPC
1008 static inline uint64_t cpu_ppc_get_tb (CPUState *env)
1009 {
1010 /* TO FIX */
1011 return 0;
1012 }
1013
1014 uint32_t cpu_ppc_load_tbl (CPUState *env)
1015 {
1016 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
1017 }
1018
1019 uint32_t cpu_ppc_load_tbu (CPUState *env)
1020 {
1021 return cpu_ppc_get_tb(env) >> 32;
1022 }
1023
1024 uint32_t cpu_ppc_load_atbl (CPUState *env)
1025 {
1026 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
1027 }
1028
1029 uint32_t cpu_ppc_load_atbu (CPUState *env)
1030 {
1031 return cpu_ppc_get_tb(env) >> 32;
1032 }
1033
1034 uint32_t cpu_ppc601_load_rtcu (CPUState *env)
1035 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
1036
1037 uint32_t cpu_ppc601_load_rtcl (CPUState *env)
1038 {
1039 return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
1040 }
1041
1042 /* XXX: to be fixed */
1043 int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp)
1044 {
1045 return -1;
1046 }
1047
1048 int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val)
1049 {
1050 return -1;
1051 }
1052
1053 #define EXCP_DUMP(env, fmt, args...) \
1054 do { \
1055 fprintf(stderr, fmt , ##args); \
1056 cpu_dump_state(env, stderr, fprintf, 0); \
1057 if (loglevel != 0) { \
1058 fprintf(logfile, fmt , ##args); \
1059 cpu_dump_state(env, logfile, fprintf, 0); \
1060 } \
1061 } while (0)
1062
1063 void cpu_loop(CPUPPCState *env)
1064 {
1065 target_siginfo_t info;
1066 int trapnr;
1067 uint32_t ret;
1068
1069 for(;;) {
1070 trapnr = cpu_ppc_exec(env);
1071 switch(trapnr) {
1072 case POWERPC_EXCP_NONE:
1073 /* Just go on */
1074 break;
1075 case POWERPC_EXCP_CRITICAL: /* Critical input */
1076 cpu_abort(env, "Critical interrupt while in user mode. "
1077 "Aborting\n");
1078 break;
1079 case POWERPC_EXCP_MCHECK: /* Machine check exception */
1080 cpu_abort(env, "Machine check exception while in user mode. "
1081 "Aborting\n");
1082 break;
1083 case POWERPC_EXCP_DSI: /* Data storage exception */
1084 EXCP_DUMP(env, "Invalid data memory access: 0x" ADDRX "\n",
1085 env->spr[SPR_DAR]);
1086 /* XXX: check this. Seems bugged */
1087 switch (env->error_code & 0xFF000000) {
1088 case 0x40000000:
1089 info.si_signo = TARGET_SIGSEGV;
1090 info.si_errno = 0;
1091 info.si_code = TARGET_SEGV_MAPERR;
1092 break;
1093 case 0x04000000:
1094 info.si_signo = TARGET_SIGILL;
1095 info.si_errno = 0;
1096 info.si_code = TARGET_ILL_ILLADR;
1097 break;
1098 case 0x08000000:
1099 info.si_signo = TARGET_SIGSEGV;
1100 info.si_errno = 0;
1101 info.si_code = TARGET_SEGV_ACCERR;
1102 break;
1103 default:
1104 /* Let's send a regular segfault... */
1105 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1106 env->error_code);
1107 info.si_signo = TARGET_SIGSEGV;
1108 info.si_errno = 0;
1109 info.si_code = TARGET_SEGV_MAPERR;
1110 break;
1111 }
1112 info._sifields._sigfault._addr = env->nip;
1113 queue_signal(env, info.si_signo, &info);
1114 break;
1115 case POWERPC_EXCP_ISI: /* Instruction storage exception */
1116 EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" ADDRX "\n",
1117 env->spr[SPR_SRR0]);
1118 /* XXX: check this */
1119 switch (env->error_code & 0xFF000000) {
1120 case 0x40000000:
1121 info.si_signo = TARGET_SIGSEGV;
1122 info.si_errno = 0;
1123 info.si_code = TARGET_SEGV_MAPERR;
1124 break;
1125 case 0x10000000:
1126 case 0x08000000:
1127 info.si_signo = TARGET_SIGSEGV;
1128 info.si_errno = 0;
1129 info.si_code = TARGET_SEGV_ACCERR;
1130 break;
1131 default:
1132 /* Let's send a regular segfault... */
1133 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1134 env->error_code);
1135 info.si_signo = TARGET_SIGSEGV;
1136 info.si_errno = 0;
1137 info.si_code = TARGET_SEGV_MAPERR;
1138 break;
1139 }
1140 info._sifields._sigfault._addr = env->nip - 4;
1141 queue_signal(env, info.si_signo, &info);
1142 break;
1143 case POWERPC_EXCP_EXTERNAL: /* External input */
1144 cpu_abort(env, "External interrupt while in user mode. "
1145 "Aborting\n");
1146 break;
1147 case POWERPC_EXCP_ALIGN: /* Alignment exception */
1148 EXCP_DUMP(env, "Unaligned memory access\n");
1149 /* XXX: check this */
1150 info.si_signo = TARGET_SIGBUS;
1151 info.si_errno = 0;
1152 info.si_code = TARGET_BUS_ADRALN;
1153 info._sifields._sigfault._addr = env->nip - 4;
1154 queue_signal(env, info.si_signo, &info);
1155 break;
1156 case POWERPC_EXCP_PROGRAM: /* Program exception */
1157 /* XXX: check this */
1158 switch (env->error_code & ~0xF) {
1159 case POWERPC_EXCP_FP:
1160 EXCP_DUMP(env, "Floating point program exception\n");
1161 info.si_signo = TARGET_SIGFPE;
1162 info.si_errno = 0;
1163 switch (env->error_code & 0xF) {
1164 case POWERPC_EXCP_FP_OX:
1165 info.si_code = TARGET_FPE_FLTOVF;
1166 break;
1167 case POWERPC_EXCP_FP_UX:
1168 info.si_code = TARGET_FPE_FLTUND;
1169 break;
1170 case POWERPC_EXCP_FP_ZX:
1171 case POWERPC_EXCP_FP_VXZDZ:
1172 info.si_code = TARGET_FPE_FLTDIV;
1173 break;
1174 case POWERPC_EXCP_FP_XX:
1175 info.si_code = TARGET_FPE_FLTRES;
1176 break;
1177 case POWERPC_EXCP_FP_VXSOFT:
1178 info.si_code = TARGET_FPE_FLTINV;
1179 break;
1180 case POWERPC_EXCP_FP_VXSNAN:
1181 case POWERPC_EXCP_FP_VXISI:
1182 case POWERPC_EXCP_FP_VXIDI:
1183 case POWERPC_EXCP_FP_VXIMZ:
1184 case POWERPC_EXCP_FP_VXVC:
1185 case POWERPC_EXCP_FP_VXSQRT:
1186 case POWERPC_EXCP_FP_VXCVI:
1187 info.si_code = TARGET_FPE_FLTSUB;
1188 break;
1189 default:
1190 EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
1191 env->error_code);
1192 break;
1193 }
1194 break;
1195 case POWERPC_EXCP_INVAL:
1196 EXCP_DUMP(env, "Invalid instruction\n");
1197 info.si_signo = TARGET_SIGILL;
1198 info.si_errno = 0;
1199 switch (env->error_code & 0xF) {
1200 case POWERPC_EXCP_INVAL_INVAL:
1201 info.si_code = TARGET_ILL_ILLOPC;
1202 break;
1203 case POWERPC_EXCP_INVAL_LSWX:
1204 info.si_code = TARGET_ILL_ILLOPN;
1205 break;
1206 case POWERPC_EXCP_INVAL_SPR:
1207 info.si_code = TARGET_ILL_PRVREG;
1208 break;
1209 case POWERPC_EXCP_INVAL_FP:
1210 info.si_code = TARGET_ILL_COPROC;
1211 break;
1212 default:
1213 EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
1214 env->error_code & 0xF);
1215 info.si_code = TARGET_ILL_ILLADR;
1216 break;
1217 }
1218 break;
1219 case POWERPC_EXCP_PRIV:
1220 EXCP_DUMP(env, "Privilege violation\n");
1221 info.si_signo = TARGET_SIGILL;
1222 info.si_errno = 0;
1223 switch (env->error_code & 0xF) {
1224 case POWERPC_EXCP_PRIV_OPC:
1225 info.si_code = TARGET_ILL_PRVOPC;
1226 break;
1227 case POWERPC_EXCP_PRIV_REG:
1228 info.si_code = TARGET_ILL_PRVREG;
1229 break;
1230 default:
1231 EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
1232 env->error_code & 0xF);
1233 info.si_code = TARGET_ILL_PRVOPC;
1234 break;
1235 }
1236 break;
1237 case POWERPC_EXCP_TRAP:
1238 cpu_abort(env, "Tried to call a TRAP\n");
1239 break;
1240 default:
1241 /* Should not happen ! */
1242 cpu_abort(env, "Unknown program exception (%02x)\n",
1243 env->error_code);
1244 break;
1245 }
1246 info._sifields._sigfault._addr = env->nip - 4;
1247 queue_signal(env, info.si_signo, &info);
1248 break;
1249 case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
1250 EXCP_DUMP(env, "No floating point allowed\n");
1251 info.si_signo = TARGET_SIGILL;
1252 info.si_errno = 0;
1253 info.si_code = TARGET_ILL_COPROC;
1254 info._sifields._sigfault._addr = env->nip - 4;
1255 queue_signal(env, info.si_signo, &info);
1256 break;
1257 case POWERPC_EXCP_SYSCALL: /* System call exception */
1258 cpu_abort(env, "Syscall exception while in user mode. "
1259 "Aborting\n");
1260 break;
1261 case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
1262 EXCP_DUMP(env, "No APU instruction allowed\n");
1263 info.si_signo = TARGET_SIGILL;
1264 info.si_errno = 0;
1265 info.si_code = TARGET_ILL_COPROC;
1266 info._sifields._sigfault._addr = env->nip - 4;
1267 queue_signal(env, info.si_signo, &info);
1268 break;
1269 case POWERPC_EXCP_DECR: /* Decrementer exception */
1270 cpu_abort(env, "Decrementer interrupt while in user mode. "
1271 "Aborting\n");
1272 break;
1273 case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
1274 cpu_abort(env, "Fix interval timer interrupt while in user mode. "
1275 "Aborting\n");
1276 break;
1277 case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */
1278 cpu_abort(env, "Watchdog timer interrupt while in user mode. "
1279 "Aborting\n");
1280 break;
1281 case POWERPC_EXCP_DTLB: /* Data TLB error */
1282 cpu_abort(env, "Data TLB exception while in user mode. "
1283 "Aborting\n");
1284 break;
1285 case POWERPC_EXCP_ITLB: /* Instruction TLB error */
1286 cpu_abort(env, "Instruction TLB exception while in user mode. "
1287 "Aborting\n");
1288 break;
1289 case POWERPC_EXCP_DEBUG: /* Debug interrupt */
1290 /* XXX: check this */
1291 {
1292 int sig;
1293
1294 sig = gdb_handlesig(env, TARGET_SIGTRAP);
1295 if (sig) {
1296 info.si_signo = sig;
1297 info.si_errno = 0;
1298 info.si_code = TARGET_TRAP_BRKPT;
1299 queue_signal(env, info.si_signo, &info);
1300 }
1301 }
1302 break;
1303 case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */
1304 EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n");
1305 info.si_signo = TARGET_SIGILL;
1306 info.si_errno = 0;
1307 info.si_code = TARGET_ILL_COPROC;
1308 info._sifields._sigfault._addr = env->nip - 4;
1309 queue_signal(env, info.si_signo, &info);
1310 break;
1311 case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */
1312 cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
1313 break;
1314 case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */
1315 cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
1316 break;
1317 case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */
1318 cpu_abort(env, "Performance monitor exception not handled\n");
1319 break;
1320 case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */
1321 cpu_abort(env, "Doorbell interrupt while in user mode. "
1322 "Aborting\n");
1323 break;
1324 case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */
1325 cpu_abort(env, "Doorbell critical interrupt while in user mode. "
1326 "Aborting\n");
1327 break;
1328 case POWERPC_EXCP_RESET: /* System reset exception */
1329 cpu_abort(env, "Reset interrupt while in user mode. "
1330 "Aborting\n");
1331 break;
1332 case POWERPC_EXCP_DSEG: /* Data segment exception */
1333 cpu_abort(env, "Data segment exception while in user mode. "
1334 "Aborting\n");
1335 break;
1336 case POWERPC_EXCP_ISEG: /* Instruction segment exception */
1337 cpu_abort(env, "Instruction segment exception "
1338 "while in user mode. Aborting\n");
1339 break;
1340 /* PowerPC 64 with hypervisor mode support */
1341 case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */
1342 cpu_abort(env, "Hypervisor decrementer interrupt "
1343 "while in user mode. Aborting\n");
1344 break;
1345 case POWERPC_EXCP_TRACE: /* Trace exception */
1346 /* Nothing to do:
1347 * we use this exception to emulate step-by-step execution mode.
1348 */
1349 break;
1350 /* PowerPC 64 with hypervisor mode support */
1351 case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */
1352 cpu_abort(env, "Hypervisor data storage exception "
1353 "while in user mode. Aborting\n");
1354 break;
1355 case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */
1356 cpu_abort(env, "Hypervisor instruction storage exception "
1357 "while in user mode. Aborting\n");
1358 break;
1359 case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */
1360 cpu_abort(env, "Hypervisor data segment exception "
1361 "while in user mode. Aborting\n");
1362 break;
1363 case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */
1364 cpu_abort(env, "Hypervisor instruction segment exception "
1365 "while in user mode. Aborting\n");
1366 break;
1367 case POWERPC_EXCP_VPU: /* Vector unavailable exception */
1368 EXCP_DUMP(env, "No Altivec instructions allowed\n");
1369 info.si_signo = TARGET_SIGILL;
1370 info.si_errno = 0;
1371 info.si_code = TARGET_ILL_COPROC;
1372 info._sifields._sigfault._addr = env->nip - 4;
1373 queue_signal(env, info.si_signo, &info);
1374 break;
1375 case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */
1376 cpu_abort(env, "Programable interval timer interrupt "
1377 "while in user mode. Aborting\n");
1378 break;
1379 case POWERPC_EXCP_IO: /* IO error exception */
1380 cpu_abort(env, "IO error exception while in user mode. "
1381 "Aborting\n");
1382 break;
1383 case POWERPC_EXCP_RUNM: /* Run mode exception */
1384 cpu_abort(env, "Run mode exception while in user mode. "
1385 "Aborting\n");
1386 break;
1387 case POWERPC_EXCP_EMUL: /* Emulation trap exception */
1388 cpu_abort(env, "Emulation trap exception not handled\n");
1389 break;
1390 case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */
1391 cpu_abort(env, "Instruction fetch TLB exception "
1392 "while in user-mode. Aborting");
1393 break;
1394 case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
1395 cpu_abort(env, "Data load TLB exception while in user-mode. "
1396 "Aborting");
1397 break;
1398 case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
1399 cpu_abort(env, "Data store TLB exception while in user-mode. "
1400 "Aborting");
1401 break;
1402 case POWERPC_EXCP_FPA: /* Floating-point assist exception */
1403 cpu_abort(env, "Floating-point assist exception not handled\n");
1404 break;
1405 case POWERPC_EXCP_IABR: /* Instruction address breakpoint */
1406 cpu_abort(env, "Instruction address breakpoint exception "
1407 "not handled\n");
1408 break;
1409 case POWERPC_EXCP_SMI: /* System management interrupt */
1410 cpu_abort(env, "System management interrupt while in user mode. "
1411 "Aborting\n");
1412 break;
1413 case POWERPC_EXCP_THERM: /* Thermal interrupt */
1414 cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
1415 "Aborting\n");
1416 break;
1417 case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */
1418 cpu_abort(env, "Performance monitor exception not handled\n");
1419 break;
1420 case POWERPC_EXCP_VPUA: /* Vector assist exception */
1421 cpu_abort(env, "Vector assist exception not handled\n");
1422 break;
1423 case POWERPC_EXCP_SOFTP: /* Soft patch exception */
1424 cpu_abort(env, "Soft patch exception not handled\n");
1425 break;
1426 case POWERPC_EXCP_MAINT: /* Maintenance exception */
1427 cpu_abort(env, "Maintenance exception while in user mode. "
1428 "Aborting\n");
1429 break;
1430 case POWERPC_EXCP_STOP: /* stop translation */
1431 /* We did invalidate the instruction cache. Go on */
1432 break;
1433 case POWERPC_EXCP_BRANCH: /* branch instruction: */
1434 /* We just stopped because of a branch. Go on */
1435 break;
1436 case POWERPC_EXCP_SYSCALL_USER:
1437 /* system call in user-mode emulation */
1438 /* WARNING:
1439 * PPC ABI uses overflow flag in cr0 to signal an error
1440 * in syscalls.
1441 */
1442 #if 0
1443 printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0],
1444 env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]);
1445 #endif
1446 env->crf[0] &= ~0x1;
1447 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
1448 env->gpr[5], env->gpr[6], env->gpr[7],
1449 env->gpr[8]);
1450 if (ret > (uint32_t)(-515)) {
1451 env->crf[0] |= 0x1;
1452 ret = -ret;
1453 }
1454 env->gpr[3] = ret;
1455 #if 0
1456 printf("syscall returned 0x%08x (%d)\n", ret, ret);
1457 #endif
1458 break;
1459 case EXCP_INTERRUPT:
1460 /* just indicate that signals should be handled asap */
1461 break;
1462 default:
1463 cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
1464 break;
1465 }
1466 process_pending_signals(env);
1467 }
1468 }
1469 #endif
1470
1471 #ifdef TARGET_MIPS
1472
1473 #define MIPS_SYS(name, args) args,
1474
1475 static const uint8_t mips_syscall_args[] = {
1476 MIPS_SYS(sys_syscall , 0) /* 4000 */
1477 MIPS_SYS(sys_exit , 1)
1478 MIPS_SYS(sys_fork , 0)
1479 MIPS_SYS(sys_read , 3)
1480 MIPS_SYS(sys_write , 3)
1481 MIPS_SYS(sys_open , 3) /* 4005 */
1482 MIPS_SYS(sys_close , 1)
1483 MIPS_SYS(sys_waitpid , 3)
1484 MIPS_SYS(sys_creat , 2)
1485 MIPS_SYS(sys_link , 2)
1486 MIPS_SYS(sys_unlink , 1) /* 4010 */
1487 MIPS_SYS(sys_execve , 0)
1488 MIPS_SYS(sys_chdir , 1)
1489 MIPS_SYS(sys_time , 1)
1490 MIPS_SYS(sys_mknod , 3)
1491 MIPS_SYS(sys_chmod , 2) /* 4015 */
1492 MIPS_SYS(sys_lchown , 3)
1493 MIPS_SYS(sys_ni_syscall , 0)
1494 MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */
1495 MIPS_SYS(sys_lseek , 3)
1496 MIPS_SYS(sys_getpid , 0) /* 4020 */
1497 MIPS_SYS(sys_mount , 5)
1498 MIPS_SYS(sys_oldumount , 1)
1499 MIPS_SYS(sys_setuid , 1)
1500 MIPS_SYS(sys_getuid , 0)
1501 MIPS_SYS(sys_stime , 1) /* 4025 */
1502 MIPS_SYS(sys_ptrace , 4)
1503 MIPS_SYS(sys_alarm , 1)
1504 MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */
1505 MIPS_SYS(sys_pause , 0)
1506 MIPS_SYS(sys_utime , 2) /* 4030 */
1507 MIPS_SYS(sys_ni_syscall , 0)
1508 MIPS_SYS(sys_ni_syscall , 0)
1509 MIPS_SYS(sys_access , 2)
1510 MIPS_SYS(sys_nice , 1)
1511 MIPS_SYS(sys_ni_syscall , 0) /* 4035 */
1512 MIPS_SYS(sys_sync , 0)
1513 MIPS_SYS(sys_kill , 2)
1514 MIPS_SYS(sys_rename , 2)
1515 MIPS_SYS(sys_mkdir , 2)
1516 MIPS_SYS(sys_rmdir , 1) /* 4040 */
1517 MIPS_SYS(sys_dup , 1)
1518 MIPS_SYS(sys_pipe , 0)
1519 MIPS_SYS(sys_times , 1)
1520 MIPS_SYS(sys_ni_syscall , 0)
1521 MIPS_SYS(sys_brk , 1) /* 4045 */
1522 MIPS_SYS(sys_setgid , 1)
1523 MIPS_SYS(sys_getgid , 0)
1524 MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */
1525 MIPS_SYS(sys_geteuid , 0)
1526 MIPS_SYS(sys_getegid , 0) /* 4050 */
1527 MIPS_SYS(sys_acct , 0)
1528 MIPS_SYS(sys_umount , 2)
1529 MIPS_SYS(sys_ni_syscall , 0)
1530 MIPS_SYS(sys_ioctl , 3)
1531 MIPS_SYS(sys_fcntl , 3) /* 4055 */
1532 MIPS_SYS(sys_ni_syscall , 2)
1533 MIPS_SYS(sys_setpgid , 2)
1534 MIPS_SYS(sys_ni_syscall , 0)
1535 MIPS_SYS(sys_olduname , 1)
1536 MIPS_SYS(sys_umask , 1) /* 4060 */
1537 MIPS_SYS(sys_chroot , 1)
1538 MIPS_SYS(sys_ustat , 2)
1539 MIPS_SYS(sys_dup2 , 2)
1540 MIPS_SYS(sys_getppid , 0)
1541 MIPS_SYS(sys_getpgrp , 0) /* 4065 */
1542 MIPS_SYS(sys_setsid , 0)
1543 MIPS_SYS(sys_sigaction , 3)
1544 MIPS_SYS(sys_sgetmask , 0)
1545 MIPS_SYS(sys_ssetmask , 1)
1546 MIPS_SYS(sys_setreuid , 2) /* 4070 */
1547 MIPS_SYS(sys_setregid , 2)
1548 MIPS_SYS(sys_sigsuspend , 0)
1549 MIPS_SYS(sys_sigpending , 1)
1550 MIPS_SYS(sys_sethostname , 2)
1551 MIPS_SYS(sys_setrlimit , 2) /* 4075 */
1552 MIPS_SYS(sys_getrlimit , 2)
1553 MIPS_SYS(sys_getrusage , 2)
1554 MIPS_SYS(sys_gettimeofday, 2)
1555 MIPS_SYS(sys_settimeofday, 2)
1556 MIPS_SYS(sys_getgroups , 2) /* 4080 */
1557 MIPS_SYS(sys_setgroups , 2)
1558 MIPS_SYS(sys_ni_syscall , 0) /* old_select */
1559 MIPS_SYS(sys_symlink , 2)
1560 MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */
1561 MIPS_SYS(sys_readlink , 3) /* 4085 */
1562 MIPS_SYS(sys_uselib , 1)
1563 MIPS_SYS(sys_swapon , 2)
1564 MIPS_SYS(sys_reboot , 3)
1565 MIPS_SYS(old_readdir , 3)
1566 MIPS_SYS(old_mmap , 6) /* 4090 */
1567 MIPS_SYS(sys_munmap , 2)
1568 MIPS_SYS(sys_truncate , 2)
1569 MIPS_SYS(sys_ftruncate , 2)
1570 MIPS_SYS(sys_fchmod , 2)
1571 MIPS_SYS(sys_fchown , 3) /* 4095 */
1572 MIPS_SYS(sys_getpriority , 2)
1573 MIPS_SYS(sys_setpriority , 3)
1574 MIPS_SYS(sys_ni_syscall , 0)
1575 MIPS_SYS(sys_statfs , 2)
1576 MIPS_SYS(sys_fstatfs , 2) /* 4100 */
1577 MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */
1578 MIPS_SYS(sys_socketcall , 2)
1579 MIPS_SYS(sys_syslog , 3)
1580 MIPS_SYS(sys_setitimer , 3)
1581 MIPS_SYS(sys_getitimer , 2) /* 4105 */
1582 MIPS_SYS(sys_newstat , 2)
1583 MIPS_SYS(sys_newlstat , 2)
1584 MIPS_SYS(sys_newfstat , 2)
1585 MIPS_SYS(sys_uname , 1)
1586 MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */
1587 MIPS_SYS(sys_vhangup , 0)
1588 MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */
1589 MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */
1590 MIPS_SYS(sys_wait4 , 4)
1591 MIPS_SYS(sys_swapoff , 1) /* 4115 */
1592 MIPS_SYS(sys_sysinfo , 1)
1593 MIPS_SYS(sys_ipc , 6)
1594 MIPS_SYS(sys_fsync , 1)
1595 MIPS_SYS(sys_sigreturn , 0)
1596 MIPS_SYS(sys_clone , 0) /* 4120 */
1597 MIPS_SYS(sys_setdomainname, 2)
1598 MIPS_SYS(sys_newuname , 1)
1599 MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */
1600 MIPS_SYS(sys_adjtimex , 1)
1601 MIPS_SYS(sys_mprotect , 3) /* 4125 */
1602 MIPS_SYS(sys_sigprocmask , 3)
1603 MIPS_SYS(sys_ni_syscall , 0) /* was create_module */
1604 MIPS_SYS(sys_init_module , 5)
1605 MIPS_SYS(sys_delete_module, 1)
1606 MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */
1607 MIPS_SYS(sys_quotactl , 0)
1608 MIPS_SYS(sys_getpgid , 1)
1609 MIPS_SYS(sys_fchdir , 1)
1610 MIPS_SYS(sys_bdflush , 2)
1611 MIPS_SYS(sys_sysfs , 3) /* 4135 */
1612 MIPS_SYS(sys_personality , 1)
1613 MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */
1614 MIPS_SYS(sys_setfsuid , 1)
1615 MIPS_SYS(sys_setfsgid , 1)
1616 MIPS_SYS(sys_llseek , 5) /* 4140 */
1617 MIPS_SYS(sys_getdents , 3)
1618 MIPS_SYS(sys_select , 5)
1619 MIPS_SYS(sys_flock , 2)
1620 MIPS_SYS(sys_msync , 3)
1621 MIPS_SYS(sys_readv , 3) /* 4145 */
1622 MIPS_SYS(sys_writev , 3)
1623 MIPS_SYS(sys_cacheflush , 3)
1624 MIPS_SYS(sys_cachectl , 3)
1625 MIPS_SYS(sys_sysmips , 4)
1626 MIPS_SYS(sys_ni_syscall , 0) /* 4150 */
1627 MIPS_SYS(sys_getsid , 1)
1628 MIPS_SYS(sys_fdatasync , 0)
1629 MIPS_SYS(sys_sysctl , 1)
1630 MIPS_SYS(sys_mlock , 2)
1631 MIPS_SYS(sys_munlock , 2) /* 4155 */
1632 MIPS_SYS(sys_mlockall , 1)
1633 MIPS_SYS(sys_munlockall , 0)
1634 MIPS_SYS(sys_sched_setparam, 2)
1635 MIPS_SYS(sys_sched_getparam, 2)
1636 MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */
1637 MIPS_SYS(sys_sched_getscheduler, 1)
1638 MIPS_SYS(sys_sched_yield , 0)
1639 MIPS_SYS(sys_sched_get_priority_max, 1)
1640 MIPS_SYS(sys_sched_get_priority_min, 1)
1641 MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */
1642 MIPS_SYS(sys_nanosleep, 2)
1643 MIPS_SYS(sys_mremap , 4)
1644 MIPS_SYS(sys_accept , 3)
1645 MIPS_SYS(sys_bind , 3)
1646 MIPS_SYS(sys_connect , 3) /* 4170 */
1647 MIPS_SYS(sys_getpeername , 3)
1648 MIPS_SYS(sys_getsockname , 3)
1649 MIPS_SYS(sys_getsockopt , 5)
1650 MIPS_SYS(sys_listen , 2)
1651 MIPS_SYS(sys_recv , 4) /* 4175 */
1652 MIPS_SYS(sys_recvfrom , 6)
1653 MIPS_SYS(sys_recvmsg , 3)
1654 MIPS_SYS(sys_send , 4)
1655 MIPS_SYS(sys_sendmsg , 3)
1656 MIPS_SYS(sys_sendto , 6) /* 4180 */
1657 MIPS_SYS(sys_setsockopt , 5)
1658 MIPS_SYS(sys_shutdown , 2)
1659 MIPS_SYS(sys_socket , 3)
1660 MIPS_SYS(sys_socketpair , 4)
1661 MIPS_SYS(sys_setresuid , 3) /* 4185 */
1662 MIPS_SYS(sys_getresuid , 3)
1663 MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */
1664 MIPS_SYS(sys_poll , 3)
1665 MIPS_SYS(sys_nfsservctl , 3)
1666 MIPS_SYS(sys_setresgid , 3) /* 4190 */
1667 MIPS_SYS(sys_getresgid , 3)
1668 MIPS_SYS(sys_prctl , 5)
1669 MIPS_SYS(sys_rt_sigreturn, 0)
1670 MIPS_SYS(sys_rt_sigaction, 4)
1671 MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */
1672 MIPS_SYS(sys_rt_sigpending, 2)
1673 MIPS_SYS(sys_rt_sigtimedwait, 4)
1674 MIPS_SYS(sys_rt_sigqueueinfo, 3)
1675 MIPS_SYS(sys_rt_sigsuspend, 0)
1676 MIPS_SYS(sys_pread64 , 6) /* 4200 */
1677 MIPS_SYS(sys_pwrite64 , 6)
1678 MIPS_SYS(sys_chown , 3)
1679 MIPS_SYS(sys_getcwd , 2)
1680 MIPS_SYS(sys_capget , 2)
1681 MIPS_SYS(sys_capset , 2) /* 4205 */
1682 MIPS_SYS(sys_sigaltstack , 0)
1683 MIPS_SYS(sys_sendfile , 4)
1684 MIPS_SYS(sys_ni_syscall , 0)
1685 MIPS_SYS(sys_ni_syscall , 0)
1686 MIPS_SYS(sys_mmap2 , 6) /* 4210 */
1687 MIPS_SYS(sys_truncate64 , 4)
1688 MIPS_SYS(sys_ftruncate64 , 4)
1689 MIPS_SYS(sys_stat64 , 2)
1690 MIPS_SYS(sys_lstat64 , 2)
1691 MIPS_SYS(sys_fstat64 , 2) /* 4215 */
1692 MIPS_SYS(sys_pivot_root , 2)
1693 MIPS_SYS(sys_mincore , 3)
1694 MIPS_SYS(sys_madvise , 3)
1695 MIPS_SYS(sys_getdents64 , 3)
1696 MIPS_SYS(sys_fcntl64 , 3) /* 4220 */
1697 MIPS_SYS(sys_ni_syscall , 0)
1698 MIPS_SYS(sys_gettid , 0)
1699 MIPS_SYS(sys_readahead , 5)
1700 MIPS_SYS(sys_setxattr , 5)
1701 MIPS_SYS(sys_lsetxattr , 5) /* 4225 */
1702 MIPS_SYS(sys_fsetxattr , 5)
1703 MIPS_SYS(sys_getxattr , 4)
1704 MIPS_SYS(sys_lgetxattr , 4)
1705 MIPS_SYS(sys_fgetxattr , 4)
1706 MIPS_SYS(sys_listxattr , 3) /* 4230 */
1707 MIPS_SYS(sys_llistxattr , 3)
1708 MIPS_SYS(sys_flistxattr , 3)
1709 MIPS_SYS(sys_removexattr , 2)
1710 MIPS_SYS(sys_lremovexattr, 2)
1711 MIPS_SYS(sys_fremovexattr, 2) /* 4235 */
1712 MIPS_SYS(sys_tkill , 2)
1713 MIPS_SYS(sys_sendfile64 , 5)
1714 MIPS_SYS(sys_futex , 2)
1715 MIPS_SYS(sys_sched_setaffinity, 3)
1716 MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */
1717 MIPS_SYS(sys_io_setup , 2)
1718 MIPS_SYS(sys_io_destroy , 1)
1719 MIPS_SYS(sys_io_getevents, 5)
1720 MIPS_SYS(sys_io_submit , 3)
1721 MIPS_SYS(sys_io_cancel , 3) /* 4245 */
1722 MIPS_SYS(sys_exit_group , 1)
1723 MIPS_SYS(sys_lookup_dcookie, 3)
1724 MIPS_SYS(sys_epoll_create, 1)
1725 MIPS_SYS(sys_epoll_ctl , 4)
1726 MIPS_SYS(sys_epoll_wait , 3) /* 4250 */
1727 MIPS_SYS(sys_remap_file_pages, 5)
1728 MIPS_SYS(sys_set_tid_address, 1)
1729 MIPS_SYS(sys_restart_syscall, 0)
1730 MIPS_SYS(sys_fadvise64_64, 7)
1731 MIPS_SYS(sys_statfs64 , 3) /* 4255 */
1732 MIPS_SYS(sys_fstatfs64 , 2)
1733 MIPS_SYS(sys_timer_create, 3)
1734 MIPS_SYS(sys_timer_settime, 4)
1735 MIPS_SYS(sys_timer_gettime, 2)
1736 MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */
1737 MIPS_SYS(sys_timer_delete, 1)
1738 MIPS_SYS(sys_clock_settime, 2)
1739 MIPS_SYS(sys_clock_gettime, 2)
1740 MIPS_SYS(sys_clock_getres, 2)
1741 MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */
1742 MIPS_SYS(sys_tgkill , 3)
1743 MIPS_SYS(sys_utimes , 2)
1744 MIPS_SYS(sys_mbind , 4)
1745 MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */
1746 MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */
1747 MIPS_SYS(sys_mq_open , 4)
1748 MIPS_SYS(sys_mq_unlink , 1)
1749 MIPS_SYS(sys_mq_timedsend, 5)
1750 MIPS_SYS(sys_mq_timedreceive, 5)
1751 MIPS_SYS(sys_mq_notify , 2) /* 4275 */
1752 MIPS_SYS(sys_mq_getsetattr, 3)
1753 MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */
1754 MIPS_SYS(sys_waitid , 4)
1755 MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */
1756 MIPS_SYS(sys_add_key , 5)
1757 MIPS_SYS(sys_request_key, 4)
1758 MIPS_SYS(sys_keyctl , 5)
1759 MIPS_SYS(sys_set_thread_area, 1)
1760 MIPS_SYS(sys_inotify_init, 0)
1761 MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */
1762 MIPS_SYS(sys_inotify_rm_watch, 2)
1763 MIPS_SYS(sys_migrate_pages, 4)
1764 MIPS_SYS(sys_openat, 4)
1765 MIPS_SYS(sys_mkdirat, 3)
1766 MIPS_SYS(sys_mknodat, 4) /* 4290 */
1767 MIPS_SYS(sys_fchownat, 5)
1768 MIPS_SYS(sys_futimesat, 3)
1769 MIPS_SYS(sys_fstatat64, 4)
1770 MIPS_SYS(sys_unlinkat, 3)
1771 MIPS_SYS(sys_renameat, 4) /* 4295 */
1772 MIPS_SYS(sys_linkat, 5)
1773 MIPS_SYS(sys_symlinkat, 3)
1774 MIPS_SYS(sys_readlinkat, 4)
1775 MIPS_SYS(sys_fchmodat, 3)
1776 MIPS_SYS(sys_faccessat, 3) /* 4300 */
1777 MIPS_SYS(sys_pselect6, 6)
1778 MIPS_SYS(sys_ppoll, 5)
1779 MIPS_SYS(sys_unshare, 1)
1780 MIPS_SYS(sys_splice, 4)
1781 MIPS_SYS(sys_sync_file_range, 7) /* 4305 */
1782 MIPS_SYS(sys_tee, 4)
1783 MIPS_SYS(sys_vmsplice, 4)
1784 MIPS_SYS(sys_move_pages, 6)
1785 MIPS_SYS(sys_set_robust_list, 2)
1786 MIPS_SYS(sys_get_robust_list, 3) /* 4310 */
1787 MIPS_SYS(sys_kexec_load, 4)
1788 MIPS_SYS(sys_getcpu, 3)
1789 MIPS_SYS(sys_epoll_pwait, 6)
1790 MIPS_SYS(sys_ioprio_set, 3)
1791 MIPS_SYS(sys_ioprio_get, 2)
1792 };
1793
1794 #undef MIPS_SYS
1795
1796 void cpu_loop(CPUMIPSState *env)
1797 {
1798 target_siginfo_t info;
1799 int trapnr, ret;
1800 unsigned int syscall_num;
1801
1802 for(;;) {
1803 trapnr = cpu_mips_exec(env);
1804 switch(trapnr) {
1805 case EXCP_SYSCALL:
1806 syscall_num = env->active_tc.gpr[2] - 4000;
1807 env->active_tc.PC += 4;
1808 if (syscall_num >= sizeof(mips_syscall_args)) {
1809 ret = -ENOSYS;
1810 } else {
1811 int nb_args;
1812 abi_ulong sp_reg;
1813 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
1814
1815 nb_args = mips_syscall_args[syscall_num];
1816 sp_reg = env->active_tc.gpr[29];
1817 switch (nb_args) {
1818 /* these arguments are taken from the stack */
1819 /* FIXME - what to do if get_user() fails? */
1820 case 8: get_user_ual(arg8, sp_reg + 28);
1821 case 7: get_user_ual(arg7, sp_reg + 24);
1822 case 6: get_user_ual(arg6, sp_reg + 20);
1823 case 5: get_user_ual(arg5, sp_reg + 16);
1824 default:
1825 break;
1826 }
1827 ret = do_syscall(env, env->active_tc.gpr[2],
1828 env->active_tc.gpr[4],
1829 env->active_tc.gpr[5],
1830 env->active_tc.gpr[6],
1831 env->active_tc.gpr[7],
1832 arg5, arg6/*, arg7, arg8*/);
1833 }
1834 if ((unsigned int)ret >= (unsigned int)(-1133)) {
1835 env->active_tc.gpr[7] = 1; /* error flag */
1836 ret = -ret;
1837 } else {
1838 env->active_tc.gpr[7] = 0; /* error flag */
1839 }
1840 env->active_tc.gpr[2] = ret;
1841 break;
1842 case EXCP_TLBL:
1843 case EXCP_TLBS:
1844 case EXCP_CpU:
1845 case EXCP_RI:
1846 info.si_signo = TARGET_SIGILL;
1847 info.si_errno = 0;
1848 info.si_code = 0;
1849 queue_signal(env, info.si_signo, &info);
1850 break;
1851 case EXCP_INTERRUPT:
1852 /* just indicate that signals should be handled asap */
1853 break;
1854 case EXCP_DEBUG:
1855 {
1856 int sig;
1857
1858 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1859 if (sig)
1860 {
1861 info.si_signo = sig;
1862 info.si_errno = 0;
1863 info.si_code = TARGET_TRAP_BRKPT;
1864 queue_signal(env, info.si_signo, &info);
1865 }
1866 }
1867 break;
1868 default:
1869 // error:
1870 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
1871 trapnr);
1872 cpu_dump_state(env, stderr, fprintf, 0);
1873 abort();
1874 }
1875 process_pending_signals(env);
1876 }
1877 }
1878 #endif
1879
1880 #ifdef TARGET_SH4
1881 void cpu_loop (CPUState *env)
1882 {
1883 int trapnr, ret;
1884 target_siginfo_t info;
1885
1886 while (1) {
1887 trapnr = cpu_sh4_exec (env);
1888
1889 switch (trapnr) {
1890 case 0x160:
1891 env->pc += 2;
1892 ret = do_syscall(env,
1893 env->gregs[3],
1894 env->gregs[4],
1895 env->gregs[5],
1896 env->gregs[6],
1897 env->gregs[7],
1898 env->gregs[0],
1899 env->gregs[1]);
1900 env->gregs[0] = ret;
1901 break;
1902 case EXCP_INTERRUPT:
1903 /* just indicate that signals should be handled asap */
1904 break;
1905 case EXCP_DEBUG:
1906 {
1907 int sig;
1908
1909 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1910 if (sig)
1911 {
1912 info.si_signo = sig;
1913 info.si_errno = 0;
1914 info.si_code = TARGET_TRAP_BRKPT;
1915 queue_signal(env, info.si_signo, &info);
1916 }
1917 }
1918 break;
1919 case 0xa0:
1920 case 0xc0:
1921 info.si_signo = SIGSEGV;
1922 info.si_errno = 0;
1923 info.si_code = TARGET_SEGV_MAPERR;
1924 info._sifields._sigfault._addr = env->tea;
1925 queue_signal(env, info.si_signo, &info);
1926 break;
1927
1928 default:
1929 printf ("Unhandled trap: 0x%x\n", trapnr);
1930 cpu_dump_state(env, stderr, fprintf, 0);
1931 exit (1);
1932 }
1933 process_pending_signals (env);
1934 }
1935 }
1936 #endif
1937
1938 #ifdef TARGET_CRIS
1939 void cpu_loop (CPUState *env)
1940 {
1941 int trapnr, ret;
1942 target_siginfo_t info;
1943
1944 while (1) {
1945 trapnr = cpu_cris_exec (env);
1946 switch (trapnr) {
1947 case 0xaa:
1948 {
1949 info.si_signo = SIGSEGV;
1950 info.si_errno = 0;
1951 /* XXX: check env->error_code */
1952 info.si_code = TARGET_SEGV_MAPERR;
1953 info._sifields._sigfault._addr = env->pregs[PR_EDA];
1954 queue_signal(env, info.si_signo, &info);
1955 }
1956 break;
1957 case EXCP_INTERRUPT:
1958 /* just indicate that signals should be handled asap */
1959 break;
1960 case EXCP_BREAK:
1961 ret = do_syscall(env,
1962 env->regs[9],
1963 env->regs[10],
1964 env->regs[11],
1965 env->regs[12],
1966 env->regs[13],
1967 env->pregs[7],
1968 env->pregs[11]);
1969 env->regs[10] = ret;
1970 break;
1971 case EXCP_DEBUG:
1972 {
1973 int sig;
1974
1975 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1976 if (sig)
1977 {
1978 info.si_signo = sig;
1979 info.si_errno = 0;
1980 info.si_code = TARGET_TRAP_BRKPT;
1981 queue_signal(env, info.si_signo, &info);
1982 }
1983 }
1984 break;
1985 default:
1986 printf ("Unhandled trap: 0x%x\n", trapnr);
1987 cpu_dump_state(env, stderr, fprintf, 0);
1988 exit (1);
1989 }
1990 process_pending_signals (env);
1991 }
1992 }
1993 #endif
1994
1995 #ifdef TARGET_M68K
1996
1997 void cpu_loop(CPUM68KState *env)
1998 {
1999 int trapnr;
2000 unsigned int n;
2001 target_siginfo_t info;
2002 TaskState *ts = env->opaque;
2003
2004 for(;;) {
2005 trapnr = cpu_m68k_exec(env);
2006 switch(trapnr) {
2007 case EXCP_ILLEGAL:
2008 {
2009 if (ts->sim_syscalls) {
2010 uint16_t nr;
2011 nr = lduw(env->pc + 2);
2012 env->pc += 4;
2013 do_m68k_simcall(env, nr);
2014 } else {
2015 goto do_sigill;
2016 }
2017 }
2018 break;
2019 case EXCP_HALT_INSN:
2020 /* Semihosing syscall. */
2021 env->pc += 4;
2022 do_m68k_semihosting(env, env->dregs[0]);
2023 break;
2024 case EXCP_LINEA:
2025 case EXCP_LINEF:
2026 case EXCP_UNSUPPORTED:
2027 do_sigill:
2028 info.si_signo = SIGILL;
2029 info.si_errno = 0;
2030 info.si_code = TARGET_ILL_ILLOPN;
2031 info._sifields._sigfault._addr = env->pc;
2032 queue_signal(env, info.si_signo, &info);
2033 break;
2034 case EXCP_TRAP0:
2035 {
2036 ts->sim_syscalls = 0;
2037 n = env->dregs[0];
2038 env->pc += 2;
2039 env->dregs[0] = do_syscall(env,
2040 n,
2041 env->dregs[1],
2042 env->dregs[2],
2043 env->dregs[3],
2044 env->dregs[4],
2045 env->dregs[5],
2046 env->aregs[0]);
2047 }
2048 break;
2049 case EXCP_INTERRUPT:
2050 /* just indicate that signals should be handled asap */
2051 break;
2052 case EXCP_ACCESS:
2053 {
2054 info.si_signo = SIGSEGV;
2055 info.si_errno = 0;
2056 /* XXX: check env->error_code */
2057 info.si_code = TARGET_SEGV_MAPERR;
2058 info._sifields._sigfault._addr = env->mmu.ar;
2059 queue_signal(env, info.si_signo, &info);
2060 }
2061 break;
2062 case EXCP_DEBUG:
2063 {
2064 int sig;
2065
2066 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2067 if (sig)
2068 {
2069 info.si_signo = sig;
2070 info.si_errno = 0;
2071 info.si_code = TARGET_TRAP_BRKPT;
2072 queue_signal(env, info.si_signo, &info);
2073 }
2074 }
2075 break;
2076 default:
2077 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
2078 trapnr);
2079 cpu_dump_state(env, stderr, fprintf, 0);
2080 abort();
2081 }
2082 process_pending_signals(env);
2083 }
2084 }
2085 #endif /* TARGET_M68K */
2086
2087 #ifdef TARGET_ALPHA
2088 void cpu_loop (CPUState *env)
2089 {
2090 int trapnr;
2091 target_siginfo_t info;
2092
2093 while (1) {
2094 trapnr = cpu_alpha_exec (env);
2095
2096 switch (trapnr) {
2097 case EXCP_RESET:
2098 fprintf(stderr, "Reset requested. Exit\n");
2099 exit(1);
2100 break;
2101 case EXCP_MCHK:
2102 fprintf(stderr, "Machine check exception. Exit\n");
2103 exit(1);
2104 break;
2105 case EXCP_ARITH:
2106 fprintf(stderr, "Arithmetic trap.\n");
2107 exit(1);
2108 break;
2109 case EXCP_HW_INTERRUPT:
2110 fprintf(stderr, "External interrupt. Exit\n");
2111 exit(1);
2112 break;
2113 case EXCP_DFAULT:
2114 fprintf(stderr, "MMU data fault\n");
2115 exit(1);
2116 break;
2117 case EXCP_DTB_MISS_PAL:
2118 fprintf(stderr, "MMU data TLB miss in PALcode\n");
2119 exit(1);
2120 break;
2121 case EXCP_ITB_MISS:
2122 fprintf(stderr, "MMU instruction TLB miss\n");
2123 exit(1);
2124 break;
2125 case EXCP_ITB_ACV:
2126 fprintf(stderr, "MMU instruction access violation\n");
2127 exit(1);
2128 break;
2129 case EXCP_DTB_MISS_NATIVE:
2130 fprintf(stderr, "MMU data TLB miss\n");
2131 exit(1);
2132 break;
2133 case EXCP_UNALIGN:
2134 fprintf(stderr, "Unaligned access\n");
2135 exit(1);
2136 break;
2137 case EXCP_OPCDEC:
2138 fprintf(stderr, "Invalid instruction\n");
2139 exit(1);
2140 break;
2141 case EXCP_FEN:
2142 fprintf(stderr, "Floating-point not allowed\n");
2143 exit(1);
2144 break;
2145 case EXCP_CALL_PAL ... (EXCP_CALL_PALP - 1):
2146 call_pal(env, (trapnr >> 6) | 0x80);
2147 break;
2148 case EXCP_CALL_PALP ... (EXCP_CALL_PALE - 1):
2149 fprintf(stderr, "Privileged call to PALcode\n");
2150 exit(1);
2151 break;
2152 case EXCP_DEBUG:
2153 {
2154 int sig;
2155
2156 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2157 if (sig)
2158 {
2159 info.si_signo = sig;
2160 info.si_errno = 0;
2161 info.si_code = TARGET_TRAP_BRKPT;
2162 queue_signal(env, info.si_signo, &info);
2163 }
2164 }
2165 break;
2166 default:
2167 printf ("Unhandled trap: 0x%x\n", trapnr);
2168 cpu_dump_state(env, stderr, fprintf, 0);
2169 exit (1);
2170 }
2171 process_pending_signals (env);
2172 }
2173 }
2174 #endif /* TARGET_ALPHA */
2175
2176 static void usage(void)
2177 {
2178 printf("qemu-" TARGET_ARCH " version " QEMU_VERSION ", Copyright (c) 2003-2008 Fabrice Bellard\n"
2179 "usage: qemu-" TARGET_ARCH " [options] program [arguments...]\n"
2180 "Linux CPU emulator (compiled for %s emulation)\n"
2181 "\n"
2182 "Standard options:\n"
2183 "-h print this help\n"
2184 "-g port wait gdb connection to port\n"
2185 "-L path set the elf interpreter prefix (default=%s)\n"
2186 "-s size set the stack size in bytes (default=%ld)\n"
2187 "-cpu model select CPU (-cpu ? for list)\n"
2188 "-drop-ld-preload drop LD_PRELOAD for target process\n"
2189 "\n"
2190 "Debug options:\n"
2191 "-d options activate log (logfile=%s)\n"
2192 "-p pagesize set the host page size to 'pagesize'\n"
2193 "-strace log system calls\n"
2194 "\n"
2195 "Environment variables:\n"
2196 "QEMU_STRACE Print system calls and arguments similar to the\n"
2197 " 'strace' program. Enable by setting to any value.\n"
2198 ,
2199 TARGET_ARCH,
2200 interp_prefix,
2201 x86_stack_size,
2202 DEBUG_LOGFILE);
2203 _exit(1);
2204 }
2205
2206 THREAD CPUState *thread_env;
2207
2208 /* Assumes contents are already zeroed. */
2209 void init_task_state(TaskState *ts)
2210 {
2211 int i;
2212
2213 ts->used = 1;
2214 ts->first_free = ts->sigqueue_table;
2215 for (i = 0; i < MAX_SIGQUEUE_SIZE - 1; i++) {
2216 ts->sigqueue_table[i].next = &ts->sigqueue_table[i + 1];
2217 }
2218 ts->sigqueue_table[i].next = NULL;
2219 }
2220
2221 int main(int argc, char **argv)
2222 {
2223 const char *filename;
2224 const char *cpu_model;
2225 struct target_pt_regs regs1, *regs = &regs1;
2226 struct image_info info1, *info = &info1;
2227 TaskState ts1, *ts = &ts1;
2228 CPUState *env;
2229 int optind;
2230 const char *r;
2231 int gdbstub_port = 0;
2232 int drop_ld_preload = 0, environ_count = 0;
2233 char **target_environ, **wrk, **dst;
2234
2235 if (argc <= 1)
2236 usage();
2237
2238 /* init debug */
2239 cpu_set_log_filename(DEBUG_LOGFILE);
2240
2241 cpu_model = NULL;
2242 optind = 1;
2243 for(;;) {
2244 if (optind >= argc)
2245 break;
2246 r = argv[optind];
2247 if (r[0] != '-')
2248 break;
2249 optind++;
2250 r++;
2251 if (!strcmp(r, "-")) {
2252 break;
2253 } else if (!strcmp(r, "d")) {
2254 int mask;
2255 const CPULogItem *item;
2256
2257 if (optind >= argc)
2258 break;
2259
2260 r = argv[optind++];
2261 mask = cpu_str_to_log_mask(r);
2262 if (!mask) {
2263 printf("Log items (comma separated):\n");
2264 for(item = cpu_log_items; item->mask != 0; item++) {
2265 printf("%-10s %s\n", item->name, item->help);
2266 }
2267 exit(1);
2268 }
2269 cpu_set_log(mask);
2270 } else if (!strcmp(r, "s")) {
2271 r = argv[optind++];
2272 x86_stack_size = strtol(r, (char **)&r, 0);
2273 if (x86_stack_size <= 0)
2274 usage();
2275 if (*r == 'M')
2276 x86_stack_size *= 1024 * 1024;
2277 else if (*r == 'k' || *r == 'K')
2278 x86_stack_size *= 1024;
2279 } else if (!strcmp(r, "L")) {
2280 interp_prefix = argv[optind++];
2281 } else if (!strcmp(r, "p")) {
2282 qemu_host_page_size = atoi(argv[optind++]);
2283 if (qemu_host_page_size == 0 ||
2284 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
2285 fprintf(stderr, "page size must be a power of two\n");
2286 exit(1);
2287 }
2288 } else if (!strcmp(r, "g")) {
2289 gdbstub_port = atoi(argv[optind++]);
2290 } else if (!strcmp(r, "r")) {
2291 qemu_uname_release = argv[optind++];
2292 } else if (!strcmp(r, "cpu")) {
2293 cpu_model = argv[optind++];
2294 if (strcmp(cpu_model, "?") == 0) {
2295 /* XXX: implement xxx_cpu_list for targets that still miss it */
2296 #if defined(cpu_list)
2297 cpu_list(stdout, &fprintf);
2298 #endif
2299 _exit(1);
2300 }
2301 } else if (!strcmp(r, "drop-ld-preload")) {
2302 drop_ld_preload = 1;
2303 } else if (!strcmp(r, "strace")) {
2304 do_strace = 1;
2305 } else
2306 {
2307 usage();
2308 }
2309 }
2310 if (optind >= argc)
2311 usage();
2312 filename = argv[optind];
2313
2314 /* Zero out regs */
2315 memset(regs, 0, sizeof(struct target_pt_regs));
2316
2317 /* Zero out image_info */
2318 memset(info, 0, sizeof(struct image_info));
2319
2320 /* Scan interp_prefix dir for replacement files. */
2321 init_paths(interp_prefix);
2322
2323 if (cpu_model == NULL) {
2324 #if defined(TARGET_I386)
2325 #ifdef TARGET_X86_64
2326 cpu_model = "qemu64";
2327 #else
2328 cpu_model = "qemu32";
2329 #endif
2330 #elif defined(TARGET_ARM)
2331 cpu_model = "arm926";
2332 #elif defined(TARGET_M68K)
2333 cpu_model = "any";
2334 #elif defined(TARGET_SPARC)
2335 #ifdef TARGET_SPARC64
2336 cpu_model = "TI UltraSparc II";
2337 #else
2338 cpu_model = "Fujitsu MB86904";
2339 #endif
2340 #elif defined(TARGET_MIPS)
2341 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
2342 cpu_model = "20Kc";
2343 #else
2344 cpu_model = "24Kf";
2345 #endif
2346 #elif defined(TARGET_PPC)
2347 #ifdef TARGET_PPC64
2348 cpu_model = "970";
2349 #else
2350 cpu_model = "750";
2351 #endif
2352 #else
2353 cpu_model = "any";
2354 #endif
2355 }
2356 cpu_exec_init_all(0);
2357 /* NOTE: we need to init the CPU at this stage to get
2358 qemu_host_page_size */
2359 env = cpu_init(cpu_model);
2360 if (!env) {
2361 fprintf(stderr, "Unable to find CPU definition\n");
2362 exit(1);
2363 }
2364 thread_env = env;
2365
2366 if (getenv("QEMU_STRACE")) {
2367 do_strace = 1;
2368 }
2369
2370 wrk = environ;
2371 while (*(wrk++))
2372 environ_count++;
2373
2374 target_environ = malloc((environ_count + 1) * sizeof(char *));
2375 if (!target_environ)
2376 abort();
2377 for (wrk = environ, dst = target_environ; *wrk; wrk++) {
2378 if (drop_ld_preload && !strncmp(*wrk, "LD_PRELOAD=", 11))
2379 continue;
2380 *(dst++) = strdup(*wrk);
2381 }
2382 *dst = NULL; /* NULL terminate target_environ */
2383
2384 if (loader_exec(filename, argv+optind, target_environ, regs, info) != 0) {
2385 printf("Error loading %s\n", filename);
2386 _exit(1);
2387 }
2388
2389 for (wrk = target_environ; *wrk; wrk++) {
2390 free(*wrk);
2391 }
2392
2393 free(target_environ);
2394
2395 if (loglevel) {
2396 page_dump(logfile);
2397
2398 fprintf(logfile, "start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
2399 fprintf(logfile, "end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
2400 fprintf(logfile, "start_code 0x" TARGET_ABI_FMT_lx "\n",
2401 info->start_code);
2402 fprintf(logfile, "start_data 0x" TARGET_ABI_FMT_lx "\n",
2403 info->start_data);
2404 fprintf(logfile, "end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
2405 fprintf(logfile, "start_stack 0x" TARGET_ABI_FMT_lx "\n",
2406 info->start_stack);
2407 fprintf(logfile, "brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
2408 fprintf(logfile, "entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
2409 }
2410
2411 target_set_brk(info->brk);
2412 syscall_init();
2413 signal_init();
2414
2415 /* build Task State */
2416 memset(ts, 0, sizeof(TaskState));
2417 init_task_state(ts);
2418 ts->info = info;
2419 env->opaque = ts;
2420 env->user_mode_only = 1;
2421
2422 #if defined(TARGET_I386)
2423 cpu_x86_set_cpl(env, 3);
2424
2425 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
2426 env->hflags |= HF_PE_MASK;
2427 if (env->cpuid_features & CPUID_SSE) {
2428 env->cr[4] |= CR4_OSFXSR_MASK;
2429 env->hflags |= HF_OSFXSR_MASK;
2430 }
2431 #ifndef TARGET_ABI32
2432 /* enable 64 bit mode if possible */
2433 if (!(env->cpuid_ext2_features & CPUID_EXT2_LM)) {
2434 fprintf(stderr, "The selected x86 CPU does not support 64 bit mode\n");
2435 exit(1);
2436 }
2437 env->cr[4] |= CR4_PAE_MASK;
2438 env->efer |= MSR_EFER_LMA | MSR_EFER_LME;
2439 env->hflags |= HF_LMA_MASK;
2440 #endif
2441
2442 /* flags setup : we activate the IRQs by default as in user mode */
2443 env->eflags |= IF_MASK;
2444
2445 /* linux register setup */
2446 #ifndef TARGET_ABI32
2447 env->regs[R_EAX] = regs->rax;
2448 env->regs[R_EBX] = regs->rbx;
2449 env->regs[R_ECX] = regs->rcx;
2450 env->regs[R_EDX] = regs->rdx;
2451 env->regs[R_ESI] = regs->rsi;
2452 env->regs[R_EDI] = regs->rdi;
2453 env->regs[R_EBP] = regs->rbp;
2454 env->regs[R_ESP] = regs->rsp;
2455 env->eip = regs->rip;
2456 #else
2457 env->regs[R_EAX] = regs->eax;
2458 env->regs[R_EBX] = regs->ebx;
2459 env->regs[R_ECX] = regs->ecx;
2460 env->regs[R_EDX] = regs->edx;
2461 env->regs[R_ESI] = regs->esi;
2462 env->regs[R_EDI] = regs->edi;
2463 env->regs[R_EBP] = regs->ebp;
2464 env->regs[R_ESP] = regs->esp;
2465 env->eip = regs->eip;
2466 #endif
2467
2468 /* linux interrupt setup */
2469 env->idt.base = h2g(idt_table);
2470 env->idt.limit = sizeof(idt_table) - 1;
2471 set_idt(0, 0);
2472 set_idt(1, 0);
2473 set_idt(2, 0);
2474 set_idt(3, 3);
2475 set_idt(4, 3);
2476 set_idt(5, 0);
2477 set_idt(6, 0);
2478 set_idt(7, 0);
2479 set_idt(8, 0);
2480 set_idt(9, 0);
2481 set_idt(10, 0);
2482 set_idt(11, 0);
2483 set_idt(12, 0);
2484 set_idt(13, 0);
2485 set_idt(14, 0);
2486 set_idt(15, 0);
2487 set_idt(16, 0);
2488 set_idt(17, 0);
2489 set_idt(18, 0);
2490 set_idt(19, 0);
2491 set_idt(0x80, 3);
2492
2493 /* linux segment setup */
2494 {
2495 uint64_t *gdt_table;
2496 gdt_table = qemu_mallocz(sizeof(uint64_t) * TARGET_GDT_ENTRIES);
2497 env->gdt.base = h2g((unsigned long)gdt_table);
2498 env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1;
2499 #ifdef TARGET_ABI32
2500 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2501 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2502 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2503 #else
2504 /* 64 bit code segment */
2505 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2506 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2507 DESC_L_MASK |
2508 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2509 #endif
2510 write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
2511 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2512 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
2513 }
2514 cpu_x86_load_seg(env, R_CS, __USER_CS);
2515 cpu_x86_load_seg(env, R_SS, __USER_DS);
2516 #ifdef TARGET_ABI32
2517 cpu_x86_load_seg(env, R_DS, __USER_DS);
2518 cpu_x86_load_seg(env, R_ES, __USER_DS);
2519 cpu_x86_load_seg(env, R_FS, __USER_DS);
2520 cpu_x86_load_seg(env, R_GS, __USER_DS);
2521 /* This hack makes Wine work... */
2522 env->segs[R_FS].selector = 0;
2523 #else
2524 cpu_x86_load_seg(env, R_DS, 0);
2525 cpu_x86_load_seg(env, R_ES, 0);
2526 cpu_x86_load_seg(env, R_FS, 0);
2527 cpu_x86_load_seg(env, R_GS, 0);
2528 #endif
2529 #elif defined(TARGET_ARM)
2530 {
2531 int i;
2532 cpsr_write(env, regs->uregs[16], 0xffffffff);
2533 for(i = 0; i < 16; i++) {
2534 env->regs[i] = regs->uregs[i];
2535 }
2536 }
2537 #elif defined(TARGET_SPARC)
2538 {
2539 int i;
2540 env->pc = regs->pc;
2541 env->npc = regs->npc;
2542 env->y = regs->y;
2543 for(i = 0; i < 8; i++)
2544 env->gregs[i] = regs->u_regs[i];
2545 for(i = 0; i < 8; i++)
2546 env->regwptr[i] = regs->u_regs[i + 8];
2547 }
2548 #elif defined(TARGET_PPC)
2549 {
2550 int i;
2551
2552 #if defined(TARGET_PPC64)
2553 #if defined(TARGET_ABI32)
2554 env->msr &= ~((target_ulong)1 << MSR_SF);
2555 #else
2556 env->msr |= (target_ulong)1 << MSR_SF;
2557 #endif
2558 #endif
2559 env->nip = regs->nip;
2560 for(i = 0; i < 32; i++) {
2561 env->gpr[i] = regs->gpr[i];
2562 }
2563 }
2564 #elif defined(TARGET_M68K)
2565 {
2566 env->pc = regs->pc;
2567 env->dregs[0] = regs->d0;
2568 env->dregs[1] = regs->d1;
2569 env->dregs[2] = regs->d2;
2570 env->dregs[3] = regs->d3;
2571 env->dregs[4] = regs->d4;
2572 env->dregs[5] = regs->d5;
2573 env->dregs[6] = regs->d6;
2574 env->dregs[7] = regs->d7;
2575 env->aregs[0] = regs->a0;
2576 env->aregs[1] = regs->a1;
2577 env->aregs[2] = regs->a2;
2578 env->aregs[3] = regs->a3;
2579 env->aregs[4] = regs->a4;
2580 env->aregs[5] = regs->a5;
2581 env->aregs[6] = regs->a6;
2582 env->aregs[7] = regs->usp;
2583 env->sr = regs->sr;
2584 ts->sim_syscalls = 1;
2585 }
2586 #elif defined(TARGET_MIPS)
2587 {
2588 int i;
2589
2590 for(i = 0; i < 32; i++) {
2591 env->active_tc.gpr[i] = regs->regs[i];
2592 }
2593 env->active_tc.PC = regs->cp0_epc;
2594 }
2595 #elif defined(TARGET_SH4)
2596 {
2597 int i;
2598
2599 for(i = 0; i < 16; i++) {
2600 env->gregs[i] = regs->regs[i];
2601 }
2602 env->pc = regs->pc;
2603 }
2604 #elif defined(TARGET_ALPHA)
2605 {
2606 int i;
2607
2608 for(i = 0; i < 28; i++) {
2609 env->ir[i] = ((abi_ulong *)regs)[i];
2610 }
2611 env->ipr[IPR_USP] = regs->usp;
2612 env->ir[30] = regs->usp;
2613 env->pc = regs->pc;
2614 env->unique = regs->unique;
2615 }
2616 #elif defined(TARGET_CRIS)
2617 {
2618 env->regs[0] = regs->r0;
2619 env->regs[1] = regs->r1;
2620 env->regs[2] = regs->r2;
2621 env->regs[3] = regs->r3;
2622 env->regs[4] = regs->r4;
2623 env->regs[5] = regs->r5;
2624 env->regs[6] = regs->r6;
2625 env->regs[7] = regs->r7;
2626 env->regs[8] = regs->r8;
2627 env->regs[9] = regs->r9;
2628 env->regs[10] = regs->r10;
2629 env->regs[11] = regs->r11;
2630 env->regs[12] = regs->r12;
2631 env->regs[13] = regs->r13;
2632 env->regs[14] = info->start_stack;
2633 env->regs[15] = regs->acr;
2634 env->pc = regs->erp;
2635 }
2636 #else
2637 #error unsupported target CPU
2638 #endif
2639
2640 #if defined(TARGET_ARM) || defined(TARGET_M68K)
2641 ts->stack_base = info->start_stack;
2642 ts->heap_base = info->brk;
2643 /* This will be filled in on the first SYS_HEAPINFO call. */
2644 ts->heap_limit = 0;
2645 #endif
2646
2647 if (gdbstub_port) {
2648 gdbserver_start (gdbstub_port);
2649 gdb_handlesig(env, 0);
2650 }
2651 cpu_loop(env);
2652 /* never exits */
2653 return 0;
2654 }
Patches shipped by Fedora