hw/etraxfs_ser.c

   1 /*
   2  * QEMU ETRAX System Emulator
   3  *
   4  * Copyright (c) 2007 Edgar E. Iglesias, Axis Communications AB.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #include <stdio.h>
  26 #include <ctype.h>
  27 #include "hw.h"
  28
  29 #define D(x)
  30
  31 #define RW_TR_DMA_EN 0x04
  32 #define RW_DOUT 0x1c
  33 #define RW_STAT_DIN 0x20
  34 #define R_STAT_DIN 0x24
  35
  36 static uint32_t ser_readb (void *opaque, target_phys_addr_t addr)
  37 {
  38         CPUState *env;
  39         uint32_t r = 0;
  40
  41         env = opaque;
  42         D(printf ("%s %x pc=%x\n", __func__, addr, env->pc));
  43         return r;
  44 }
  45 static uint32_t ser_readw (void *opaque, target_phys_addr_t addr)
  46 {
  47         CPUState *env;
  48         uint32_t r = 0;
  49         env = opaque;
  50         D(printf ("%s %x pc=%x\n", __func__, addr, env->pc));
  51         return r;
  52 }
  53
  54 static uint32_t ser_readl (void *opaque, target_phys_addr_t addr)
  55 {
  56         CPUState *env = opaque;
  57         uint32_t r = 0;
  58
  59         switch (addr & 0xfff)
  60         {
  61                 case RW_TR_DMA_EN:
  62                         break;
  63                 case R_STAT_DIN:
  64                         r |= 1 << 24; /* set tr_rdy.  */
  65                         r |= 1 << 22; /* set tr_idle.  */
  66                         break;
  67
  68                 default:
  69                         printf ("%s %x p=%x\n", __func__, addr, env->pc);
  70                         break;
  71         }
  72         return r;
  73 }
  74
  75 static void
  76 ser_writeb (void *opaque, target_phys_addr_t addr, uint32_t value)
  77 {
  78         CPUState *env;
  79         env = opaque;
  80         D(printf ("%s %x %x pc=%x\n", __func__, addr, value, env->pc));
  81 }
  82 static void
  83 ser_writew (void *opaque, target_phys_addr_t addr, uint32_t value)
  84 {
  85         CPUState *env;
  86         env = opaque;
  87         D(printf ("%s %x %x pc=%x\n", __func__, addr, value, env->pc));
  88 }
  89 static void
  90 ser_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
  91 {
  92         CPUState *env = opaque;
  93
  94         switch (addr & 0xfff)
  95         {
  96                 case RW_TR_DMA_EN:
  97                         break;
  98                 case RW_DOUT:
  99                         if (isprint(value) || isspace(value))
 100                                 putchar(value);
 101                         else
 102                                 putchar('.');
 103                         break;
 104                 default:
 105                         printf ("%s %x %x pc=%x\n",
 106                                 __func__, addr, value, env->pc);
 107                         break;
 108         }
 109 }
 110
 111 static CPUReadMemoryFunc *ser_read[] = {
 112     &ser_readb,
 113     &ser_readw,
 114     &ser_readl,
 115 };
 116
 117 static CPUWriteMemoryFunc *ser_write[] = {
 118     &ser_writeb,
 119     &ser_writew,
 120     &ser_writel,
 121 };
 122
 123 void etraxfs_ser_init(CPUState *env, qemu_irq *irqs)
 124 {
 125         int ser_regs;
 126
 127         ser_regs = cpu_register_io_memory(0, ser_read, ser_write, env);
 128         cpu_register_physical_memory (0xb0026000, 0x3c, ser_regs);
 129         cpu_register_physical_memory (0xb0028000, 0x3c, ser_regs);
 130         cpu_register_physical_memory (0xb002a000, 0x3c, ser_regs);
 131         cpu_register_physical_memory (0xb002c000, 0x3c, ser_regs);
 132 }