hw/flash.h

   1 /* NOR flash devices */
   2 typedef struct pflash_t pflash_t;
   3
   4 /* pflash_cfi01.c */
   5 pflash_t *pflash_cfi01_register(target_phys_addr_t base, ram_addr_t off,
   6                                 BlockDriverState *bs,
   7                                 uint32_t sector_len, int nb_blocs, int width,
   8                                 uint16_t id0, uint16_t id1,
   9                                 uint16_t id2, uint16_t id3);
  10
  11 /* pflash_cfi02.c */
  12 pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off,
  13                                 BlockDriverState *bs, uint32_t sector_len,
  14                                 int nb_blocs, int width,
  15                                 uint16_t id0, uint16_t id1,
  16                                 uint16_t id2, uint16_t id3);
  17
  18 /* nand.c */
  19 struct nand_flash_s;
  20 struct nand_flash_s *nand_init(int manf_id, int chip_id);
  21 void nand_done(struct nand_flash_s *s);
  22 void nand_setpins(struct nand_flash_s *s,
  23                 int cle, int ale, int ce, int wp, int gnd);
  24 void nand_getpins(struct nand_flash_s *s, int *rb);
  25 void nand_setio(struct nand_flash_s *s, uint8_t value);
  26 uint8_t nand_getio(struct nand_flash_s *s);
  27
  28 #define NAND_MFR_TOSHIBA        0x98
  29 #define NAND_MFR_SAMSUNG        0xec
  30 #define NAND_MFR_FUJITSU        0x04
  31 #define NAND_MFR_NATIONAL       0x8f
  32 #define NAND_MFR_RENESAS        0x07
  33 #define NAND_MFR_STMICRO        0x20
  34 #define NAND_MFR_HYNIX          0xad
  35 #define NAND_MFR_MICRON         0x2c
  36
  37 /* ecc.c */
  38 struct ecc_state_s {
  39     uint8_t cp;         /* Column parity */
  40     uint16_t lp[2];     /* Line parity */
  41     uint16_t count;
  42 };
  43
  44 uint8_t ecc_digest(struct ecc_state_s *s, uint8_t sample);
  45 void ecc_reset(struct ecc_state_s *s);
  46 void ecc_put(QEMUFile *f, struct ecc_state_s *s);
  47 void ecc_get(QEMUFile *f, struct ecc_state_s *s);