kvm-tpr-opt.c

   1 /*
   2  * tpr optimization for qemu/kvm
   3  *
   4  * Copyright (C) 2007-2008 Qumranet Technologies
   5  *
   6  * Licensed under the terms of the GNU GPL version 2 or higher.
   7  */
   8
   9 #include "config.h"
  10 #include "config-host.h"
  11
  12 #include <string.h>
  13
  14 #include "hw/hw.h"
  15 #include "sysemu.h"
  16 #include "qemu-kvm.h"
  17 #include "cpu.h"
  18
  19 #include <stdio.h>
  20
  21 extern kvm_context_t kvm_context;
  22
  23 static uint64_t map_addr(struct kvm_sregs *sregs, target_ulong virt, unsigned *perms)
  24 {
  25     uint64_t mask = ((1ull << 48) - 1) & ~4095ull;
  26     uint64_t p, pp = 7;
  27
  28     p = sregs->cr3;
  29     if (sregs->cr4 & 0x20) {
  30         p &= ~31ull;
  31         p = ldq_phys(p + 8 * (virt >> 30));
  32         if (!(p & 1))
  33             return -1ull;
  34         p &= mask;
  35         p = ldq_phys(p + 8 * ((virt >> 21) & 511));
  36         if (!(p & 1))
  37             return -1ull;
  38         pp &= p;
  39         if (p & 128) {
  40             p += ((virt >> 12) & 511) << 12;
  41         } else {
  42             p &= mask;
  43             p = ldq_phys(p + 8 * ((virt >> 12) & 511));
  44             if (!(p & 1))
  45                 return -1ull;
  46             pp &= p;
  47         }
  48     } else {
  49         p &= mask;
  50         p = ldl_phys(p + 4 * ((virt >> 22) & 1023));
  51         if (!(p & 1))
  52             return -1ull;
  53         pp &= p;
  54         if (p & 128) {
  55             p += ((virt >> 12) & 1023) << 12;
  56         } else {
  57             p &= mask;
  58             p = ldl_phys(p + 4 * ((virt >> 12) & 1023));
  59             pp &= p;
  60             if (!(p & 1))
  61                 return -1ull;
  62         }
  63     }
  64     if (perms)
  65         *perms = pp >> 1;
  66     p &= mask;
  67     return p + (virt & 4095);
  68 }
  69
  70 static uint8_t read_byte_virt(CPUState *env, target_ulong virt)
  71 {
  72     struct kvm_sregs sregs;
  73
  74     kvm_get_sregs(kvm_context, env->cpu_index, &sregs);
  75     return ldub_phys(map_addr(&sregs, virt, NULL));
  76 }
  77
  78 static void write_byte_virt(CPUState *env, target_ulong virt, uint8_t b)
  79 {
  80     struct kvm_sregs sregs;
  81
  82     kvm_get_sregs(kvm_context, env->cpu_index, &sregs);
  83     stb_phys(map_addr(&sregs, virt, NULL), b);
  84 }
  85
  86 struct vapic_bios {
  87     char signature[8];
  88     uint32_t virt_base;
  89     uint32_t fixup_start;
  90     uint32_t fixup_end;
  91     uint32_t vapic;
  92     uint32_t vapic_size;
  93     uint32_t vcpu_shift;
  94     uint32_t real_tpr;
  95     struct vapic_patches {
  96         uint32_t set_tpr;
  97         uint32_t set_tpr_eax;
  98         uint32_t get_tpr[8];
  99     } __attribute__((packed)) up, mp;
 100 } __attribute__((packed));
 101
 102 static struct vapic_bios vapic_bios;
 103
 104 static uint32_t real_tpr;
 105 static uint32_t bios_addr;
 106 static uint32_t vapic_phys;
 107 static int bios_enabled;
 108 static uint32_t vbios_desc_phys;
 109
 110 void update_vbios_real_tpr()
 111 {
 112     cpu_physical_memory_rw(vbios_desc_phys, (void *)&vapic_bios, sizeof vapic_bios, 0);
 113     vapic_bios.real_tpr = real_tpr;
 114     vapic_bios.vcpu_shift = 7;
 115     cpu_physical_memory_rw(vbios_desc_phys, (void *)&vapic_bios, sizeof vapic_bios, 1);
 116 }
 117
 118 static unsigned modrm_reg(uint8_t modrm)
 119 {
 120     return (modrm >> 3) & 7;
 121 }
 122
 123 static int is_abs_modrm(uint8_t modrm)
 124 {
 125     return (modrm & 0xc7) == 0x05;
 126 }
 127
 128 static int instruction_is_ok(CPUState *env, uint64_t rip, int is_write)
 129 {
 130     uint8_t b1, b2;
 131     unsigned addr_offset;
 132     uint32_t addr;
 133     uint64_t p;
 134
 135     if ((rip & 0xf0000000) != 0x80000000 && (rip & 0xf0000000) != 0xe0000000)
 136         return 0;
 137     b1 = read_byte_virt(env, rip);
 138     b2 = read_byte_virt(env, rip + 1);
 139     switch (b1) {
 140     case 0xc7: /* mov imm32, r/m32 (c7/0) */
 141         if (modrm_reg(b2) != 0)
 142             return 0;
 143         /* fall through */
 144     case 0x89: /* mov r32 to r/m32 */
 145     case 0x8b: /* mov r/m32 to r32 */
 146         if (!is_abs_modrm(b2))
 147             return 0;
 148         addr_offset = 2;
 149         break;
 150     case 0xa1: /* mov abs to eax */
 151     case 0xa3: /* mov eax to abs */
 152         addr_offset = 1;
 153         break;
 154     default:
 155         return 0;
 156     }
 157     p = rip + addr_offset;
 158     addr = read_byte_virt(env, p++);
 159     addr |= read_byte_virt(env, p++) << 8;
 160     addr |= read_byte_virt(env, p++) << 16;
 161     addr |= read_byte_virt(env, p++) << 24;
 162     if ((addr & 0xfff) != 0x80)
 163         return 0;
 164     real_tpr = addr;
 165     update_vbios_real_tpr();
 166     return 1;
 167 }
 168
 169 static int bios_is_mapped(CPUState *env, uint64_t rip)
 170 {
 171     uint32_t probe;
 172     uint64_t phys;
 173     struct kvm_sregs sregs;
 174     unsigned perms;
 175     uint32_t i;
 176     uint32_t offset, fixup;
 177
 178     if (bios_enabled)
 179         return 1;
 180
 181     kvm_get_sregs(kvm_context, env->cpu_index, &sregs);
 182
 183     probe = (rip & 0xf0000000) + 0xe0000;
 184     phys = map_addr(&sregs, probe, &perms);
 185     if (phys != 0xe0000)
 186         return 0;
 187     bios_addr = probe;
 188     for (i = 0; i < 64; ++i) {
 189         cpu_physical_memory_read(phys, (void *)&vapic_bios, sizeof(vapic_bios));
 190         if (memcmp(vapic_bios.signature, "kvm aPiC", 8) == 0)
 191             break;
 192         phys += 1024;
 193         bios_addr += 1024;
 194     }
 195     if (i == 64)
 196         return 0;
 197     if (bios_addr == vapic_bios.virt_base)
 198         return 1;
 199     vbios_desc_phys = phys;
 200     for (i = vapic_bios.fixup_start; i < vapic_bios.fixup_end; i += 4) {
 201         offset = ldl_phys(phys + i - vapic_bios.virt_base);
 202         fixup = phys + offset;
 203         stl_phys(fixup, ldl_phys(fixup) + bios_addr - vapic_bios.virt_base);
 204     }
 205     vapic_phys = vapic_bios.vapic - vapic_bios.virt_base + phys;
 206     return 1;
 207 }
 208
 209 static int enable_vapic(CPUState *env)
 210 {
 211     struct kvm_sregs sregs;
 212
 213     if (smp_cpus > 1) {/* uniprocessor doesn't need cpu id */
 214         kvm_get_sregs(kvm_context, env->cpu_index, &sregs);
 215         sregs.tr.selector = 0xdb + (env->cpu_index << 8);
 216         kvm_set_sregs(kvm_context, env->cpu_index, &sregs);
 217     }
 218
 219     kvm_enable_vapic(kvm_context, env->cpu_index,
 220                      vapic_phys + (env->cpu_index << 7));
 221     bios_enabled = 1;
 222
 223     return 1;
 224 }
 225
 226 static void patch_call(CPUState *env, uint64_t rip, uint32_t target)
 227 {
 228     uint32_t offset;
 229
 230     offset = target - vapic_bios.virt_base + bios_addr - rip - 5;
 231     write_byte_virt(env, rip, 0xe8); /* call near */
 232     write_byte_virt(env, rip + 1, offset);
 233     write_byte_virt(env, rip + 2, offset >> 8);
 234     write_byte_virt(env, rip + 3, offset >> 16);
 235     write_byte_virt(env, rip + 4, offset >> 24);
 236 }
 237
 238 static void patch_instruction(CPUState *env, uint64_t rip)
 239 {
 240     uint8_t b1, b2;
 241     struct vapic_patches *vp;
 242
 243     vp = smp_cpus == 1 ? &vapic_bios.up : &vapic_bios.mp;
 244     b1 = read_byte_virt(env, rip);
 245     b2 = read_byte_virt(env, rip + 1);
 246     switch (b1) {
 247     case 0x89: /* mov r32 to r/m32 */
 248         write_byte_virt(env, rip, 0x50 + modrm_reg(b2));  /* push reg */
 249         patch_call(env, rip + 1, vp->set_tpr);
 250         break;
 251     case 0x8b: /* mov r/m32 to r32 */
 252         write_byte_virt(env, rip, 0x90);
 253         patch_call(env, rip + 1, vp->get_tpr[modrm_reg(b2)]);
 254         break;
 255     case 0xa1: /* mov abs to eax */
 256         patch_call(env, rip, vp->get_tpr[0]);
 257         break;
 258     case 0xa3: /* mov eax to abs */
 259         patch_call(env, rip, vp->set_tpr_eax);
 260         break;
 261     case 0xc7: /* mov imm32, r/m32 (c7/0) */
 262         write_byte_virt(env, rip, 0x68);  /* push imm32 */
 263         write_byte_virt(env, rip + 1, read_byte_virt(env, rip+6));
 264         write_byte_virt(env, rip + 2, read_byte_virt(env, rip+7));
 265         write_byte_virt(env, rip + 3, read_byte_virt(env, rip+8));
 266         write_byte_virt(env, rip + 4, read_byte_virt(env, rip+9));
 267         patch_call(env, rip + 5, vp->set_tpr);
 268         break;
 269     default:
 270         printf("funny insn %02x %02x\n", b1, b2);
 271     }
 272 }
 273
 274 void kvm_tpr_access_report(CPUState *env, uint64_t rip, int is_write)
 275 {
 276     if (!instruction_is_ok(env, rip, is_write))
 277         return;
 278     if (!bios_is_mapped(env, rip))
 279         return;
 280     if (!enable_vapic(env))
 281         return;
 282     patch_instruction(env, rip);
 283 }
 284
 285 void kvm_tpr_vcpu_start(CPUState *env)
 286 {
 287     if (smp_cpus > 1)
 288         return;
 289     kvm_enable_tpr_access_reporting(kvm_context, env->cpu_index);
 290     if (bios_enabled)
 291         enable_vapic(env);
 292 }
 293
 294 static void tpr_save(QEMUFile *f, void *s)
 295 {
 296     int i;
 297
 298     for (i = 0; i < (sizeof vapic_bios) / 4; ++i)
 299         qemu_put_be32s(f, &((uint32_t *)&vapic_bios)[i]);
 300     qemu_put_be32s(f, &bios_enabled);
 301     qemu_put_be32s(f, &real_tpr);
 302     qemu_put_be32s(f, &bios_addr);
 303     qemu_put_be32s(f, &vapic_phys);
 304     qemu_put_be32s(f, &vbios_desc_phys);
 305 }
 306
 307 static int tpr_load(QEMUFile *f, void *s, int version_id)
 308 {
 309     int i;
 310
 311     if (version_id != 1)
 312         return -EINVAL;
 313
 314     for (i = 0; i < (sizeof vapic_bios) / 4; ++i)
 315         qemu_get_be32s(f, &((uint32_t *)&vapic_bios)[i]);
 316     qemu_get_be32s(f, &bios_enabled);
 317     qemu_get_be32s(f, &real_tpr);
 318     qemu_get_be32s(f, &bios_addr);
 319     qemu_get_be32s(f, &vapic_phys);
 320     qemu_get_be32s(f, &vbios_desc_phys);
 321
 322     if (bios_enabled) {
 323         CPUState *env = first_cpu->next_cpu;
 324
 325         for (env = first_cpu; env != NULL; env = env->next_cpu)
 326             enable_vapic(env);
 327     }
 328
 329     return 0;
 330 }
 331
 332 void kvm_tpr_opt_setup(CPUState *env)
 333 {
 334     register_savevm("kvm-tpr-opt", 0, 1, tpr_save, tpr_load, NULL);
 335 }
 336