target-sh4/op.c

   1 /*
   2  *  SH4 emulation
   3  *
   4  *  Copyright (c) 2005 Samuel Tardieu
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20 #include "exec.h"
  21
  22 static inline void set_t(void)
  23 {
  24     env->sr |= SR_T;
  25 }
  26
  27 static inline void clr_t(void)
  28 {
  29     env->sr &= ~SR_T;
  30 }
  31
  32 static inline void cond_t(int cond)
  33 {
  34     if (cond)
  35         set_t();
  36     else
  37         clr_t();
  38 }
  39
  40 void OPPROTO op_movl_imm_T0(void)
  41 {
  42     T0 = (uint32_t) PARAM1;
  43     RETURN();
  44 }
  45
  46 void OPPROTO op_movl_imm_T1(void)
  47 {
  48     T0 = (uint32_t) PARAM1;
  49     RETURN();
  50 }
  51
  52 void OPPROTO op_movl_imm_T2(void)
  53 {
  54     T0 = (uint32_t) PARAM1;
  55     RETURN();
  56 }
  57
  58 void OPPROTO op_cmp_eq_imm_T0(void)
  59 {
  60     cond_t((int32_t) T0 == (int32_t) PARAM1);
  61     RETURN();
  62 }
  63
  64 void OPPROTO op_cmd_eq_T0_T1(void)
  65 {
  66     cond_t(T0 == T1);
  67     RETURN();
  68 }
  69
  70 void OPPROTO op_cmd_hs_T0_T1(void)
  71 {
  72     cond_t((uint32_t) T0 <= (uint32_t) T1);
  73     RETURN();
  74 }
  75
  76 void OPPROTO op_cmd_ge_T0_T1(void)
  77 {
  78     cond_t((int32_t) T0 <= (int32_t) T1);
  79     RETURN();
  80 }
  81
  82 void OPPROTO op_cmd_hi_T0_T1(void)
  83 {
  84     cond_t((uint32_t) T0 < (uint32_t) T1);
  85     RETURN();
  86 }
  87
  88 void OPPROTO op_cmd_gt_T0_T1(void)
  89 {
  90     cond_t((int32_t) T0 < (int32_t) T1);
  91     RETURN();
  92 }
  93
  94 void OPPROTO op_not_T0(void)
  95 {
  96     T0 = ~T0;
  97     RETURN();
  98 }
  99
 100 void OPPROTO op_bf_s(void)
 101 {
 102     env->delayed_pc = PARAM1;
 103     if (!(env->sr & SR_T)) {
 104         env->flags |= DELAY_SLOT_TRUE;
 105     }
 106     RETURN();
 107 }
 108
 109 void OPPROTO op_bt_s(void)
 110 {
 111     env->delayed_pc = PARAM1;
 112     if (env->sr & SR_T) {
 113         env->flags |= DELAY_SLOT_TRUE;
 114     }
 115     RETURN();
 116 }
 117
 118 void OPPROTO op_store_flags(void)
 119 {
 120     env->flags &= DELAY_SLOT_TRUE;
 121     env->flags |= PARAM1;
 122     RETURN();
 123 }
 124
 125 void OPPROTO op_bra(void)
 126 {
 127     env->delayed_pc = PARAM1;
 128     RETURN();
 129 }
 130
 131 void OPPROTO op_braf_T0(void)
 132 {
 133     env->delayed_pc = PARAM1 + T0;
 134     RETURN();
 135 }
 136
 137 void OPPROTO op_bsr(void)
 138 {
 139     env->pr = PARAM1;
 140     env->delayed_pc = PARAM2;
 141     RETURN();
 142 }
 143
 144 void OPPROTO op_bsrf_T0(void)
 145 {
 146     env->pr = PARAM1;
 147     env->delayed_pc = PARAM1 + T0;
 148     RETURN();
 149 }
 150
 151 void OPPROTO op_jsr_T0(void)
 152 {
 153     env->pr = PARAM1;
 154     env->delayed_pc = T0;
 155     RETURN();
 156 }
 157
 158 void OPPROTO op_rts(void)
 159 {
 160     env->delayed_pc = env->pr;
 161     RETURN();
 162 }
 163
 164 void OPPROTO op_addl_imm_T0(void)
 165 {
 166     T0 += PARAM1;
 167     RETURN();
 168 }
 169
 170 void OPPROTO op_addl_imm_T1(void)
 171 {
 172     T1 += PARAM1;
 173     RETURN();
 174 }
 175
 176 void OPPROTO op_clrmac(void)
 177 {
 178     env->mach = env->macl = 0;
 179     RETURN();
 180 }
 181
 182 void OPPROTO op_clrs(void)
 183 {
 184     env->sr &= ~SR_S;
 185     RETURN();
 186 }
 187
 188 void OPPROTO op_clrt(void)
 189 {
 190     env->sr &= ~SR_T;
 191     RETURN();
 192 }
 193
 194 void OPPROTO op_sets(void)
 195 {
 196     env->sr |= SR_S;
 197     RETURN();
 198 }
 199
 200 void OPPROTO op_sett(void)
 201 {
 202     env->sr |= SR_T;
 203     RETURN();
 204 }
 205
 206 void OPPROTO op_frchg(void)
 207 {
 208     env->fpscr ^= FPSCR_FR;
 209     RETURN();
 210 }
 211
 212 void OPPROTO op_fschg(void)
 213 {
 214     env->fpscr ^= FPSCR_SZ;
 215     RETURN();
 216 }
 217
 218 void OPPROTO op_rte(void)
 219 {
 220     env->sr = env->ssr;
 221     env->delayed_pc = env->spc;
 222     RETURN();
 223 }
 224
 225 void OPPROTO op_swapb_T0(void)
 226 {
 227     T0 = (T0 & 0xffff0000) | ((T0 & 0xff) << 8) | ((T0 >> 8) & 0xff);
 228     RETURN();
 229 }
 230
 231 void OPPROTO op_swapw_T0(void)
 232 {
 233     T0 = ((T0 & 0xffff) << 16) | ((T0 >> 16) & 0xffff);
 234     RETURN();
 235 }
 236
 237 void OPPROTO op_xtrct_T0_T1(void)
 238 {
 239     T1 = ((T0 & 0xffff) << 16) | ((T1 >> 16) & 0xffff);
 240     RETURN();
 241 }
 242
 243 void OPPROTO op_addc_T0_T1(void)
 244 {
 245     helper_addc_T0_T1();
 246     RETURN();
 247 }
 248
 249 void OPPROTO op_addv_T0_T1(void)
 250 {
 251     helper_addv_T0_T1();
 252     RETURN();
 253 }
 254
 255 void OPPROTO op_cmp_eq_T0_T1(void)
 256 {
 257     cond_t(T1 == T0);
 258     RETURN();
 259 }
 260
 261 void OPPROTO op_cmp_ge_T0_T1(void)
 262 {
 263     cond_t((int32_t) T1 >= (int32_t) T0);
 264     RETURN();
 265 }
 266
 267 void OPPROTO op_cmp_gt_T0_T1(void)
 268 {
 269     cond_t((int32_t) T1 > (int32_t) T0);
 270     RETURN();
 271 }
 272
 273 void OPPROTO op_cmp_hi_T0_T1(void)
 274 {
 275     cond_t((uint32_t) T1 > (uint32_t) T0);
 276     RETURN();
 277 }
 278
 279 void OPPROTO op_cmp_hs_T0_T1(void)
 280 {
 281     cond_t((uint32_t) T1 >= (uint32_t) T0);
 282     RETURN();
 283 }
 284
 285 void OPPROTO op_cmp_str_T0_T1(void)
 286 {
 287     cond_t((T0 & 0x000000ff) == (T1 & 0x000000ff) ||
 288            (T0 & 0x0000ff00) == (T1 & 0x0000ff00) ||
 289            (T0 & 0x00ff0000) == (T1 & 0x00ff0000) ||
 290            (T0 & 0xff000000) == (T1 & 0xff000000));
 291     RETURN();
 292 }
 293
 294 void OPPROTO op_tst_T0_T1(void)
 295 {
 296     cond_t((T1 & T0) == 0);
 297     RETURN();
 298 }
 299
 300 void OPPROTO op_div0s_T0_T1(void)
 301 {
 302     if (T1 & 0x80000000)
 303         env->sr |= SR_Q;
 304     else
 305         env->sr &= ~SR_Q;
 306     if (T0 & 0x80000000)
 307         env->sr |= SR_M;
 308     else
 309         env->sr &= ~SR_M;
 310     cond_t((T1 ^ T0) & 0x80000000);
 311     RETURN();
 312 }
 313
 314 void OPPROTO op_div0u(void)
 315 {
 316     env->sr &= ~(SR_M | SR_Q | SR_T);
 317     RETURN();
 318 }
 319
 320 void OPPROTO op_div1_T0_T1(void)
 321 {
 322     helper_div1_T0_T1();
 323     RETURN();
 324 }
 325
 326 void OPPROTO op_dmulsl_T0_T1(void)
 327 {
 328     helper_dmulsl_T0_T1();
 329     RETURN();
 330 }
 331
 332 void OPPROTO op_dmulul_T0_T1(void)
 333 {
 334     helper_dmulul_T0_T1();
 335     RETURN();
 336 }
 337
 338 void OPPROTO op_macl_T0_T1(void)
 339 {
 340     helper_macl_T0_T1();
 341     RETURN();
 342 }
 343
 344 void OPPROTO op_macw_T0_T1(void)
 345 {
 346     helper_macw_T0_T1();
 347     RETURN();
 348 }
 349
 350 void OPPROTO op_mull_T0_T1(void)
 351 {
 352     env->macl = (T0 * T1) & 0xffffffff;
 353     RETURN();
 354 }
 355
 356 void OPPROTO op_mulsw_T0_T1(void)
 357 {
 358     env->macl = (int32_t) T0 *(int32_t) T1;
 359     RETURN();
 360 }
 361
 362 void OPPROTO op_muluw_T0_T1(void)
 363 {
 364     env->macl = (uint32_t) T0 *(uint32_t) T1;
 365     RETURN();
 366 }
 367
 368 void OPPROTO op_neg_T0(void)
 369 {
 370     T0 = -T0;
 371     RETURN();
 372 }
 373
 374 void OPPROTO op_negc_T0(void)
 375 {
 376     helper_negc_T0();
 377     RETURN();
 378 }
 379
 380 void OPPROTO op_shad_T0_T1(void)
 381 {
 382     if ((T0 & 0x80000000) == 0)
 383         T1 <<= (T0 & 0x1f);
 384     else if ((T0 & 0x1f) == 0)
 385         T1 = 0;
 386     else
 387         T1 = ((int32_t) T1) >> ((~T0 & 0x1f) + 1);
 388     RETURN();
 389 }
 390
 391 void OPPROTO op_shld_T0_T1(void)
 392 {
 393     if ((T0 & 0x80000000) == 0)
 394         T1 <<= (T0 & 0x1f);
 395     else if ((T0 & 0x1f) == 0)
 396         T1 = 0;
 397     else
 398         T1 = ((uint32_t) T1) >> ((~T0 & 0x1f) + 1);
 399     RETURN();
 400 }
 401
 402 void OPPROTO op_subc_T0_T1(void)
 403 {
 404     helper_subc_T0_T1();
 405     RETURN();
 406 }
 407
 408 void OPPROTO op_subv_T0_T1(void)
 409 {
 410     helper_subv_T0_T1();
 411     RETURN();
 412 }
 413
 414 void OPPROTO op_trapa(void)
 415 {
 416     env->tra = PARAM1 << 2;
 417     env->exception_index = 0x160;
 418     do_raise_exception();
 419     RETURN();
 420 }
 421
 422 void OPPROTO op_cmp_pl_T0(void)
 423 {
 424     cond_t((int32_t) T0 > 0);
 425     RETURN();
 426 }
 427
 428 void OPPROTO op_cmp_pz_T0(void)
 429 {
 430     cond_t((int32_t) T0 >= 0);
 431     RETURN();
 432 }
 433
 434 void OPPROTO op_jmp_T0(void)
 435 {
 436     env->delayed_pc = T0;
 437     RETURN();
 438 }
 439
 440 void OPPROTO op_movl_rN_rN(void)
 441 {
 442     env->gregs[PARAM2] = env->gregs[PARAM1];
 443     RETURN();
 444 }
 445
 446 void OPPROTO op_ldcl_rMplus_rN_bank(void)
 447 {
 448     env->gregs[PARAM2] = env->gregs[PARAM1];
 449     env->gregs[PARAM1] += 4;
 450     RETURN();
 451 }
 452
 453 void OPPROTO op_ldc_T0_sr(void)
 454 {
 455     env->sr = T0 & 0x700083f3;
 456     RETURN();
 457 }
 458
 459 void OPPROTO op_stc_sr_T0(void)
 460 {
 461     T0 = env->sr;
 462     RETURN();
 463 }
 464
 465 #define LDSTOPS(target,load,store) \
 466 void OPPROTO op_##load##_T0_##target (void) \
 467 { env ->target = T0;   RETURN(); \
 468 } \
 469 void OPPROTO op_##store##_##target##_T0 (void) \
 470 { T0 = env->target;   RETURN(); \
 471 } \
 472
 473     LDSTOPS(gbr, ldc, stc)
 474     LDSTOPS(vbr, ldc, stc)
 475     LDSTOPS(ssr, ldc, stc)
 476     LDSTOPS(spc, ldc, stc)
 477     LDSTOPS(sgr, ldc, stc)
 478     LDSTOPS(dbr, ldc, stc)
 479     LDSTOPS(mach, lds, sts)
 480     LDSTOPS(macl, lds, sts)
 481     LDSTOPS(pr, lds, sts)
 482     LDSTOPS(fpul, lds, sts)
 483
 484 void OPPROTO op_lds_T0_fpscr(void)
 485 {
 486     env->fpscr = T0 & 0x003fffff;
 487     env->fp_status.float_rounding_mode = T0 & 0x01 ?
 488       float_round_to_zero : float_round_nearest_even;
 489
 490     RETURN();
 491 }
 492
 493 void OPPROTO op_sts_fpscr_T0(void)
 494 {
 495     T0 = env->fpscr & 0x003fffff;
 496     RETURN();
 497 }
 498
 499 void OPPROTO op_movt_rN(void)
 500 {
 501     env->gregs[PARAM1] = env->sr & SR_T;
 502     RETURN();
 503 }
 504
 505 void OPPROTO op_rotcl_Rn(void)
 506 {
 507     helper_rotcl(&env->gregs[PARAM1]);
 508     RETURN();
 509 }
 510
 511 void OPPROTO op_rotcr_Rn(void)
 512 {
 513     helper_rotcr(&env->gregs[PARAM1]);
 514     RETURN();
 515 }
 516
 517 void OPPROTO op_rotl_Rn(void)
 518 {
 519     cond_t(env->gregs[PARAM1] & 0x80000000);
 520     env->gregs[PARAM1] = (env->gregs[PARAM1] << 1) | (env->sr & SR_T);
 521     RETURN();
 522 }
 523
 524 void OPPROTO op_rotr_Rn(void)
 525 {
 526     cond_t(env->gregs[PARAM1] & 1);
 527     env->gregs[PARAM1] = (env->gregs[PARAM1] >> 1) |
 528         ((env->sr & SR_T) ? 0x80000000 : 0);
 529     RETURN();
 530 }
 531
 532 void OPPROTO op_shal_Rn(void)
 533 {
 534     cond_t(env->gregs[PARAM1] & 0x80000000);
 535     env->gregs[PARAM1] <<= 1;
 536     RETURN();
 537 }
 538
 539 void OPPROTO op_shar_Rn(void)
 540 {
 541     cond_t(env->gregs[PARAM1] & 1);
 542     env->gregs[PARAM1] >>= 1;
 543     RETURN();
 544 }
 545
 546 void OPPROTO op_shlr_Rn(void)
 547 {
 548     cond_t(env->gregs[PARAM1] & 1);
 549     env->gregs[PARAM1] >>= 1;
 550     RETURN();
 551 }
 552
 553 void OPPROTO op_shll2_Rn(void)
 554 {
 555     env->gregs[PARAM1] <<= 2;
 556     RETURN();
 557 }
 558
 559 void OPPROTO op_shll8_Rn(void)
 560 {
 561     env->gregs[PARAM1] <<= 8;
 562     RETURN();
 563 }
 564
 565 void OPPROTO op_shll16_Rn(void)
 566 {
 567     env->gregs[PARAM1] <<= 16;
 568     RETURN();
 569 }
 570
 571 void OPPROTO op_shlr2_Rn(void)
 572 {
 573     env->gregs[PARAM1] >>= 2;
 574     RETURN();
 575 }
 576
 577 void OPPROTO op_shlr8_Rn(void)
 578 {
 579     env->gregs[PARAM1] >>= 8;
 580     RETURN();
 581 }
 582
 583 void OPPROTO op_shlr16_Rn(void)
 584 {
 585     env->gregs[PARAM1] >>= 16;
 586     RETURN();
 587 }
 588
 589 void OPPROTO op_tasb_rN(void)
 590 {
 591     cond_t(*(int8_t *) env->gregs[PARAM1] == 0);
 592     *(int8_t *) env->gregs[PARAM1] |= 0x80;
 593     RETURN();
 594 }
 595
 596 void OPPROTO op_movl_T0_rN(void)
 597 {
 598     env->gregs[PARAM1] = T0;
 599     RETURN();
 600 }
 601
 602 void OPPROTO op_movl_T1_rN(void)
 603 {
 604     env->gregs[PARAM1] = T1;
 605     RETURN();
 606 }
 607
 608 void OPPROTO op_movb_rN_T0(void)
 609 {
 610     T0 = (int32_t) (int8_t) (env->gregs[PARAM1] & 0xff);
 611     RETURN();
 612 }
 613
 614 void OPPROTO op_movub_rN_T0(void)
 615 {
 616     T0 = env->gregs[PARAM1] & 0xff;
 617     RETURN();
 618 }
 619
 620 void OPPROTO op_movw_rN_T0(void)
 621 {
 622     T0 = (int32_t) (int16_t) (env->gregs[PARAM1] & 0xffff);
 623     RETURN();
 624 }
 625
 626 void OPPROTO op_movuw_rN_T0(void)
 627 {
 628     T0 = env->gregs[PARAM1] & 0xffff;
 629     RETURN();
 630 }
 631
 632 void OPPROTO op_movl_rN_T0(void)
 633 {
 634     T0 = env->gregs[PARAM1];
 635     RETURN();
 636 }
 637
 638 void OPPROTO op_movb_rN_T1(void)
 639 {
 640     T1 = (int32_t) (int8_t) (env->gregs[PARAM1] & 0xff);
 641     RETURN();
 642 }
 643
 644 void OPPROTO op_movub_rN_T1(void)
 645 {
 646     T1 = env->gregs[PARAM1] & 0xff;
 647     RETURN();
 648 }
 649
 650 void OPPROTO op_movw_rN_T1(void)
 651 {
 652     T1 = (int32_t) (int16_t) (env->gregs[PARAM1] & 0xffff);
 653     RETURN();
 654 }
 655
 656 void OPPROTO op_movuw_rN_T1(void)
 657 {
 658     T1 = env->gregs[PARAM1] & 0xffff;
 659     RETURN();
 660 }
 661
 662 void OPPROTO op_movl_rN_T1(void)
 663 {
 664     T1 = env->gregs[PARAM1];
 665     RETURN();
 666 }
 667
 668 void OPPROTO op_movl_imm_rN(void)
 669 {
 670     env->gregs[PARAM2] = PARAM1;
 671     RETURN();
 672 }
 673
 674 void OPPROTO op_fmov_frN_FT0(void)
 675 {
 676     FT0 = env->fregs[PARAM1];
 677     RETURN();
 678 }
 679
 680 void OPPROTO op_fmov_drN_DT0(void)
 681 {
 682     CPU_DoubleU d;
 683
 684     d.l.upper = *(uint32_t *)&env->fregs[PARAM1];
 685     d.l.lower = *(uint32_t *)&env->fregs[PARAM1 + 1];
 686     DT0 = d.d;
 687     RETURN();
 688 }
 689
 690 void OPPROTO op_fmov_frN_FT1(void)
 691 {
 692     FT1 = env->fregs[PARAM1];
 693     RETURN();
 694 }
 695
 696 void OPPROTO op_fmov_drN_DT1(void)
 697 {
 698     CPU_DoubleU d;
 699
 700     d.l.upper = *(uint32_t *)&env->fregs[PARAM1];
 701     d.l.lower = *(uint32_t *)&env->fregs[PARAM1 + 1];
 702     DT1 = d.d;
 703     RETURN();
 704 }
 705
 706 void OPPROTO op_fmov_FT0_frN(void)
 707 {
 708     env->fregs[PARAM1] = FT0;
 709     RETURN();
 710 }
 711
 712 void OPPROTO op_fmov_DT0_drN(void)
 713 {
 714     CPU_DoubleU d;
 715
 716     d.d = DT0;
 717     *(uint32_t *)&env->fregs[PARAM1] = d.l.upper;
 718     *(uint32_t *)&env->fregs[PARAM1 + 1] = d.l.lower;
 719     RETURN();
 720 }
 721
 722 void OPPROTO op_fadd_FT(void)
 723 {
 724     FT0 = float32_add(FT0, FT1, &env->fp_status);
 725     RETURN();
 726 }
 727
 728 void OPPROTO op_fadd_DT(void)
 729 {
 730     DT0 = float64_add(DT0, DT1, &env->fp_status);
 731     RETURN();
 732 }
 733
 734 void OPPROTO op_fsub_FT(void)
 735 {
 736     FT0 = float32_sub(FT0, FT1, &env->fp_status);
 737     RETURN();
 738 }
 739
 740 void OPPROTO op_fsub_DT(void)
 741 {
 742     DT0 = float64_sub(DT0, DT1, &env->fp_status);
 743     RETURN();
 744 }
 745
 746 void OPPROTO op_fmul_FT(void)
 747 {
 748     FT0 = float32_mul(FT0, FT1, &env->fp_status);
 749     RETURN();
 750 }
 751
 752 void OPPROTO op_fmul_DT(void)
 753 {
 754     DT0 = float64_mul(DT0, DT1, &env->fp_status);
 755     RETURN();
 756 }
 757
 758 void OPPROTO op_fdiv_FT(void)
 759 {
 760     FT0 = float32_div(FT0, FT1, &env->fp_status);
 761     RETURN();
 762 }
 763
 764 void OPPROTO op_fdiv_DT(void)
 765 {
 766     DT0 = float64_div(DT0, DT1, &env->fp_status);
 767     RETURN();
 768 }
 769
 770 void OPPROTO op_float_FT(void)
 771 {
 772     FT0 = int32_to_float32(env->fpul, &env->fp_status);
 773     RETURN();
 774 }
 775
 776 void OPPROTO op_float_DT(void)
 777 {
 778     DT0 = int32_to_float64(env->fpul, &env->fp_status);
 779     RETURN();
 780 }
 781
 782 void OPPROTO op_ftrc_FT(void)
 783 {
 784     env->fpul = float32_to_int32_round_to_zero(FT0, &env->fp_status);
 785     RETURN();
 786 }
 787
 788 void OPPROTO op_ftrc_DT(void)
 789 {
 790     env->fpul = float64_to_int32_round_to_zero(DT0, &env->fp_status);
 791     RETURN();
 792 }
 793
 794 void OPPROTO op_fmov_T0_frN(void)
 795 {
 796     *(unsigned int *)&env->fregs[PARAM1] = T0;
 797     RETURN();
 798 }
 799
 800 void OPPROTO op_dec1_rN(void)
 801 {
 802     env->gregs[PARAM1] -= 1;
 803     RETURN();
 804 }
 805
 806 void OPPROTO op_dec2_rN(void)
 807 {
 808     env->gregs[PARAM1] -= 2;
 809     RETURN();
 810 }
 811
 812 void OPPROTO op_dec4_rN(void)
 813 {
 814     env->gregs[PARAM1] -= 4;
 815     RETURN();
 816 }
 817
 818 void OPPROTO op_dec8_rN(void)
 819 {
 820     env->gregs[PARAM1] -= 8;
 821     RETURN();
 822 }
 823
 824 void OPPROTO op_inc1_rN(void)
 825 {
 826     env->gregs[PARAM1] += 1;
 827     RETURN();
 828 }
 829
 830 void OPPROTO op_inc2_rN(void)
 831 {
 832     env->gregs[PARAM1] += 2;
 833     RETURN();
 834 }
 835
 836 void OPPROTO op_inc4_rN(void)
 837 {
 838     env->gregs[PARAM1] += 4;
 839     RETURN();
 840 }
 841
 842 void OPPROTO op_inc8_rN(void)
 843 {
 844     env->gregs[PARAM1] += 8;
 845     RETURN();
 846 }
 847
 848 void OPPROTO op_add_T0_rN(void)
 849 {
 850     env->gregs[PARAM1] += T0;
 851     RETURN();
 852 }
 853
 854 void OPPROTO op_sub_T0_rN(void)
 855 {
 856     env->gregs[PARAM1] -= T0;
 857     RETURN();
 858 }
 859
 860 void OPPROTO op_and_T0_rN(void)
 861 {
 862     env->gregs[PARAM1] &= T0;
 863     RETURN();
 864 }
 865
 866 void OPPROTO op_or_T0_rN(void)
 867 {
 868     env->gregs[PARAM1] |= T0;
 869     RETURN();
 870 }
 871
 872 void OPPROTO op_xor_T0_rN(void)
 873 {
 874     env->gregs[PARAM1] ^= T0;
 875     RETURN();
 876 }
 877
 878 void OPPROTO op_add_rN_T0(void)
 879 {
 880     T0 += env->gregs[PARAM1];
 881     RETURN();
 882 }
 883
 884 void OPPROTO op_add_rN_T1(void)
 885 {
 886     T1 += env->gregs[PARAM1];
 887     RETURN();
 888 }
 889
 890 void OPPROTO op_add_imm_rN(void)
 891 {
 892     env->gregs[PARAM2] += PARAM1;
 893     RETURN();
 894 }
 895
 896 void OPPROTO op_and_imm_rN(void)
 897 {
 898     env->gregs[PARAM2] &= PARAM1;
 899     RETURN();
 900 }
 901
 902 void OPPROTO op_or_imm_rN(void)
 903 {
 904     env->gregs[PARAM2] |= PARAM1;
 905     RETURN();
 906 }
 907
 908 void OPPROTO op_xor_imm_rN(void)
 909 {
 910     env->gregs[PARAM2] ^= PARAM1;
 911     RETURN();
 912 }
 913
 914 void OPPROTO op_dt_rN(void)
 915 {
 916     cond_t((--env->gregs[PARAM1]) == 0);
 917     RETURN();
 918 }
 919
 920 void OPPROTO op_tst_imm_rN(void)
 921 {
 922     cond_t((env->gregs[PARAM2] & PARAM1) == 0);
 923     RETURN();
 924 }
 925
 926 void OPPROTO op_movl_T0_T1(void)
 927 {
 928     T1 = T0;
 929     RETURN();
 930 }
 931
 932 void OPPROTO op_movl_fpul_FT0(void)
 933 {
 934     FT0 = *(float32 *)&env->fpul;
 935     RETURN();
 936 }
 937
 938 void OPPROTO op_movl_FT0_fpul(void)
 939 {
 940     *(float32 *)&env->fpul = FT0;
 941     RETURN();
 942 }
 943
 944 void OPPROTO op_movl_imm_PC(void)
 945 {
 946     env->pc = PARAM1;
 947     RETURN();
 948 }
 949
 950 void OPPROTO op_jT(void)
 951 {
 952     if (env->sr & SR_T)
 953         GOTO_LABEL_PARAM(1);
 954     RETURN();
 955 }
 956
 957 void OPPROTO op_jdelayed(void)
 958 {
 959     if (env->flags & DELAY_SLOT_TRUE) {
 960         env->flags &= ~DELAY_SLOT_TRUE;
 961         GOTO_LABEL_PARAM(1);
 962     }
 963     RETURN();
 964 }
 965
 966 void OPPROTO op_movl_delayed_pc_PC(void)
 967 {
 968     env->pc = env->delayed_pc;
 969     RETURN();
 970 }
 971
 972 void OPPROTO op_addl_GBR_T0(void)
 973 {
 974     T0 += env->gbr;
 975     RETURN();
 976 }
 977
 978 void OPPROTO op_and_imm_T0(void)
 979 {
 980     T0 &= PARAM1;
 981     RETURN();
 982 }
 983
 984 void OPPROTO op_or_imm_T0(void)
 985 {
 986     T0 |= PARAM1;
 987     RETURN();
 988 }
 989
 990 void OPPROTO op_xor_imm_T0(void)
 991 {
 992     T0 ^= PARAM1;
 993     RETURN();
 994 }
 995
 996 void OPPROTO op_tst_imm_T0(void)
 997 {
 998     cond_t((T0 & PARAM1) == 0);
 999     RETURN();
1000 }
1001
1002 void OPPROTO op_raise_illegal_instruction(void)
1003 {
1004     env->exception_index = 0x180;
1005     do_raise_exception();
1006     RETURN();
1007 }
1008
1009 void OPPROTO op_raise_slot_illegal_instruction(void)
1010 {
1011     env->exception_index = 0x1a0;
1012     do_raise_exception();
1013     RETURN();
1014 }
1015
1016 void OPPROTO op_debug(void)
1017 {
1018     env->exception_index = EXCP_DEBUG;
1019     cpu_loop_exit();
1020 }
1021
1022 /* Load and store */
1023 #define MEMSUFFIX _raw
1024 #include "op_mem.c"
1025 #undef MEMSUFFIX
1026 #if !defined(CONFIG_USER_ONLY)
1027 #define MEMSUFFIX _user
1028 #include "op_mem.c"
1029 #undef MEMSUFFIX
1030
1031 #define MEMSUFFIX _kernel
1032 #include "op_mem.c"
1033 #undef MEMSUFFIX
1034 #endif