4 * Copyright (c) 2006-2007 CodeSourcery
5 * Written by Paul Brook
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
36 typedef struct m68k_def_t m68k_def_t
;
43 static m68k_def_t m68k_cpu_defs
[] = {
44 {"m5206", M68K_CPUID_M5206
},
45 {"m5208", M68K_CPUID_M5208
},
46 {"cfv4e", M68K_CPUID_CFV4E
},
47 {"any", M68K_CPUID_ANY
},
51 static void m68k_set_feature(CPUM68KState
*env
, int feature
)
53 env
->features
|= (1u << feature
);
56 static int cpu_m68k_set_model(CPUM68KState
*env
, const char *name
)
60 for (def
= m68k_cpu_defs
; def
->name
; def
++) {
61 if (strcmp(def
->name
, name
) == 0)
68 case M68K_CPUID_M5206
:
69 m68k_set_feature(env
, M68K_FEATURE_CF_ISA_A
);
71 case M68K_CPUID_M5208
:
72 m68k_set_feature(env
, M68K_FEATURE_CF_ISA_A
);
73 m68k_set_feature(env
, M68K_FEATURE_CF_ISA_APLUSC
);
74 m68k_set_feature(env
, M68K_FEATURE_BRAL
);
75 m68k_set_feature(env
, M68K_FEATURE_CF_EMAC
);
76 m68k_set_feature(env
, M68K_FEATURE_USP
);
78 case M68K_CPUID_CFV4E
:
79 m68k_set_feature(env
, M68K_FEATURE_CF_ISA_A
);
80 m68k_set_feature(env
, M68K_FEATURE_CF_ISA_B
);
81 m68k_set_feature(env
, M68K_FEATURE_BRAL
);
82 m68k_set_feature(env
, M68K_FEATURE_CF_FPU
);
83 m68k_set_feature(env
, M68K_FEATURE_CF_EMAC
);
84 m68k_set_feature(env
, M68K_FEATURE_USP
);
87 m68k_set_feature(env
, M68K_FEATURE_CF_ISA_A
);
88 m68k_set_feature(env
, M68K_FEATURE_CF_ISA_B
);
89 m68k_set_feature(env
, M68K_FEATURE_CF_ISA_APLUSC
);
90 m68k_set_feature(env
, M68K_FEATURE_BRAL
);
91 m68k_set_feature(env
, M68K_FEATURE_CF_FPU
);
92 /* MAC and EMAC are mututally exclusive, so pick EMAC.
93 It's mostly backwards compatible. */
94 m68k_set_feature(env
, M68K_FEATURE_CF_EMAC
);
95 m68k_set_feature(env
, M68K_FEATURE_CF_EMAC_B
);
96 m68k_set_feature(env
, M68K_FEATURE_USP
);
97 m68k_set_feature(env
, M68K_FEATURE_EXT_FULL
);
98 m68k_set_feature(env
, M68K_FEATURE_WORD_INDEX
);
102 register_m68k_insns(env
);
106 void cpu_reset(CPUM68KState
*env
)
108 memset(env
, 0, offsetof(CPUM68KState
, breakpoints
));
109 #if !defined (CONFIG_USER_ONLY)
113 /* ??? FP regs should be initialized to NaN. */
114 env
->cc_op
= CC_OP_FLAGS
;
115 /* TODO: We should set PC from the interrupt vector. */
120 CPUM68KState
*cpu_m68k_init(const char *cpu_model
)
124 env
= malloc(sizeof(CPUM68KState
));
129 env
->cpu_model_str
= cpu_model
;
131 if (cpu_m68k_set_model(env
, cpu_model
) < 0) {
140 void cpu_m68k_close(CPUM68KState
*env
)
145 void cpu_m68k_flush_flags(CPUM68KState
*env
, int cc_op
)
152 #define HIGHBIT 0x80000000u
154 #define SET_NZ(x) do { \
157 else if ((int32_t)(x) < 0) \
161 #define SET_FLAGS_SUB(type, utype) do { \
162 SET_NZ((type)dest); \
164 if ((utype) tmp < (utype) src) \
166 if ((1u << (sizeof(type) * 8 - 1)) & (tmp ^ dest) & (tmp ^ src)) \
185 if (HIGHBIT
& (src
^ dest
) & ~(tmp
^ src
))
189 SET_FLAGS_SUB(int32_t, uint32_t);
192 SET_FLAGS_SUB(int8_t, uint8_t);
195 SET_FLAGS_SUB(int16_t, uint16_t);
201 tmp
= dest
- src
- 1;
202 if (HIGHBIT
& (src
^ dest
) & ~(tmp
^ src
))
207 tmp
= dest
+ src
+ 1;
210 if (HIGHBIT
& (tmp
^ dest
) & (tmp
^ src
))
220 if (src
&& src
<= 32 && (dest
& (1 << (32 - src
))))
230 if (src
&& src
<= 32 && ((dest
>> (src
- 1)) & 1))
237 tmp
= (int32_t)dest
>> src
;
240 if (src
&& src
<= 32 && (((int32_t)dest
>> (src
- 1)) & 1))
244 cpu_abort(env
, "Bad CC_OP %d", cc_op
);
246 env
->cc_op
= CC_OP_FLAGS
;
247 env
->cc_dest
= flags
;
250 float64
helper_sub_cmpf64(CPUM68KState
*env
, float64 src0
, float64 src1
)
252 /* ??? This may incorrectly raise exceptions. */
253 /* ??? Should flush denormals to zero. */
255 res
= float64_sub(src0
, src1
, &env
->fp_status
);
256 if (float64_is_nan(res
)) {
257 /* +/-inf compares equal against itself, but sub returns nan. */
258 if (!float64_is_nan(src0
)
259 && !float64_is_nan(src1
)) {
261 if (float64_lt_quiet(src0
, res
, &env
->fp_status
))
262 res
= float64_chs(res
);
268 void helper_movec(CPUM68KState
*env
, int reg
, uint32_t val
)
271 case 0x02: /* CACR */
275 case 0x04: case 0x05: case 0x06: case 0x07: /* ACR[0-3] */
276 /* TODO: Implement Access Control Registers. */
278 case 0x801: /* VBR */
281 /* TODO: Implement control registers. */
283 cpu_abort(env
, "Unimplemented control register write 0x%x = 0x%x\n",
288 void m68k_set_macsr(CPUM68KState
*env
, uint32_t val
)
295 if ((env
->macsr
^ val
) & (MACSR_FI
| MACSR_SU
)) {
296 for (i
= 0; i
< 4; i
++) {
297 regval
= env
->macc
[i
];
298 exthigh
= regval
>> 40;
299 if (env
->macsr
& MACSR_FI
) {
304 extlow
= regval
>> 32;
306 if (env
->macsr
& MACSR_FI
) {
307 regval
= (((uint64_t)acc
) << 8) | extlow
;
308 regval
|= ((int64_t)exthigh
) << 40;
309 } else if (env
->macsr
& MACSR_SU
) {
310 regval
= acc
| (((int64_t)extlow
) << 32);
311 regval
|= ((int64_t)exthigh
) << 40;
313 regval
= acc
| (((uint64_t)extlow
) << 32);
314 regval
|= ((uint64_t)(uint8_t)exthigh
) << 40;
316 env
->macc
[i
] = regval
;
322 void m68k_switch_sp(CPUM68KState
*env
)
326 env
->sp
[env
->current_sp
] = env
->aregs
[7];
327 new_sp
= (env
->sr
& SR_S
&& env
->cacr
& M68K_CACR_EUSP
)
328 ? M68K_SSP
: M68K_USP
;
329 env
->aregs
[7] = env
->sp
[new_sp
];
330 env
->current_sp
= new_sp
;
335 /* TODO: This will need fixing once the MMU is implemented. */
336 target_phys_addr_t
cpu_get_phys_page_debug(CPUState
*env
, target_ulong addr
)
341 #if defined(CONFIG_USER_ONLY)
343 int cpu_m68k_handle_mmu_fault (CPUState
*env
, target_ulong address
, int rw
,
344 int mmu_idx
, int is_softmmu
)
346 env
->exception_index
= EXCP_ACCESS
;
347 env
->mmu
.ar
= address
;
353 int cpu_m68k_handle_mmu_fault (CPUState
*env
, target_ulong address
, int rw
,
354 int mmu_idx
, int is_softmmu
)
358 address
&= TARGET_PAGE_MASK
;
359 prot
= PAGE_READ
| PAGE_WRITE
;
360 return tlb_set_page(env
, address
, address
, prot
, mmu_idx
, is_softmmu
);
363 /* Notify CPU of a pending interrupt. Prioritization and vectoring should
364 be handled by the interrupt controller. Real hardware only requests
365 the vector when the interrupt is acknowledged by the CPU. For
366 simplicitly we calculate it when the interrupt is signalled. */
367 void m68k_set_irq_level(CPUM68KState
*env
, int level
, uint8_t vector
)
369 env
->pending_level
= level
;
370 env
->pending_vector
= vector
;
372 cpu_interrupt(env
, CPU_INTERRUPT_HARD
);
374 cpu_reset_interrupt(env
, CPU_INTERRUPT_HARD
);