Merge commit '845773ab03a8dde681ff1b929bbb41e67d0131a6' into upstream-merge
[qemu-kvm/amd-iommu.git] / hw / pc.c
blobaad2879d77cab770e4330ef9a7cc9d044635393f
1 /*
2 * QEMU PC System Emulator
4 * Copyright (c) 2003-2004 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
24 #include "hw.h"
25 #include "pc.h"
26 #include "apic.h"
27 #include "fdc.h"
28 #include "pci.h"
29 #include "vmware_vga.h"
30 #include "monitor.h"
31 #include "fw_cfg.h"
32 #include "hpet_emul.h"
33 #include "smbios.h"
34 #include "loader.h"
35 #include "elf.h"
36 #include "multiboot.h"
37 #include "device-assignment.h"
38 #include "kvm.h"
40 /* output Bochs bios info messages */
41 //#define DEBUG_BIOS
43 #define BIOS_FILENAME "bios.bin"
44 #define EXTBOOT_FILENAME "extboot.bin"
45 #define VAPIC_FILENAME "vapic.bin"
47 #define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
49 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
50 #define ACPI_DATA_SIZE 0x10000
51 #define BIOS_CFG_IOPORT 0x510
52 #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
53 #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
54 #define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2)
55 #define FW_CFG_E820_TABLE (FW_CFG_ARCH_LOCAL + 3)
57 #define E820_NR_ENTRIES 16
59 struct e820_entry {
60 uint64_t address;
61 uint64_t length;
62 uint32_t type;
65 struct e820_table {
66 uint32_t count;
67 struct e820_entry entry[E820_NR_ENTRIES];
70 static struct e820_table e820_table;
72 void isa_irq_handler(void *opaque, int n, int level)
74 IsaIrqState *isa = (IsaIrqState *)opaque;
76 if (n < 16) {
77 qemu_set_irq(isa->i8259[n], level);
79 if (isa->ioapic)
80 qemu_set_irq(isa->ioapic[n], level);
83 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
87 /* MSDOS compatibility mode FPU exception support */
88 static qemu_irq ferr_irq;
90 void pc_register_ferr_irq(qemu_irq irq)
92 ferr_irq = irq;
95 /* XXX: add IGNNE support */
96 void cpu_set_ferr(CPUX86State *s)
98 qemu_irq_raise(ferr_irq);
101 static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
103 qemu_irq_lower(ferr_irq);
106 /* TSC handling */
107 uint64_t cpu_get_tsc(CPUX86State *env)
109 return cpu_get_ticks();
112 /* SMM support */
114 static cpu_set_smm_t smm_set;
115 static void *smm_arg;
117 void cpu_smm_register(cpu_set_smm_t callback, void *arg)
119 assert(smm_set == NULL);
120 assert(smm_arg == NULL);
121 smm_set = callback;
122 smm_arg = arg;
125 void cpu_smm_update(CPUState *env)
127 if (smm_set && smm_arg && env == first_cpu)
128 smm_set(!!(env->hflags & HF_SMM_MASK), smm_arg);
132 /* IRQ handling */
133 int cpu_get_pic_interrupt(CPUState *env)
135 int intno;
137 intno = apic_get_interrupt(env);
138 if (intno >= 0) {
139 /* set irq request if a PIC irq is still pending */
140 /* XXX: improve that */
141 pic_update_irq(isa_pic);
142 return intno;
144 /* read the irq from the PIC */
145 if (!apic_accept_pic_intr(env))
146 return -1;
148 intno = pic_read_irq(isa_pic);
149 return intno;
152 static void pic_irq_request(void *opaque, int irq, int level)
154 CPUState *env = first_cpu;
156 if (env->apic_state) {
157 while (env) {
158 if (apic_accept_pic_intr(env))
159 apic_deliver_pic_intr(env, level);
160 env = env->next_cpu;
162 } else {
163 if (level)
164 cpu_interrupt(env, CPU_INTERRUPT_HARD);
165 else
166 cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
170 /* PC cmos mappings */
172 #define REG_EQUIPMENT_BYTE 0x14
174 static int cmos_get_fd_drive_type(int fd0)
176 int val;
178 switch (fd0) {
179 case 0:
180 /* 1.44 Mb 3"5 drive */
181 val = 4;
182 break;
183 case 1:
184 /* 2.88 Mb 3"5 drive */
185 val = 5;
186 break;
187 case 2:
188 /* 1.2 Mb 5"5 drive */
189 val = 2;
190 break;
191 default:
192 val = 0;
193 break;
195 return val;
198 static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd,
199 RTCState *s)
201 int cylinders, heads, sectors;
202 bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
203 rtc_set_memory(s, type_ofs, 47);
204 rtc_set_memory(s, info_ofs, cylinders);
205 rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
206 rtc_set_memory(s, info_ofs + 2, heads);
207 rtc_set_memory(s, info_ofs + 3, 0xff);
208 rtc_set_memory(s, info_ofs + 4, 0xff);
209 rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
210 rtc_set_memory(s, info_ofs + 6, cylinders);
211 rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
212 rtc_set_memory(s, info_ofs + 8, sectors);
215 /* convert boot_device letter to something recognizable by the bios */
216 static int boot_device2nibble(char boot_device)
218 switch(boot_device) {
219 case 'a':
220 case 'b':
221 return 0x01; /* floppy boot */
222 case 'c':
223 return 0x02; /* hard drive boot */
224 case 'd':
225 return 0x03; /* CD-ROM boot */
226 case 'n':
227 return 0x04; /* Network boot */
229 return 0;
232 static int set_boot_dev(RTCState *s, const char *boot_device, int fd_bootchk)
234 #define PC_MAX_BOOT_DEVICES 3
235 int nbds, bds[3] = { 0, };
236 int i;
238 nbds = strlen(boot_device);
239 if (nbds > PC_MAX_BOOT_DEVICES) {
240 error_report("Too many boot devices for PC");
241 return(1);
243 for (i = 0; i < nbds; i++) {
244 bds[i] = boot_device2nibble(boot_device[i]);
245 if (bds[i] == 0) {
246 error_report("Invalid boot device for PC: '%c'",
247 boot_device[i]);
248 return(1);
251 rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
252 rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ? 0x0 : 0x1));
253 return(0);
256 static int pc_boot_set(void *opaque, const char *boot_device)
258 return set_boot_dev(opaque, boot_device, 0);
261 /* hd_table must contain 4 block drivers */
262 void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
263 const char *boot_device, DriveInfo **hd_table,
264 FDCtrl *floppy_controller, RTCState *s)
266 int val;
267 int fd0, fd1, nb;
268 int i;
270 /* various important CMOS locations needed by PC/Bochs bios */
272 /* memory size */
273 val = 640; /* base memory in K */
274 rtc_set_memory(s, 0x15, val);
275 rtc_set_memory(s, 0x16, val >> 8);
277 val = (ram_size / 1024) - 1024;
278 if (val > 65535)
279 val = 65535;
280 rtc_set_memory(s, 0x17, val);
281 rtc_set_memory(s, 0x18, val >> 8);
282 rtc_set_memory(s, 0x30, val);
283 rtc_set_memory(s, 0x31, val >> 8);
285 if (above_4g_mem_size) {
286 rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16);
287 rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24);
288 rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32);
291 if (ram_size > (16 * 1024 * 1024))
292 val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
293 else
294 val = 0;
295 if (val > 65535)
296 val = 65535;
297 rtc_set_memory(s, 0x34, val);
298 rtc_set_memory(s, 0x35, val >> 8);
300 /* set the number of CPU */
301 rtc_set_memory(s, 0x5f, smp_cpus - 1);
303 /* set boot devices, and disable floppy signature check if requested */
304 if (set_boot_dev(s, boot_device, fd_bootchk)) {
305 exit(1);
308 /* floppy type */
310 fd0 = fdctrl_get_drive_type(floppy_controller, 0);
311 fd1 = fdctrl_get_drive_type(floppy_controller, 1);
313 val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
314 rtc_set_memory(s, 0x10, val);
316 val = 0;
317 nb = 0;
318 if (fd0 < 3)
319 nb++;
320 if (fd1 < 3)
321 nb++;
322 switch (nb) {
323 case 0:
324 break;
325 case 1:
326 val |= 0x01; /* 1 drive, ready for boot */
327 break;
328 case 2:
329 val |= 0x41; /* 2 drives, ready for boot */
330 break;
332 val |= 0x02; /* FPU is there */
333 val |= 0x04; /* PS/2 mouse installed */
334 rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
336 /* hard drives */
338 rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
339 if (hd_table[0])
340 cmos_init_hd(0x19, 0x1b, hd_table[0]->bdrv, s);
341 if (hd_table[1])
342 cmos_init_hd(0x1a, 0x24, hd_table[1]->bdrv, s);
344 val = 0;
345 for (i = 0; i < 4; i++) {
346 if (hd_table[i]) {
347 int cylinders, heads, sectors, translation;
348 /* NOTE: bdrv_get_geometry_hint() returns the physical
349 geometry. It is always such that: 1 <= sects <= 63, 1
350 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
351 geometry can be different if a translation is done. */
352 translation = bdrv_get_translation_hint(hd_table[i]->bdrv);
353 if (translation == BIOS_ATA_TRANSLATION_AUTO) {
354 bdrv_get_geometry_hint(hd_table[i]->bdrv, &cylinders, &heads, &sectors);
355 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
356 /* No translation. */
357 translation = 0;
358 } else {
359 /* LBA translation. */
360 translation = 1;
362 } else {
363 translation--;
365 val |= translation << (i * 2);
368 rtc_set_memory(s, 0x39, val);
371 void ioport_set_a20(int enable)
373 /* XXX: send to all CPUs ? */
374 cpu_x86_set_a20(first_cpu, enable);
377 int ioport_get_a20(void)
379 return ((first_cpu->a20_mask >> 20) & 1);
382 static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
384 ioport_set_a20((val >> 1) & 1);
385 /* XXX: bit 0 is fast reset */
388 static uint32_t ioport92_read(void *opaque, uint32_t addr)
390 return ioport_get_a20() << 1;
393 /***********************************************************/
394 /* Bochs BIOS debug ports */
396 static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
398 static const char shutdown_str[8] = "Shutdown";
399 static int shutdown_index = 0;
401 switch(addr) {
402 /* Bochs BIOS messages */
403 case 0x400:
404 case 0x401:
405 fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
406 exit(1);
407 case 0x402:
408 case 0x403:
409 #ifdef DEBUG_BIOS
410 fprintf(stderr, "%c", val);
411 #endif
412 break;
413 case 0x8900:
414 /* same as Bochs power off */
415 if (val == shutdown_str[shutdown_index]) {
416 shutdown_index++;
417 if (shutdown_index == 8) {
418 shutdown_index = 0;
419 qemu_system_shutdown_request();
421 } else {
422 shutdown_index = 0;
424 break;
426 /* LGPL'ed VGA BIOS messages */
427 case 0x501:
428 case 0x502:
429 fprintf(stderr, "VGA BIOS panic, line %d\n", val);
430 exit(1);
431 case 0x500:
432 case 0x503:
433 #ifdef DEBUG_BIOS
434 fprintf(stderr, "%c", val);
435 #endif
436 break;
440 int e820_add_entry(uint64_t address, uint64_t length, uint32_t type)
442 int index = e820_table.count;
443 struct e820_entry *entry;
445 if (index >= E820_NR_ENTRIES)
446 return -EBUSY;
447 entry = &e820_table.entry[index];
449 entry->address = address;
450 entry->length = length;
451 entry->type = type;
453 e820_table.count++;
454 return e820_table.count;
457 static void *bochs_bios_init(void)
459 void *fw_cfg;
460 uint8_t *smbios_table;
461 size_t smbios_len;
462 uint64_t *numa_fw_cfg;
463 int i, j;
465 register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
466 register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
467 register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
468 register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
469 register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
471 register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
472 register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
473 register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
474 register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
476 fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
478 fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
479 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
480 fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, (uint8_t *)acpi_tables,
481 acpi_tables_len);
482 fw_cfg_add_bytes(fw_cfg, FW_CFG_IRQ0_OVERRIDE, &irq0override, 1);
484 smbios_table = smbios_get_table(&smbios_len);
485 if (smbios_table)
486 fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
487 smbios_table, smbios_len);
488 fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE, (uint8_t *)&e820_table,
489 sizeof(struct e820_table));
491 /* allocate memory for the NUMA channel: one (64bit) word for the number
492 * of nodes, one word for each VCPU->node and one word for each node to
493 * hold the amount of memory.
495 numa_fw_cfg = qemu_mallocz((1 + smp_cpus + nb_numa_nodes) * 8);
496 numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
497 for (i = 0; i < smp_cpus; i++) {
498 for (j = 0; j < nb_numa_nodes; j++) {
499 if (node_cpumask[j] & (1 << i)) {
500 numa_fw_cfg[i + 1] = cpu_to_le64(j);
501 break;
505 for (i = 0; i < nb_numa_nodes; i++) {
506 numa_fw_cfg[smp_cpus + 1 + i] = cpu_to_le64(node_mem[i]);
508 fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, (uint8_t *)numa_fw_cfg,
509 (1 + smp_cpus + nb_numa_nodes) * 8);
511 return fw_cfg;
514 static long get_file_size(FILE *f)
516 long where, size;
518 /* XXX: on Unix systems, using fstat() probably makes more sense */
520 where = ftell(f);
521 fseek(f, 0, SEEK_END);
522 size = ftell(f);
523 fseek(f, where, SEEK_SET);
525 return size;
528 static void load_linux(void *fw_cfg,
529 const char *kernel_filename,
530 const char *initrd_filename,
531 const char *kernel_cmdline,
532 target_phys_addr_t max_ram_size)
534 uint16_t protocol;
535 int setup_size, kernel_size, initrd_size = 0, cmdline_size;
536 uint32_t initrd_max;
537 uint8_t header[8192], *setup, *kernel, *initrd_data;
538 target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr = 0;
539 FILE *f;
540 char *vmode;
542 /* Align to 16 bytes as a paranoia measure */
543 cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
545 /* load the kernel header */
546 f = fopen(kernel_filename, "rb");
547 if (!f || !(kernel_size = get_file_size(f)) ||
548 fread(header, 1, MIN(ARRAY_SIZE(header), kernel_size), f) !=
549 MIN(ARRAY_SIZE(header), kernel_size)) {
550 fprintf(stderr, "qemu: could not load kernel '%s': %s\n",
551 kernel_filename, strerror(errno));
552 exit(1);
555 /* kernel protocol version */
556 #if 0
557 fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
558 #endif
559 if (ldl_p(header+0x202) == 0x53726448)
560 protocol = lduw_p(header+0x206);
561 else {
562 /* This looks like a multiboot kernel. If it is, let's stop
563 treating it like a Linux kernel. */
564 if (load_multiboot(fw_cfg, f, kernel_filename, initrd_filename,
565 kernel_cmdline, kernel_size, header))
566 return;
567 protocol = 0;
570 if (protocol < 0x200 || !(header[0x211] & 0x01)) {
571 /* Low kernel */
572 real_addr = 0x90000;
573 cmdline_addr = 0x9a000 - cmdline_size;
574 prot_addr = 0x10000;
575 } else if (protocol < 0x202) {
576 /* High but ancient kernel */
577 real_addr = 0x90000;
578 cmdline_addr = 0x9a000 - cmdline_size;
579 prot_addr = 0x100000;
580 } else {
581 /* High and recent kernel */
582 real_addr = 0x10000;
583 cmdline_addr = 0x20000;
584 prot_addr = 0x100000;
587 #if 0
588 fprintf(stderr,
589 "qemu: real_addr = 0x" TARGET_FMT_plx "\n"
590 "qemu: cmdline_addr = 0x" TARGET_FMT_plx "\n"
591 "qemu: prot_addr = 0x" TARGET_FMT_plx "\n",
592 real_addr,
593 cmdline_addr,
594 prot_addr);
595 #endif
597 /* highest address for loading the initrd */
598 if (protocol >= 0x203)
599 initrd_max = ldl_p(header+0x22c);
600 else
601 initrd_max = 0x37ffffff;
603 if (initrd_max >= max_ram_size-ACPI_DATA_SIZE)
604 initrd_max = max_ram_size-ACPI_DATA_SIZE-1;
606 fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_ADDR, cmdline_addr);
607 fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE, strlen(kernel_cmdline)+1);
608 fw_cfg_add_bytes(fw_cfg, FW_CFG_CMDLINE_DATA,
609 (uint8_t*)strdup(kernel_cmdline),
610 strlen(kernel_cmdline)+1);
612 if (protocol >= 0x202) {
613 stl_p(header+0x228, cmdline_addr);
614 } else {
615 stw_p(header+0x20, 0xA33F);
616 stw_p(header+0x22, cmdline_addr-real_addr);
619 /* handle vga= parameter */
620 vmode = strstr(kernel_cmdline, "vga=");
621 if (vmode) {
622 unsigned int video_mode;
623 /* skip "vga=" */
624 vmode += 4;
625 if (!strncmp(vmode, "normal", 6)) {
626 video_mode = 0xffff;
627 } else if (!strncmp(vmode, "ext", 3)) {
628 video_mode = 0xfffe;
629 } else if (!strncmp(vmode, "ask", 3)) {
630 video_mode = 0xfffd;
631 } else {
632 video_mode = strtol(vmode, NULL, 0);
634 stw_p(header+0x1fa, video_mode);
637 /* loader type */
638 /* High nybble = B reserved for Qemu; low nybble is revision number.
639 If this code is substantially changed, you may want to consider
640 incrementing the revision. */
641 if (protocol >= 0x200)
642 header[0x210] = 0xB0;
644 /* heap */
645 if (protocol >= 0x201) {
646 header[0x211] |= 0x80; /* CAN_USE_HEAP */
647 stw_p(header+0x224, cmdline_addr-real_addr-0x200);
650 /* load initrd */
651 if (initrd_filename) {
652 if (protocol < 0x200) {
653 fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
654 exit(1);
657 initrd_size = get_image_size(initrd_filename);
658 if (initrd_size < 0) {
659 fprintf(stderr, "qemu: error reading initrd %s\n",
660 initrd_filename);
661 exit(1);
664 initrd_addr = (initrd_max-initrd_size) & ~4095;
666 initrd_data = qemu_malloc(initrd_size);
667 load_image(initrd_filename, initrd_data);
669 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_addr);
670 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
671 fw_cfg_add_bytes(fw_cfg, FW_CFG_INITRD_DATA, initrd_data, initrd_size);
673 stl_p(header+0x218, initrd_addr);
674 stl_p(header+0x21c, initrd_size);
677 /* load kernel and setup */
678 setup_size = header[0x1f1];
679 if (setup_size == 0)
680 setup_size = 4;
681 setup_size = (setup_size+1)*512;
682 kernel_size -= setup_size;
684 setup = qemu_malloc(setup_size);
685 kernel = qemu_malloc(kernel_size);
686 fseek(f, 0, SEEK_SET);
687 if (fread(setup, 1, setup_size, f) != setup_size) {
688 fprintf(stderr, "fread() failed\n");
689 exit(1);
691 if (fread(kernel, 1, kernel_size, f) != kernel_size) {
692 fprintf(stderr, "fread() failed\n");
693 exit(1);
695 fclose(f);
696 memcpy(setup, header, MIN(sizeof(header), setup_size));
698 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, prot_addr);
699 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
700 fw_cfg_add_bytes(fw_cfg, FW_CFG_KERNEL_DATA, kernel, kernel_size);
702 fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_ADDR, real_addr);
703 fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_SIZE, setup_size);
704 fw_cfg_add_bytes(fw_cfg, FW_CFG_SETUP_DATA, setup, setup_size);
706 option_rom[nb_option_roms] = "linuxboot.bin";
707 nb_option_roms++;
710 #define NE2000_NB_MAX 6
712 static const int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360,
713 0x280, 0x380 };
714 static const int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
716 static const int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
717 static const int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
719 #ifdef HAS_AUDIO
720 void pc_audio_init (PCIBus *pci_bus, qemu_irq *pic)
722 struct soundhw *c;
724 for (c = soundhw; c->name; ++c) {
725 if (c->enabled) {
726 if (c->isa) {
727 c->init.init_isa(pic);
728 } else {
729 if (pci_bus) {
730 c->init.init_pci(pci_bus);
736 #endif
738 void pc_init_ne2k_isa(NICInfo *nd)
740 static int nb_ne2k = 0;
742 if (nb_ne2k == NE2000_NB_MAX)
743 return;
744 isa_ne2000_init(ne2000_io[nb_ne2k],
745 ne2000_irq[nb_ne2k], nd);
746 nb_ne2k++;
749 int cpu_is_bsp(CPUState *env)
751 /* We hard-wire the BSP to the first CPU. */
752 return env->cpu_index == 0;
755 /* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
756 BIOS will read it and start S3 resume at POST Entry */
757 void pc_cmos_set_s3_resume(void *opaque, int irq, int level)
759 RTCState *s = opaque;
761 if (level) {
762 rtc_set_memory(s, 0xF, 0xFE);
766 void pc_acpi_smi_interrupt(void *opaque, int irq, int level)
768 CPUState *s = opaque;
770 if (level) {
771 cpu_interrupt(s, CPU_INTERRUPT_SMI);
775 CPUState *pc_new_cpu(const char *cpu_model)
777 CPUState *env;
779 env = cpu_init(cpu_model);
780 if (!env) {
781 fprintf(stderr, "Unable to find x86 CPU definition\n");
782 exit(1);
784 if ((env->cpuid_features & CPUID_APIC) || smp_cpus > 1) {
785 env->cpuid_apic_id = env->cpu_index;
786 /* APIC reset callback resets cpu */
787 apic_init(env);
788 } else {
789 qemu_register_reset((QEMUResetHandler*)cpu_reset, env);
791 return env;
794 void pc_cpus_init(const char *cpu_model)
796 int i;
798 /* init CPUs */
799 if (cpu_model == NULL) {
800 #ifdef TARGET_X86_64
801 cpu_model = "qemu64";
802 #else
803 cpu_model = "qemu32";
804 #endif
807 for(i = 0; i < smp_cpus; i++) {
808 pc_new_cpu(cpu_model);
812 void pc_memory_init(ram_addr_t ram_size,
813 const char *kernel_filename,
814 const char *kernel_cmdline,
815 const char *initrd_filename,
816 ram_addr_t *below_4g_mem_size_p,
817 ram_addr_t *above_4g_mem_size_p)
819 char *filename;
820 int ret, linux_boot, i;
821 ram_addr_t ram_addr, bios_offset, option_rom_offset;
822 ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
823 int bios_size, isa_bios_size;
824 void **fw_cfg;
826 if (ram_size >= 0xe0000000 ) {
827 above_4g_mem_size = ram_size - 0xe0000000;
828 below_4g_mem_size = 0xe0000000;
829 } else {
830 below_4g_mem_size = ram_size;
832 *above_4g_mem_size_p = above_4g_mem_size;
833 *below_4g_mem_size_p = below_4g_mem_size;
835 linux_boot = (kernel_filename != NULL);
837 /* allocate RAM */
838 ram_addr = qemu_ram_alloc(below_4g_mem_size);
839 cpu_register_physical_memory(0, 0xa0000, ram_addr);
840 cpu_register_physical_memory(0x100000,
841 below_4g_mem_size - 0x100000,
842 ram_addr + 0x100000);
844 /* above 4giga memory allocation */
845 if (above_4g_mem_size > 0) {
846 #if TARGET_PHYS_ADDR_BITS == 32
847 hw_error("To much RAM for 32-bit physical address");
848 #else
849 ram_addr = qemu_ram_alloc(above_4g_mem_size);
850 cpu_register_physical_memory(0x100000000ULL,
851 above_4g_mem_size,
852 ram_addr);
853 #endif
857 /* BIOS load */
858 if (bios_name == NULL)
859 bios_name = BIOS_FILENAME;
860 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
861 if (filename) {
862 bios_size = get_image_size(filename);
863 } else {
864 bios_size = -1;
866 if (bios_size <= 0 ||
867 (bios_size % 65536) != 0) {
868 goto bios_error;
870 bios_offset = qemu_ram_alloc(bios_size);
871 ret = rom_add_file_fixed(bios_name, (uint32_t)(-bios_size));
872 if (ret != 0) {
873 bios_error:
874 fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", bios_name);
875 exit(1);
877 if (filename) {
878 qemu_free(filename);
880 /* map the last 128KB of the BIOS in ISA space */
881 isa_bios_size = bios_size;
882 if (isa_bios_size > (128 * 1024))
883 isa_bios_size = 128 * 1024;
884 cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size,
885 IO_MEM_UNASSIGNED);
886 /* kvm tpr optimization needs the bios accessible for write, at least to qemu itself */
887 cpu_register_physical_memory(0x100000 - isa_bios_size,
888 isa_bios_size,
889 (bios_offset + bios_size - isa_bios_size) /* | IO_MEM_ROM */);
891 if (extboot_drive) {
892 option_rom[nb_option_roms++] = qemu_strdup(EXTBOOT_FILENAME);
894 option_rom[nb_option_roms++] = qemu_strdup(VAPIC_FILENAME);
896 option_rom_offset = qemu_ram_alloc(PC_ROM_SIZE);
897 cpu_register_physical_memory(PC_ROM_MIN_VGA, PC_ROM_SIZE, option_rom_offset);
899 /* map all the bios at the top of memory */
900 cpu_register_physical_memory((uint32_t)(-bios_size),
901 bios_size, bios_offset | IO_MEM_ROM);
903 fw_cfg = bochs_bios_init();
904 rom_set_fw(fw_cfg);
906 if (linux_boot) {
907 load_linux(*fw_cfg, kernel_filename, initrd_filename, kernel_cmdline, below_4g_mem_size);
910 for (i = 0; i < nb_option_roms; i++) {
911 rom_add_option(option_rom[i]);
915 qemu_irq *pc_allocate_cpu_irq(void)
917 return qemu_allocate_irqs(pic_irq_request, NULL, 1);
920 void pc_vga_init(PCIBus *pci_bus)
922 if (cirrus_vga_enabled) {
923 if (pci_bus) {
924 pci_cirrus_vga_init(pci_bus);
925 } else {
926 isa_cirrus_vga_init();
928 } else if (vmsvga_enabled) {
929 if (pci_bus)
930 pci_vmsvga_init(pci_bus);
931 else
932 fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
933 } else if (std_vga_enabled) {
934 if (pci_bus) {
935 pci_vga_init(pci_bus, 0, 0);
936 } else {
937 isa_vga_init();
942 void pc_basic_device_init(qemu_irq *isa_irq,
943 FDCtrl **floppy_controller,
944 RTCState **rtc_state)
946 int i;
947 DriveInfo *fd[MAX_FD];
948 PITState *pit;
950 register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
952 register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
954 *rtc_state = rtc_init(2000);
956 qemu_register_boot_set(pc_boot_set, *rtc_state);
958 register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
959 register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
961 #ifdef CONFIG_KVM_PIT
962 if (kvm_enabled() && kvm_pit_in_kernel())
963 pit = kvm_pit_init(0x40, isa_reserve_irq(0));
964 else
965 #endif
967 pit = pit_init(0x40, isa_reserve_irq(0));
969 pcspk_init(pit);
970 if (!no_hpet) {
971 hpet_init(isa_irq);
974 for(i = 0; i < MAX_SERIAL_PORTS; i++) {
975 if (serial_hds[i]) {
976 serial_isa_init(i, serial_hds[i]);
980 for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
981 if (parallel_hds[i]) {
982 parallel_init(i, parallel_hds[i]);
986 isa_create_simple("i8042");
987 DMA_init(0);
989 for(i = 0; i < MAX_FD; i++) {
990 fd[i] = drive_get(IF_FLOPPY, 0, i);
992 *floppy_controller = fdctrl_init_isa(fd);
995 void pc_pci_device_init(PCIBus *pci_bus)
997 int max_bus;
998 int bus;
1000 max_bus = drive_get_max_bus(IF_SCSI);
1001 for (bus = 0; bus <= max_bus; bus++) {
1002 pci_create_simple(pci_bus, -1, "lsi53c895a");
1005 if (extboot_drive) {
1006 DriveInfo *info = extboot_drive;
1007 int cyls, heads, secs;
1009 if (info->type != IF_IDE && info->type != IF_VIRTIO) {
1010 bdrv_guess_geometry(info->bdrv, &cyls, &heads, &secs);
1011 bdrv_set_geometry_hint(info->bdrv, cyls, heads, secs);
1014 extboot_init(info->bdrv);
1017 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
1018 if (kvm_enabled()) {
1019 add_assigned_devices(pci_bus, assigned_devices, assigned_devices_index);
1021 #endif /* CONFIG_KVM_DEVICE_ASSIGNMENT */